| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/remoteproc/ |
| H A D | st-rproc.txt | 1 STMicroelectronics Co-Processor Bindings 2 ---------------------------------------- 6 Co-processors can be controlled from the bootloader or the primary OS. If 7 the bootloader starts a co-processor, the primary OS must detect its state 11 - compatible Should be one of: 12 "st,st231-rproc" 13 "st,st40-rproc" 14 - memory-region Reserved memory (See: ../reserved-memory/reserved-memory.txt) 15 - resets Reset lines (See: ../reset/reset.txt) 16 - reset-names Must be "sw_reset" and "pwr_reset" [all …]
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| H A D | imx-rproc.txt | 1 NXP iMX6SX/iMX7D Co-Processor Bindings 2 ---------------------------------------- 4 This binding provides support for ARM Cortex M4 Co-processor found on some 8 - compatible Should be one of: 9 "fsl,imx7d-cm4" 10 "fsl,imx6sx-cm4" 11 - clocks Clock for co-processor (See: ../clock/clock-bindings.txt) 12 - syscon Phandle to syscon block which provide access to 16 - memory-region list of phandels to the reserved memory regions. 17 (See: ../reserved-memory/reserved-memory.txt) [all …]
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| H A D | mtk,scp.txt | 2 ---------------------------------------- 4 This binding provides support for ARM Cortex M4 Co-processor found on some 8 - compatible Should be "mediatek,mt8183-scp" 9 - reg Should contain the address ranges for the two memory 11 - reg-names Contains the corresponding names for the two memory 13 - clocks Clock for co-processor (See: ../clock/clock-bindings.txt) 14 - clock-names Contains the corresponding name for the clock. This 18 -------- 22 for the rpmsg devices - but must contain the following property: 24 - mtk,rpmsg-name Contains the name for the rpmsg device. Used to match [all …]
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| H A D | wkup_m3_rproc.txt | 4 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor 6 that cannot be controlled from the MPU. This CM3 processor requires a firmware 12 A wkup_m3 device node is used to represent the Wakeup M3 processor instance 17 -------------------- 18 - compatible: Should be one of, 19 "ti,am3352-wkup-m3" for AM33xx SoCs 20 "ti,am4372-wkup-m3" for AM43xx SoCs 21 - reg: Should contain the address ranges for the two internal 25 - reg-names: Contains the corresponding names for the two memory 27 - ti,hwmods: Name of the hwmod associated with the wkupm3 device. [all …]
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| /OK3568_Linux_fs/kernel/Documentation/powerpc/ |
| H A D | vas-api.rst | 1 .. SPDX-License-Identifier: GPL-2.0 2 .. _VAS-API: 11 Power9 processor introduced Virtual Accelerator Switchboard (VAS) which 12 allows both userspace and kernel communicate to co-processor 14 unit comprises of one or more hardware engines or co-processor types 21 Requests to the GZIP engine must be formatted as a co-processor Request 38 /dev/crypto/nx-gzip device node implemented by the VAS/NX device driver. 39 An application must open the /dev/crypto/nx-gzip device to obtain a file 58 NX-GZIP Device Node 61 There is one /dev/crypto/nx-gzip node in the system and it provides [all …]
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| /OK3568_Linux_fs/kernel/arch/x86/include/asm/ |
| H A D | user32.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 16 u32 st_space[20]; /* 8*10 bytes for each FP-reg = 80 bytes */ 31 int st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */ 32 int xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */ 48 int u_fpvalid; /* True if math co-processor being used. */ 50 struct user_i387_ia32_struct i387; /* Math Co-processor registers. */ 64 __u32 u_fpstate; /* Math Co-processor pointer. */
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| H A D | user_32.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 8 linux we use the 'trad-core' bfd). There are quite a number of 20 DATA: The data area is stored. We use current->end_text to 21 current->brk to pick up all of the user variables, plus any memory 23 is demand-zero or if a page is totally unused, we just cover the entire 28 current->start_stack, so we round each of these off in order to be able 38 * interacting with the FXSR-format floating point environment. Floating 53 long st_space[20]; /* 8*10 bytes for each FP-reg = 80 bytes */ 67 long st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */ 68 long xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */ [all …]
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| H A D | user_64.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 22 DATA: The data area is stored. We use current->end_text to 23 current->brk to pick up all of the user variables, plus any memory 25 is demand-zero or if a page is totally unused, we just cover the entire 30 current->start_stack, so we round each of these off in order to be able 39 * interacting with the FXSR-format floating point environment. Floating 45 * x86-64 support by Andi Kleen. 61 __u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */ 62 __u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */ 99 /* When the kernel dumps core, it starts by dumping the user struct - [all …]
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| /OK3568_Linux_fs/kernel/arch/sh/include/asm/ |
| H A D | user.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 11 * linux we use the `trad-core' bfd). The file contents are as follows: 19 * data: The data segment follows next. We use current->end_text to 20 * current->brk to pick up all of the user variables, plus any memory 22 * page is demand-zero or if a page is totally unused, we just cover 27 * current->start_stack, so we round each of these in order to be able 40 struct user_fpu_struct fpu; /* Math Co-processor registers */ 41 int u_fpvalid; /* True if math co-processor being used */ 50 struct user_fpu_struct* u_fpstate; /* Math Co-processor pointer */
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| /OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/powerpc/power9/ |
| H A D | other.json | 45 …"BriefDescription": "The processor's data cache was reloaded from a location other than the local … 65 "BriefDescription": "Read-write data cache collisions" 90 "BriefDescription": "D-cache invalidates sent over the reload bus to the core" 95 …"BriefDescription": "The processor's Instruction cache was reloaded from the local chip's Memory d… 145 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit st… 200 "BriefDescription": "Read-write data cache collisions" 255 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit st… 260 "BriefDescription": "L3 CO received retry port 3 (memory only), every retry counted" 270 "BriefDescription": "L3 CO to memory port 0 with or without data" 280 …-word boundary, which causes it to require an additional slice than than what normally would be re… [all …]
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| /OK3568_Linux_fs/kernel/kernel/ |
| H A D | cpu_pm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 62 * cpu_pm_register_notifier - register a driver with cpu_pm 83 * cpu_pm_unregister_notifier - unregister a driver with cpu_pm 103 * cpu_pm_enter - CPU low power entry notifier 111 * co-processor, interrupt controller and its PM extensions, local CPU 124 * cpu_pm_exit - CPU low power exit notifier 129 * Notified drivers can include VFP co-processor, interrupt controller 142 * cpu_cluster_pm_enter - CPU cluster low power entry notifier 149 * domain. Notified drivers can include VFP co-processor, interrupt controller 164 * cpu_cluster_pm_exit - CPU cluster low power exit notifier [all …]
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| /OK3568_Linux_fs/kernel/drivers/crypto/chelsio/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 tristate "Chelsio Crypto Co-processor Driver" 12 The Chelsio Crypto Co-processor driver for T6 adapters. 20 Please send feedback to <linux-bugs@chelsio.com>.
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| /OK3568_Linux_fs/u-boot/doc/ |
| H A D | README.xtensa | 1 U-Boot for the Xtensa Architecture 5 ------------------------------------- 7 Xtensa is a configurable processor architecture from Tensilica, Inc. 8 Diamond Cores are pre-configured instances available for license and 12 and custom instructions, registers and co-processors. The custom core 14 Processor Generator. 18 Xtensa CPUs in U-Boot. Therefore, there is only a single 'xtensa' CPU 19 in the cpu tree of U-Boot. 21 In the same manner as the Linux port to Xtensa, U-Boot adapts to an 24 abstraction layer (HAL). For the purpose of U-Boot, the HAL consists only [all …]
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| /OK3568_Linux_fs/kernel/arch/m68k/include/asm/ |
| H A D | user.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 7 linux we use the 'trad-core' bfd). There are quite a number of 19 DATA: The data area is stored. We use current->end_text to 20 current->brk to pick up all of the user variables, plus any memory 22 is demand-zero or if a page is totally unused, we just cover the entire 27 current->start_stack, so we round each of these off in order to be able 33 unsigned long fpregs[8*3]; /* fp0-fp7 registers */ 54 /* When the kernel dumps core, it starts by dumping the user struct - 62 int u_fpvalid; /* True if math co-processor being used. */ 64 struct user_m68kfp_struct m68kfp; /* Math Co-processor registers. */ [all …]
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| /OK3568_Linux_fs/kernel/arch/powerpc/include/asm/ |
| H A D | vas.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * Copyright 2016-17 IBM Corp. 34 #define MASK_LSH(m) (__builtin_ffsl(m) - 1) 39 * Co-processor Engine type. 52 * Receive window attributes specified by the (in-kernel) owner of window. 82 * Window attributes specified by the in-kernel owner of a send window. 108 * Return the VAS id or -1 if no matching vasid is found. 135 * and the co-processor type @cop. Use @attr to initialize attributes 148 * return -EAGAIN if there are active send windows attached to this receive 154 * Copy the co-processor request block (CRB) @crb into the local L2 cache.
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| /OK3568_Linux_fs/kernel/arch/arm/mach-mmp/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 10 Support for Marvell's PXA168/PXA910(MMP), MMP2, and MMP3 processor lines. 23 Say 'Y' here if you want to support the Marvell PXA168-based 31 Say 'Y' here if you want to support the Marvell PXA168-based 39 Say 'Y' here if you want to support the Marvell PXA168-based 47 Say 'Y' here if you want to support the Marvell PXA910-based 55 Say 'Y' here if you want to support the Marvell PXA910-based 63 Say 'Y' here if you want to support the Marvell MMP2-based 65 MMP2-based board can't be co-existed with PXA168-based & 66 PXA910-based development board. Since MMP2 is compatible to [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/mach-imx/ |
| H A D | hab.h | 2 * Copyright (C) 2012-2015 Freescale Semiconductor, Inc. All Rights Reserved. 4 * SPDX-License-Identifier: GPL-2.0+ 13 /* -------- start of HAB API updates ------------*/ 27 HAB_CFG_OPEN = 0xf0, /* < Non-secure IC */ 34 HAB_STATE_CHECK = 0x55, /* Check state (non-secure) */ 35 HAB_STATE_NONSECURE = 0x66, /* Non-secure state */ 111 #define HAB_ENG_RTIC 0x05 /* Run-time integrity checker */ 115 #define HAB_ENG_DCP 0x1b /* Data Co-Processor */ 117 #define HAB_ENG_SNVS 0x1e /* Secure Non-Volatile Storage */ 119 #define HAB_ENG_DTCP 0x22 /* DTCP co-processor */ [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/mm/ |
| H A D | proc-v6.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * linux/arch/arm/mm/proc-v6.S 8 * This is the "shell" of the ARMv6 processor support. 14 #include <asm/asm-offsets.h> 16 #include <asm/pgtable-hwdef.h> 18 #include "proc-macros.S" 52 * - loc - location to jump to for soft reset 69 * Idle the processor (eg, wait for interrupt). 75 mcr p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode 91 * - pgd_phys - physical address of new TTB [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/firmware/ |
| H A D | nvidia,tegra210-bpmp.txt | 1 NVIDIA Tegra210 Boot and Power Management Processor (BPMP) 3 The Boot and Power Management Processor (BPMP) is a co-processor found 12 - compatible 15 - "nvidia,tegra210-bpmp" 16 - reg: physical base address and length for HW synchornization primitives 19 - interrupts: specifies the interrupt number for receiving messages ("rx") 23 - #clock-cells : Should be 1 for platforms where DRAM clock control is 29 compatible = "nvidia,tegra210-bpmp"; 34 interrupt-names = "tx", "rx";
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| /OK3568_Linux_fs/kernel/Documentation/staging/ |
| H A D | tee.rst | 9 secure co-processor etc. A TEE driver handles the details needed to 14 - Registration of TEE drivers 16 - Managing shared memory between Linux and the TEE 18 - Providing a generic API to the TEE 25 User space (the client) connects to the driver by opening /dev/tee[0-9]* or 26 /dev/teepriv[0-9]*. 28 - TEE_IOC_SHM_ALLOC allocates shared memory and returns a file descriptor 34 - TEE_IOC_VERSION lets user space know which TEE this driver handles and 37 - TEE_IOC_OPEN_SESSION opens a new session to a Trusted Application. 39 - TEE_IOC_INVOKE invokes a function in a Trusted Application. [all …]
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| /OK3568_Linux_fs/external/mpp/inc/ |
| H A D | vpu.h | 2 * Copyright 2015 Rockchip Electronics Co. LTD 8 * http://www.apache.org/licenses/LICENSE-2.0 27 #define VPU_FAILURE (-1) 35 // vpu post processor 41 registers, size 164B 37 // vpu decoder + post processor 101 registers, size 404B 59 RK_U32 maxPpOutPicWidth; /* Maximum output width of Post-Processor */ 62 RK_U32 mpeg4Support; /* HW supports MPEG-4 */ 63 RK_U32 customMpeg4Support; /* HW supports custom MPEG-4 features */ 64 RK_U32 vc1Support; /* HW supports VC-1 Simple */ 65 RK_U32 mpeg2Support; /* HW supports MPEG-2 */ [all …]
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| /OK3568_Linux_fs/external/rknpu2/examples/3rdparty/mpp/include/rockchip/ |
| H A D | vpu.h | 2 * Copyright 2015 Rockchip Electronics Co. LTD 8 * http://www.apache.org/licenses/LICENSE-2.0 27 #define VPU_FAILURE (-1) 35 // vpu post processor 41 registers, size 164B 37 // vpu decoder + post processor 101 registers, size 404B 59 RK_U32 maxPpOutPicWidth; /* Maximum output width of Post-Processor */ 62 RK_U32 mpeg4Support; /* HW supports MPEG-4 */ 63 RK_U32 customMpeg4Support; /* HW supports custom MPEG-4 features */ 64 RK_U32 vc1Support; /* HW supports VC-1 Simple */ 65 RK_U32 mpeg2Support; /* HW supports MPEG-2 */ [all …]
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| /OK3568_Linux_fs/u-boot/board/freescale/ls1021atwr/ |
| H A D | README | 2 -------- 6 ------------------ 7 The QorIQ LS1 family, which includes the LS1021A communications processor, 8 is built on Layerscape architecture, the industry's first software-aware, 9 core-agnostic networking architecture to offer unprecedented efficiency 12 A member of the value-performance tier, the QorIQ LS1021A processor provides 14 enterprise networking applications. Incorporating dual ARM Cortex-A7 cores 15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark 17 security features and the broadest array of high-speed interconnects and 18 optimized peripheral features ever offered in a sub-3 W processor. [all …]
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| /OK3568_Linux_fs/kernel/drivers/cpufreq/ |
| H A D | brcmstb-avs-cpufreq.c | 32 * DVFS. The AVS firmware is running on its own co-processor. The 93 /* PMAP and P-STATE commands */ 107 * unused:31-24, mdiv_p0:23-16, unused:15-14, pdiv:13-10 , ndiv_int:9-0 117 * mdiv_p4:31-24, mdiv_p3:23-16, mdiv_p2:15:8, mdiv_p1:7:0 128 /* Different P-STATES AVS supports (for GET_PSTATE/SET_PSTATE) */ 148 /* Non-AVS modes are not supported */ 150 /* Cannot set P-State until P-Map supplied */ 152 /* Cannot change P-Map after initial P-Map set */ 162 #define BRCM_AVS_CPUFREQ_PREFIX "brcmstb-avs" 163 #define BRCM_AVS_CPUFREQ_NAME BRCM_AVS_CPUFREQ_PREFIX "-cpufreq" [all …]
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| /OK3568_Linux_fs/u-boot/board/freescale/ls1021aqds/ |
| H A D | README | 2 -------- 6 ------------------ 7 The QorIQ LS1 family, which includes the LS1021A communications processor, 8 is built on Layerscape architecture, the industry's first software-aware, 9 core-agnostic networking architecture to offer unprecedented efficiency 12 A member of the value-performance tier, the QorIQ LS1021A processor provides 14 enterprise networking applications. Incorporating dual ARM Cortex-A7 cores 15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark 17 security features and the broadest array of high-speed interconnects and 18 optimized peripheral features ever offered in a sub-3 W processor. [all …]
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