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/OK3568_Linux_fs/u-boot/arch/arm/mach-omap2/omap3/
H A Dsdrc.c41 if (readl(&sdrc_base->cs[CS0].mr) == SDRC_MR_0_SDR) in is_mem_sdr()
48 * - When we have CS1 populated we want to have it mapped after cs0 to allow
56 size = get_sdr_cs_size(CS0); in make_cs1_contiguous()
82 * - Get offset of cs from cs0 start
126 * - Code called once in C-Stack only context for CS0 and with early being
146 * from the first bank to the second. We will setup CS0, in do_sdrc_init()
171 write_sdrc_timings(CS0, sdrc_actim_base0, &timings); in do_sdrc_init()
181 * both CS0 and CS1 (such as some older versions of x-loader) in do_sdrc_init()
185 timings.mcfg = readl(&sdrc_base->cs[CS0].mcfg), in do_sdrc_init()
186 timings.rfr_ctrl = readl(&sdrc_base->cs[CS0].rfr_ctrl); in do_sdrc_init()
[all …]
H A Demif4.c42 if (cs == CS0) in get_sdr_cs_size()
50 * - Get offset of cs from cs0 start
132 size0 = get_sdr_cs_size(CS0); in dram_init()
136 * memory on CS0. in dram_init()
149 size0 = get_sdr_cs_size(CS0); in dram_init_banksize()
/OK3568_Linux_fs/u-boot/drivers/ddr/fsl/
H A Doptions.c41 { /* cs0 */
68 { /* cs0 */
85 { /* cs0 */
97 { /* cs0 */
124 { /* cs0 */
145 { /* cs0 */
167 { /* cs0 */
184 { /* cs0 */
218 { /* cs0 */
244 { /* cs0 */
[all …]
/OK3568_Linux_fs/kernel/drivers/ata/
H A Dpata_ixp4xx_cf.c103 ioaddr->cmd_addr = data->cs0; in ixp4xx_setup_port()
139 struct resource *cs0, *cs1; in ixp4xx_pata_probe() local
145 cs0 = platform_get_resource(pdev, IORESOURCE_MEM, 0); in ixp4xx_pata_probe()
148 if (!cs0 || !cs1) in ixp4xx_pata_probe()
161 data->cs0 = devm_ioremap(&pdev->dev, cs0->start, 0x1000); in ixp4xx_pata_probe()
164 if (!data->cs0 || !data->cs1) in ixp4xx_pata_probe()
185 ixp4xx_setup_port(ap, data, cs0->start, cs1->start); in ixp4xx_pata_probe()
H A Dpata_octeon_cf.c55 unsigned int cs0; member
170 octeon_cf_set_boot_reg_cfg(cf_port->cs0, div); in octeon_cf_set_piomode()
178 reg_tim.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_TIMX(cf_port->cs0)); in octeon_cf_set_piomode()
207 cvmx_write_csr(CVMX_MIO_BOOT_REG_TIMX(cf_port->cs0), reg_tim.u64); in octeon_cf_set_piomode()
843 void __iomem *cs0; in octeon_cf_probe() local
877 cf_port->cs0 = be32_to_cpup(cs_num); in octeon_cf_probe()
932 cs0 = devm_ioremap(&pdev->dev, res_cs0->start, in octeon_cf_probe()
934 if (!cs0) in octeon_cf_probe()
951 base = cs0 + 0x800; in octeon_cf_probe()
959 base = cs0; in octeon_cf_probe()
[all …]
/OK3568_Linux_fs/kernel/Documentation/ABI/testing/
H A Dsysfs-class-watchdog97 chip at CS0 after booting from the alternate
101 from (CS0->CS1, CS1->CS0) to (CS0->CS0,
106 the SoC is in normal mapping state (i.e. booted from CS0),
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,armada-370-pinctrl.txt29 mpp12 12 gpio, ge0(rxd1), i2c1(sda), sd0(d0), spi1(cs0),
45 mpp24 24 gpio, ge0(col), ge1(txctl), spi1(cs0)
53 mpp32 32 gpio, spi0(cs0)
54 mpp33 33 gpio, dev(bootcs), spi0(cs0)
71 mpp49 49 gpio, dev(ad10), pcie(clkreq1), sd0(d0), spi1(cs0),
86 mpp58 58 gpio, dev(cs0), uart1(rts), tdm(int), audio(extclk),
H A Dmarvell,armada-38x-pinctrl.txt36 mpp18 18 gpio, ge0(rxerr), ptp(trig), ua1(txd), spi0(cs0)
43 mpp25 25 gpio, spi0(cs0), ua0(rts), ua1(txd), sd0(d5), dev(cs0)
77 mpp59 59 gpio, pcie0(rstout), i2c1(sda), spi1(cs0), sd0(d2)
H A Dmarvell,armada-39x-pinctrl.txt36 mpp18 18 gpio, ua1(txd), spi0(cs0), i2c2(sck)
44 mpp25 25 gpio, spi0(cs0), ua0(rts), ua1(txd), sd0(d5), dev(cs0)
81 mpp59 59 gpio, pcie0(rstout), i2c1(sda), spi1(cs0), sd0(d2)
/OK3568_Linux_fs/u-boot/arch/arm/mach-uniphier/boot-device/
H A Dboot-device-pxs2.c41 {BOOT_DEVICE_SPI, "SPI (3Byte CS0)"},
42 {BOOT_DEVICE_SPI, "SPI (4Byte CS0)"},
45 {BOOT_DEVICE_SPI, "SPI (4Byte CS0)"},
46 {BOOT_DEVICE_SPI, "SPI (3Byte CS0)"},
/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_pbs.c207 [dq], CS0, (1 - ecc) * in ddr3_pbs_tx()
374 ddr3_pbs_write_pup_dqs_reg(CS0, pup, INIT_WL_DELAY); in ddr3_pbs_tx()
453 ddr3_pbs_write_pup_dqs_reg(CS0, in ddr3_tx_shift_dqs_adll_step_before_fail()
506 ddr3_pbs_write_pup_dqs_reg(CS0, pup * (1 - ecc) + ECC_PUP * ecc, in ddr3_tx_shift_dqs_adll_step_before_fail()
647 [dq], CS0, in ddr3_pbs_rx()
655 DQ_NUM, CS0, in ddr3_pbs_rx()
702 (PUP_DQS_RD, CS0, in ddr3_pbs_rx()
718 [dq], CS0, in ddr3_pbs_rx()
749 ddr3_write_pup_reg(PUP_DQS_RD, CS0, in ddr3_pbs_rx()
887 ddr3_write_pup_reg(PUP_DQS_RD, CS0, PUP_BC, 0, INIT_RL_DELAY); in ddr3_pbs_rx()
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Domap3-n950-n9.dtsi359 ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */
365 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
372 * gpmc cs0 before gpmc_cs_program_settings:
373 * cs0 GPMC_CS_CONFIG1: 0xfd001202
374 * cs0 GPMC_CS_CONFIG2: 0x00181800
375 * cs0 GPMC_CS_CONFIG3: 0x00030300
376 * cs0 GPMC_CS_CONFIG4: 0x18001804
377 * cs0 GPMC_CS_CONFIG5: 0x03171d1d
378 * cs0 GPMC_CS_CONFIG6: 0x97080000
/OK3568_Linux_fs/u-boot/board/ccv/xpress/
H A Dimximage.cfg161 DATA 4 0x021b001c 0x02008032 /* MMDC0_MDSCR, MR2 write, CS0 */
162 DATA 4 0x021b001c 0x00008033 /* MMDC0_MDSCR, MR3 write, CS0 */
163 DATA 4 0x021b001c 0x00048031 /* MMDC0_MDSCR, MR1 write, CS0 */
164 DATA 4 0x021b001c 0x15208030 /* MMDC0_MDSCR, MR0 write, CS0 */
166 device on CS0 */
/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A Dsdram_pctl_px30.c13 * rank = 1: cs0
27 /* rank = 1: cs0
29 * rank = 3: cs0 & cs1
58 * rank : 1:cs0, 2:cs1, 3:cs0&cs1
H A Dsdram-rk3308-ddr-skew.inc33 {/*cs0 dq0~7,dm,dqs*/
45 /*cs0 dq8~15,dm,dqs*/
/OK3568_Linux_fs/u-boot/board/sbc8548/
H A DREADME127 have U-Boot in the 8MB flash, tied to /CS0.
129 If you are running the default 8MB /CS0 settings but want to store an
141 Finally, if you are running the alternate 64MB /CS0 settings and want
176 JP12 CS0/CS6 swap see note[*] see note[*]
191 onto /CS0 and the SODIMM flash on /CS6 (default). When JP12
192 is jumpered parallel to the LBC-SDRAM, then /CS0 is for the
257 ff80_0000 ffff_ffff CS0 8 Boot flash (8MB)
/OK3568_Linux_fs/kernel/drivers/watchdog/
H A Daspeed_wdt.c171 /* access_cs0 shows if cs0 is accessible, hence the reverted bit */
204 * ast2400: a way to get access to the primary SPI flash chip at CS0
207 * (CS0->CS1, CS1->CS0) to (CS0->CS0, CS1->CS1).
211 * mapping state (i.e. booted from CS0), clearing those bits does nothing for
/OK3568_Linux_fs/kernel/drivers/staging/fbtft/
H A Dfb_agm1264k-fl.c32 #define CS0 gpio.aux[0] macro
114 if (!par->CS0) { in verify_gpios()
116 "Missing info about 'cs0' gpio. Aborting.\n"); in verify_gpios()
143 } else if (strcasecmp(gpio->name, "cs0") == 0) { in request_gpios_match()
145 par->CS0 = gpio->gpio; in request_gpios_match()
197 gpiod_set_value(par->CS0, 0); in write_reg8_bus8()
200 /* cs0 */ in write_reg8_bus8()
201 gpiod_set_value(par->CS0, 1); in write_reg8_bus8()
400 gpiod_set_value(par->CS0, 0); in write_vmem()
/OK3568_Linux_fs/u-boot/board/freescale/mpc837xemds/
H A DREADME34 J10 removed, CS0 connect to NOR flash; when mounted, CS0 connect to NAND
55 0xfe00_0000 0xffff_ffff NOR Flash on CS0 32M
/OK3568_Linux_fs/u-boot/board/freescale/mx31ads/
H A Dmx31ads.c28 /* CS0: Nor Flash */ in board_early_init_f()
36 static const struct mxc_weimcs cs0 = { in board_early_init_f() local
45 mxc_setup_weimcs(0, &cs0); in board_early_init_f()
/OK3568_Linux_fs/u-boot/doc/
H A DREADME.fsl-ddr31 |Controller | None | 2x1 lower | 2x1 upper | {CS0+CS1}, | {CS0+CS1+ |
32 |Interleaving | | {CS0+CS1} | {CS2+CS3} | {CS2+CS3} | CS2+CS3} |
37 | |CS0 Only| | | {CS0+CS1} | |
40 | |CS0 Only| | | {CS0+CS1} | |
43 | |CS0 Only| | | {CS0+CS1} | |
46 | | | | | {CS0+CS1} | |
49 interleaving using "2x2" rank interleaving, it only interleaves {CS0+CS1}
94 # bank(chip-select) interleaving cs0+cs1
100 # bank(chip-select) interleaving (cs0+cs1) and (cs2+cs3) (2x2)
103 # bank(chip-select) interleaving (cs0+cs1+cs2+cs3) (4x1)
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-s32v234/
H A Dlpddr2.h48 #define MMDC_MDSCR_RST_VALUE 0x003F8030 /* Reset command CS0 */
55 #define MMDC_MDASP_MODULE0_VALUE 0x0000007F /* 2Gb, 256 MB memory so CS0 is 256 MB (0x90000000) */
60 #define MMDC_MDASP_MODULE1_VALUE 0x0000007F /* 2Gb, 256 MB memory so CS0 is 256 MB (0xD0000000) */
/OK3568_Linux_fs/kernel/drivers/bus/
H A Dimx-weim.c86 05, /* CS0(128M) CS1(0M) CS2(0M) CS3(0M) */ in imx_weim_gpr_setup()
87 033, /* CS0(64M) CS1(64M) CS2(0M) CS3(0M) */ in imx_weim_gpr_setup()
88 0113, /* CS0(64M) CS1(32M) CS2(32M) CS3(0M) */ in imx_weim_gpr_setup()
89 01111, /* CS0(32M) CS1(32M) CS2(32M) CS3(32M) */ in imx_weim_gpr_setup()
/OK3568_Linux_fs/kernel/arch/hexagon/kernel/
H A Dptrace.c64 membuf_store(&to, regs->cs0); in genregs_get()
112 INEXT(&regs->cs0, cs0); in genregs_set()
/OK3568_Linux_fs/u-boot/board/imx31_phycore/
H A Dimx31_phycore.c38 /* CS0: Nor Flash */ in board_early_init_f()
39 static const struct mxc_weimcs cs0 = { in board_early_init_f() local
68 mxc_setup_weimcs(0, &cs0); in board_early_init_f()

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