Searched full:audio_refclk2 (Results 1 – 2 of 2) sorted by relevance
15 The pcm3168a SCKI clock is sourced from j721e AUDIO_REFCLK2 pin.17 clock for AUDIO_REFCLK2 needs to be changed between PLL4 (for 48KHz) and24 |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI28 |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI33 |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
32 |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI39 |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI