Searched full:ar8031 (Results 1 – 14 of 14) sorted by relevance
36 Only supported on the AR8031.47 Only supported on the AR8031.
96 /* To enable AR8031 output a 125MHz clk from CLK_25M */ in ar8031_phy_fixup()132 * Enable 125MHz clock from CLK_25M on the AR8031. This in ar8035_phy_fixup()136 * This is the same as is the AR8031 fixup. in ar8035_phy_fixup()
25 /* disable phy AR8031 SmartEEE function. */ in ar8031_phy_fixup()
106 /* AR8031 PHY Reset */123 /* Reset AR8031 PHY */ in setup_iomux_enet()196 /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ in ar8031_phy_fixup()
203 /* AR8031 */210 /* AR8031 */
121 /* The AR8035 has another mask which is compatible with the AR8031/AR8033 mask481 /* Only supported on AR8031/AR8033, the AR8030/AR8035 use strapping in at803x_parse_dt()1088 /* Qualcomm Atheros AR8031/AR8033 */1090 .name = "Qualcomm Atheros AR8031/AR8033",
247 Currently supports the AR8030, AR8031, AR8033 and AR8035 model
104 .name = "AR8031/AR8033",
143 /* AR8031 PHY Reset */171 /* Reset AR8031 PHY */ in setup_fec()
88 /* AR8031 PHY Reset */96 /* Reset AR8031 PHY */ in setup_iomux_enet()375 /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ in ar8031_phy_fixup()
178 * We need enable AR8031 ouput a 125MHz clk from CLK_25M in fecmxc_mii_postcall()
411 /* Ar8031 phy SmartEEE feature cause link status generates glitch, in mx6_rgmii_rework()421 /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ in mx6_rgmii_rework()
65 /* AR8031 PHY Debug Registers */
440 /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ in ar8031_phy_fixup()