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/rk3399_rockchip-uboot/lib/zlib/
H A Dinffixed.h11 {96,7,0},{0,8,80},{0,8,16},{20,8,115},{18,7,31},{0,8,112},{0,8,48},
12 {0,9,192},{16,7,10},{0,8,96},{0,8,32},{0,9,160},{0,8,0},{0,8,128},
13 {0,8,64},{0,9,224},{16,7,6},{0,8,88},{0,8,24},{0,9,144},{19,7,59},
14 {0,8,120},{0,8,56},{0,9,208},{17,7,17},{0,8,104},{0,8,40},{0,9,176},
15 {0,8,8},{0,8,136},{0,8,72},{0,9,240},{16,7,4},{0,8,84},{0,8,20},
16 {21,8,227},{19,7,43},{0,8,116},{0,8,52},{0,9,200},{17,7,13},{0,8,100},
17 {0,8,36},{0,9,168},{0,8,4},{0,8,132},{0,8,68},{0,9,232},{16,7,8},
18 {0,8,92},{0,8,28},{0,9,152},{20,7,83},{0,8,124},{0,8,60},{0,9,216},
19 {18,7,23},{0,8,108},{0,8,44},{0,9,184},{0,8,12},{0,8,140},{0,8,76},
20 {0,9,248},{16,7,3},{0,8,82},{0,8,18},{21,8,163},{19,7,35},{0,8,114},
[all …]
H A Dtrees.h4 {{ 12},{ 8}}, {{140},{ 8}}, {{ 76},{ 8}}, {{204},{ 8}}, {{ 44},{ 8}},
5 {{172},{ 8}}, {{108},{ 8}}, {{236},{ 8}}, {{ 28},{ 8}}, {{156},{ 8}},
6 {{ 92},{ 8}}, {{220},{ 8}}, {{ 60},{ 8}}, {{188},{ 8}}, {{124},{ 8}},
7 {{252},{ 8}}, {{ 2},{ 8}}, {{130},{ 8}}, {{ 66},{ 8}}, {{194},{ 8}},
8 {{ 34},{ 8}}, {{162},{ 8}}, {{ 98},{ 8}}, {{226},{ 8}}, {{ 18},{ 8}},
9 {{146},{ 8}}, {{ 82},{ 8}}, {{210},{ 8}}, {{ 50},{ 8}}, {{178},{ 8}},
10 {{114},{ 8}}, {{242},{ 8}}, {{ 10},{ 8}}, {{138},{ 8}}, {{ 74},{ 8}},
11 {{202},{ 8}}, {{ 42},{ 8}}, {{170},{ 8}}, {{106},{ 8}}, {{234},{ 8}},
12 {{ 26},{ 8}}, {{154},{ 8}}, {{ 90},{ 8}}, {{218},{ 8}}, {{ 58},{ 8}},
13 {{186},{ 8}}, {{122},{ 8}}, {{250},{ 8}}, {{ 6},{ 8}}, {{134},{ 8}},
[all …]
/rk3399_rockchip-uboot/drivers/gpio/
H A Dda8xx_gpio.c26 { pinmux(13), 8, 6 }, /* GP0[0] */
27 { pinmux(13), 8, 7 },
28 { pinmux(14), 8, 0 },
29 { pinmux(14), 8, 1 },
30 { pinmux(14), 8, 2 },
31 { pinmux(14), 8, 3 },
32 { pinmux(14), 8, 4 },
33 { pinmux(14), 8, 5 },
34 { pinmux(14), 8, 6 },
35 { pinmux(14), 8, 7 },
[all …]
/rk3399_rockchip-uboot/drivers/pinctrl/uniphier/
H A Dpinctrl-uniphier-pxs2.c28 static const int ether_mii_muxvals[] = {8, 8, 8, 8, 10, 10, 10, 10, 10, 10, 10,
33 static const int ether_rgmii_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
34 8, 8, 8, 8};
37 static const int ether_rmii_muxvals[] = {8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9};
39 static const int i2c0_muxvals[] = {8, 8};
41 static const int i2c1_muxvals[] = {8, 8};
43 static const int i2c2_muxvals[] = {8, 8};
45 static const int i2c3_muxvals[] = {8, 8};
52 static const int nand_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};
54 static const int nand_cs1_muxvals[] = {8, 8};
[all …]
/rk3399_rockchip-uboot/drivers/mtd/nand/raw/
H A Dnand_ids.c28 LEGACY_ID_NAND("NAND 1MiB 5V 8-bit", 0x6e, 1, SZ_4K, SP_OPTIONS),
29 LEGACY_ID_NAND("NAND 2MiB 5V 8-bit", 0x64, 2, SZ_4K, SP_OPTIONS),
30 LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xe8, 1, SZ_4K, SP_OPTIONS),
31 LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xec, 1, SZ_4K, SP_OPTIONS),
32 LEGACY_ID_NAND("NAND 2MiB 3,3V 8-bit", 0xea, 2, SZ_4K, SP_OPTIONS),
33 LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xd5, 4, SZ_8K, SP_OPTIONS),
35 LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xe6, 8, SZ_8K, SP_OPTIONS),
42 {"TC58NVG0S3E 1G 3.3V 8-bit",
44 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512),
46 {"TC58NVG2S0F 4G 3.3V 8-bit",
[all …]
/rk3399_rockchip-uboot/arch/nios2/lib/
H A Dlibgcc.c33 #define BITS_PER_UNIT 8
44 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
45 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
46 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
47 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8
/rk3399_rockchip-uboot/drivers/misc/
H A Drk3308-secure-otp.S117 .cfi_offset 28, -8
353 .cfi_offset 22, -8
362 ldr x4, [x0, 8]
407 .cfi_offset 22, -8
457 .cfi_offset 20, -8
482 str x0, [x19, 8]
690 ldp x0, x2, [x19, 8]
907 ldr x0, [x19, 8]
1195 orr w3, w28, w27, lsl 8
1254 mov w1, 8
[all …]
H A Drv1126b-secure-otp.S122 .cfi_offset 22, -8
131 ldr x4, [x0, 8]
176 .cfi_offset 22, -8
226 .cfi_offset 20, -8
251 str x0, [x19, 8]
311 .cfi_offset 20, -8
376 .cfi_offset 20, -8
561 .cfi_offset 28, -8
729 mov w1, 8
777 ubfx x5, x24, 9, 8
[all …]
H A Drk3528-secure-otp.S47 mov w0, 8
85 .cfi_offset 22, -8
94 ldr x4, [x0, 8]
139 .cfi_offset 22, -8
189 .cfi_offset 20, -8
214 str x0, [x19, 8]
336 .cfi_offset 20, -8
401 .cfi_offset 20, -8
586 .cfi_offset 28, -8
643 ldp x0, x2, [x26, 8]
[all …]
H A Drk3562-secure-otp.S47 mov w0, 8
85 .cfi_offset 22, -8
94 ldr x4, [x0, 8]
139 .cfi_offset 22, -8
189 .cfi_offset 20, -8
214 str x0, [x19, 8]
336 .cfi_offset 20, -8
401 .cfi_offset 20, -8
586 .cfi_offset 28, -8
643 ldp x0, x2, [x26, 8]
[all …]
H A Drk3568-secure-otp.S47 mov w0, 8
85 .cfi_offset 22, -8
94 ldr x4, [x0, 8]
139 .cfi_offset 22, -8
189 .cfi_offset 20, -8
214 str x0, [x19, 8]
336 .cfi_offset 20, -8
401 .cfi_offset 20, -8
576 .cfi_offset 28, -8
658 ldp x0, x2, [x28, 8]
[all …]
H A Dpx30-secure-otp.S103 mov w0, 8
141 .cfi_offset 22, -8
150 ldr x4, [x0, 8]
195 .cfi_offset 22, -8
245 .cfi_offset 20, -8
270 str x0, [x19, 8]
447 ldp x0, x2, [x19, 8]
651 ldr x0, [x19, 8]
885 ldp x0, x2, [x28, 8]
1052 mov w1, 8
[all …]
H A Drk3328-secure-otp.S95 mov w0, 8
133 .cfi_offset 22, -8
142 ldr x4, [x0, 8]
187 .cfi_offset 22, -8
237 .cfi_offset 20, -8
262 str x0, [x19, 8]
439 ldp x0, x2, [x19, 8]
643 ldr x0, [x19, 8]
877 ldp x0, x2, [x28, 8]
1044 mov w1, 8
[all …]
/rk3399_rockchip-uboot/include/fsl-mc/
H A Dfsl_dprc.h51 MC_CMD_OP(cmd, 2, 0, 8, char, cfg->label[0]);\
52 MC_CMD_OP(cmd, 2, 8, 8, char, cfg->label[1]);\
53 MC_CMD_OP(cmd, 2, 16, 8, char, cfg->label[2]);\
54 MC_CMD_OP(cmd, 2, 24, 8, char, cfg->label[3]);\
55 MC_CMD_OP(cmd, 2, 32, 8, char, cfg->label[4]);\
56 MC_CMD_OP(cmd, 2, 40, 8, char, cfg->label[5]);\
57 MC_CMD_OP(cmd, 2, 48, 8, char, cfg->label[6]);\
58 MC_CMD_OP(cmd, 2, 56, 8, char, cfg->label[7]);\
59 MC_CMD_OP(cmd, 3, 0, 8, char, cfg->label[8]);\
60 MC_CMD_OP(cmd, 3, 8, 8, char, cfg->label[9]);\
[all …]
/rk3399_rockchip-uboot/drivers/video/rk_eink/epdlut/
H A Drkf_waveform.S352 .cfi_offset 20, -8
420 .cfi_offset 22, -8
500 str x0, [x20, 8]
527 lsl x7, x2, 8
616 add x0, x20, 8
665 str x0, [x20, 8]
813 eor w2, w0, w2, lsl 8
897 mov w2, 8
1033 cmp w1, 8
1072 ldr x0, [x20, 8]
[all …]
H A Dpvi_waveform.S535 .cfi_offset 30, -8
870 .cfi_offset 26, -8
936 ldr x0, [x19, 8]
949 str xzr, [x19, 8]
974 str x0, [x19, 8]
1064 lsl w1, w2, 8
1176 .cfi_offset 20, -8
1250 mov w0, -8
1336 .size global_waveform, 8
1338 .zero 8
[all …]
/rk3399_rockchip-uboot/common/spl/
H A Dspl_fit_tb_px30.S921 .cfi_offset 30, -8
1816 strb w0, [x19, 8]
2033 add x2, x19, 8
2046 strb w0, [x19, 8]
2049 ldrb w0, [x19, 8]
2353 .file 8 "include/linux/string.h"
2389 .8byte 0
4547 .8byte .LFB237
4548 .8byte .LFE237-.LFB237
4596 .8byte .LBB93
[all …]
H A Dspl_fit_tb_rv1126b.S948 .cfi_offset 30, -8
981 .cfi_offset 30, -8
1775 strb w0, [x19, 8]
1994 add x2, x19, 8
2007 strb w0, [x19, 8]
2010 ldrb w0, [x19, 8]
2292 .file 8 "include/linux/string.h"
2328 .8byte 0
4619 .8byte .LFB239
4620 .8byte .LFE239-.LFB239
[all …]
H A Dspl_fit_tb_arm64.S1213 add x2, x19, 8
1226 strb w0, [x19, 8]
1229 ldrb w0, [x19, 8]
1604 add x25, x25, 8
1731 .file 8 "include/linux/string.h"
1763 .8byte 0
3765 .8byte .LFB224
3766 .8byte .LFE224-.LFB224
3814 .8byte .LBB84
3862 .8byte .LBB86
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-uniphier/boot-device/
H A Dboot-device-ld11.c16 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
17 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"},
18 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
19 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
20 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
21 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
22 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
23 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
24 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"},
26 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
[all …]
H A Dboot-device-pro5.c16 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
18 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"},
20 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"},
22 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"},
28 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512MB, Addr 5)"},
29 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
30 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
31 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"},
32 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"},
34 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"},
[all …]
H A Dboot-device-pxs2.c16 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
17 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
18 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
19 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
20 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
21 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
22 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
23 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"},
24 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"},
26 {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"},
[all …]
H A Dboot-device-pxs3.c17 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"},
18 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"},
19 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"},
20 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"},
21 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"},
22 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"},
23 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
24 {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
27 {BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training Off)"},
28 {BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training On)"},
[all …]
/rk3399_rockchip-uboot/include/
H A Dipu_pixfmt.h20 (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24))
30 #define IPU_PIX_FMT_LVDS888 fourcc('L', 'V', 'D', '8')
32 #define IPU_PIX_FMT_RGB332 fourcc('R', 'G', 'B', '1') /*< 8 RGB-3-3-2 */
37 #define IPU_PIX_FMT_BGR24 fourcc('B', 'G', 'R', '3') /*< 24 BGR-8-8-8 */
38 #define IPU_PIX_FMT_RGB24 fourcc('R', 'G', 'B', '3') /*< 24 RGB-8-8-8 */
39 #define IPU_PIX_FMT_BGR32 fourcc('B', 'G', 'R', '4') /*< 32 BGR-8-8-8-8 */
40 #define IPU_PIX_FMT_BGRA32 fourcc('B', 'G', 'R', 'A') /*< 32 BGR-8-8-8-8 */
41 #define IPU_PIX_FMT_RGB32 fourcc('R', 'G', 'B', '4') /*< 32 RGB-8-8-8-8 */
42 #define IPU_PIX_FMT_RGBA32 fourcc('R', 'G', 'B', 'A') /*< 32 RGB-8-8-8-8 */
43 #define IPU_PIX_FMT_ABGR32 fourcc('A', 'B', 'G', 'R') /*< 32 ABGR-8-8-8-8 */
[all …]
/rk3399_rockchip-uboot/common/smp/
H A Dgeneric_smp64.S181 .cfi_offset 28, -8
393 .cfi_offset 30, -8
439 .cfi_offset 30, -8
599 add x23, x24, 8
1187 add x0, x0, 8
1237 ldr x0, [x18, 8]
1239 str x0, [x18, 8]
1553 ldr x0, [x18, 8]
1555 str x0, [x18, 8]
1715 mov w2, 8
[all …]

12345678910>>...131