Home
last modified time | relevance | path

Searched +full:5 +full:ns (Results 1 – 25 of 1084) sorted by relevance

12345678910>>...44

/OK3568_Linux_fs/u-boot/board/xes/xpedite537x/
H A Dddr.c47 * Minimum chip delay (Ch 0): 1.372ns
48 * Maximum chip delay (Ch 0): 2.914ns
49 * Minimum chip delay (Ch 1): 1.220ns
50 * Maximum chip delay (Ch 1): 2.595ns
52 * CLK adjust = 5 (from simulations) = 5/8* 3.33ns = 2080ps
58 * = 3.808ns
64 * = 6.240ns
70 * = 3.288ns
76 * = 5.536ns
78 * Ch.0: 3.808ns to 6.240ns additional delay needed (pick 5ns as target)
[all …]
/OK3568_Linux_fs/kernel/Documentation/m68k/
H A Dbuddha-driver.rst59 $d00-$dff IDE-Select 5 (Port 3, Register set 1,
124 A6=1 (for example $840 for port 0, register set 0), a 780ns
131 only the upper three bits are used (Bits 7 to 5). Bit 4
137 The values in this table have to be shifted 5 bits to the
138 left and or'd with $1f (this sets the lower 5 bits).
142 about 30ns to the clocks on the Zorro bus, that's why the
143 values are no multiple of 71. One clock-cycle is 71ns long
144 (exactly 70,5 at 14,18 Mhz on PAL systems).
147 497ns Select (7 clock cycles) , IOR/IOW after 172ns (2 clock cycles)
152 639ns Select (9 clock cycles), IOR/IOW after 243ns (3 clock cycles)
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dgpmc-eth.txt29 - gpmc,cs-on-ns: Chip-select assertion time
30 - gpmc,cs-rd-off-ns: Chip-select de-assertion time for reads
31 - gpmc,cs-wr-off-ns: Chip-select de-assertion time for writes
32 - gpmc,oe-on-ns: Output-enable assertion time
33 - gpmc,oe-off-ns: Output-enable de-assertion time
34 - gpmc,we-on-ns: Write-enable assertion time
35 - gpmc,we-off-ns: Write-enable de-assertion time
36 - gpmc,access-ns: Start cycle to first data capture (read access)
37 - gpmc,rd-cycle-ns: Total read cycle time
38 - gpmc,wr-cycle-ns: Total write cycle time
[all …]
/OK3568_Linux_fs/kernel/drivers/pcmcia/
H A Dsoc_common.h72 #define SOC_STAT_VS2 5 /* Voltage sense 2 */
182 * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
183 * a minimum value of 165ns, as well. Section 4.7.2 (describing
185 * minimum value of 150ns for a 250ns cycle time (for 5V operation;
186 * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V
188 * has a maximum value of 150ns for a 300ns cycle time (for 5V
189 * operation), or 300ns for a 600ns cycle time (for 3.3V operation).
193 * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
194 * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
195 * memory command width time is 300ns.
/OK3568_Linux_fs/kernel/tools/testing/selftests/net/
H A Dxfrm_policy.sh32 local ns=$1
36 local rnet=$5
39 …ip -net $ns xfrm policy add src $lnet dst $rnet dir out tmpl src $me dst $remote proto esp mode tu…
41 …ip -net $ns xfrm policy add src $rnet dst $lnet dir fwd tmpl src $remote dst $me proto esp mode tu…
45 local ns=$1
49 local rnet=$5
53 …ip -net $ns xfrm state add src $remote dst $me proto esp spi $spi_in enc aes $KEY_AES auth sha1 …
54 …ip -net $ns xfrm state add src $me dst $remote proto esp spi $spi_out enc aes $KEY_AES auth sha1 …
56 do_esp_policy $ns $me $remote $lnet $rnet
73 local ns=$1
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Domap4-duovero-parlor.dts137 ranges = <5 0 0x2c000000 0x1000000>; /* CS5 */
140 reg = <5 0 0xff>;
146 gpmc,cs-on-ns = <10>;
147 gpmc,cs-rd-off-ns = <50>;
148 gpmc,cs-wr-off-ns = <50>;
149 gpmc,adv-on-ns = <0>;
150 gpmc,adv-rd-off-ns = <10>;
151 gpmc,adv-wr-off-ns = <10>;
152 gpmc,oe-on-ns = <15>;
153 gpmc,oe-off-ns = <50>;
[all …]
H A Domap2430-sdp.dts36 ranges = <5 0 0x08000000 0x01000000>;
41 reg = <5 0x300 0xf>;
48 gpmc,cs-on-ns = <6>;
49 gpmc,cs-rd-off-ns = <187>;
50 gpmc,cs-wr-off-ns = <187>;
51 gpmc,adv-on-ns = <18>;
52 gpmc,adv-rd-off-ns = <48>;
53 gpmc,adv-wr-off-ns = <48>;
54 gpmc,oe-on-ns = <60>;
55 gpmc,oe-off-ns = <169>;
[all …]
H A Domap3-lilly-a83x.dtsi374 gpmc,wait-monitoring-ns = <0>;
376 gpmc,cs-on-ns = <0>;
377 gpmc,cs-rd-off-ns = <100>;
378 gpmc,cs-wr-off-ns = <100>;
379 gpmc,adv-on-ns = <0>;
380 gpmc,adv-rd-off-ns = <100>;
381 gpmc,adv-wr-off-ns = <100>;
382 gpmc,oe-on-ns = <5>;
383 gpmc,oe-off-ns = <75>;
384 gpmc,we-on-ns = <5>;
[all …]
H A Domap3-devkit8000-common.dtsi204 MATRIX_KEY(4, 5, KEY_RESERVED)
206 MATRIX_KEY(5, 5, KEY_VOLUMEDOWN)
233 gpmc,cs-on-ns = <0>;
234 gpmc,cs-rd-off-ns = <44>;
235 gpmc,cs-wr-off-ns = <44>;
236 gpmc,adv-on-ns = <6>;
237 gpmc,adv-rd-off-ns = <34>;
238 gpmc,adv-wr-off-ns = <44>;
239 gpmc,we-off-ns = <40>;
240 gpmc,oe-off-ns = <54>;
[all …]
H A Domap3-ldp.dts33 gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; /* gpio101 */
112 gpmc,cs-on-ns = <0>;
113 gpmc,cs-rd-off-ns = <44>;
114 gpmc,cs-wr-off-ns = <44>;
115 gpmc,adv-on-ns = <6>;
116 gpmc,adv-rd-off-ns = <34>;
117 gpmc,adv-wr-off-ns = <44>;
118 gpmc,we-off-ns = <40>;
119 gpmc,oe-off-ns = <54>;
120 gpmc,access-ns = <64>;
[all …]
H A Domap3-n900.dts86 gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
572 ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
587 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
686 led@5 {
687 reg = <5>;
915 gpmc,cs-on-ns = <0>;
916 gpmc,cs-rd-off-ns = <102>;
917 gpmc,cs-wr-off-ns = <102>;
918 gpmc,adv-on-ns = <0>;
919 gpmc,adv-rd-off-ns = <12>;
[all …]
H A Dam335x-nano.dts29 gpios = <&gpio1 5 0>;
261 gpmc,cs-on-ns = <0>;
262 gpmc,cs-rd-off-ns = <160>;
263 gpmc,cs-wr-off-ns = <160>;
264 gpmc,adv-on-ns = <10>;
265 gpmc,adv-rd-off-ns = <30>;
266 gpmc,adv-wr-off-ns = <30>;
267 gpmc,oe-on-ns = <40>;
268 gpmc,oe-off-ns = <160>;
269 gpmc,we-on-ns = <40>;
[all …]
H A Domap-gpmc-smsc911x.dtsi30 gpmc,cs-on-ns = <5>;
31 gpmc,cs-rd-off-ns = <150>;
32 gpmc,cs-wr-off-ns = <150>;
33 gpmc,adv-on-ns = <0>;
34 gpmc,adv-rd-off-ns = <15>;
35 gpmc,adv-wr-off-ns = <40>;
36 gpmc,oe-on-ns = <45>;
37 gpmc,oe-off-ns = <140>;
38 gpmc,we-on-ns = <45>;
39 gpmc,we-off-ns = <140>;
[all …]
H A Domap3-overo-tobiduo-common.dtsi16 reg = <5 0 0xff>;
26 gpmc,cs-on-ns = <0>;
27 gpmc,cs-rd-off-ns = <42>;
28 gpmc,cs-wr-off-ns = <36>;
29 gpmc,adv-on-ns = <6>;
30 gpmc,adv-rd-off-ns = <12>;
31 gpmc,adv-wr-off-ns = <12>;
32 gpmc,oe-on-ns = <0>;
33 gpmc,oe-off-ns = <42>;
34 gpmc,we-on-ns = <0>;
[all …]
H A Ddra7-evm.dts78 gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>;
395 pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev11_conf>;
413 pinctrl-5 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
426 pinctrl-5 = <&mmc4_pins_sdr12 &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>;
460 gpmc,cs-on-ns = <0>;
461 gpmc,cs-rd-off-ns = <80>;
462 gpmc,cs-wr-off-ns = <80>;
463 gpmc,adv-on-ns = <0>;
464 gpmc,adv-rd-off-ns = <60>;
465 gpmc,adv-wr-off-ns = <60>;
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Duniphier-ld20.dtsi85 clock-latency-ns = <300>;
89 clock-latency-ns = <300>;
93 clock-latency-ns = <300>;
97 clock-latency-ns = <300>;
101 clock-latency-ns = <300>;
105 clock-latency-ns = <300>;
109 clock-latency-ns = <300>;
113 clock-latency-ns = <300>;
123 clock-latency-ns = <300>;
127 clock-latency-ns = <300>;
[all …]
H A Drk3288-veyron.dtsi35 0 1 2 3 4 5 6 7
91 gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
118 rockchip,hp-det-gpios = <&gpio6 5 GPIO_ACTIVE_HIGH>;
155 vcc_5v: vcc-5v {
297 cd-gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
320 i2c-scl-falling-time-ns = <50>; /* 2.5ns measured */
321 i2c-scl-rising-time-ns = <100>; /* 45ns measured */
466 i2c-scl-falling-time-ns = <50>; /* 2.5ns measured */
467 i2c-scl-rising-time-ns = <100>; /* 40ns measured */
481 i2c-scl-falling-time-ns = <50>; /* 10ns measured */
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-omap3/
H A Dmem.h42 #define SDP_3430_SDRC_RFR_CTRL_133MHz 0x0003de01 /* 7.8us/7.5ns - 50=0x3de */
43 #define SDP_3430_SDRC_RFR_CTRL_165MHz 0x0004e201 /* 7.8us/6ns - 50=0x4e2 */
44 #define SDP_3430_SDRC_RFR_CTRL_200MHz 0x0005e601 /* 7.8us/5ns - 50=0x5e6 */
100 #define V_MCFG_CASWIDTH(caswidth) (((caswidth)-5) << 20) /* 20:22 */
111 /* Hynix part of Overo (165MHz optimized) 6.06ns */
163 /* Infineon part of 3430SDP (165MHz optimized) 6.06ns */
189 /* Micron part of 3430 EVM (165MHz optimized) 6.06ns */
209 #define MICRON_TXP_165 5 /* 25/6 = 4.1 => ~5 */
226 /* Micron part (200MHz optimized) 5 ns */
252 /* Samsung K4X51163PG - FGC6 (165MHz optimized) 6.06ns - from 2010.90 src */
[all …]
/OK3568_Linux_fs/kernel/ipc/
H A Dmsg.c97 #define SEARCH_NUMBER 5
99 #define msg_ids(ns) ((ns)->ids[IPC_MSG_IDS]) argument
101 static inline struct msg_queue *msq_obtain_object(struct ipc_namespace *ns, int id) in msq_obtain_object() argument
103 struct kern_ipc_perm *ipcp = ipc_obtain_object_idr(&msg_ids(ns), id); in msq_obtain_object()
111 static inline struct msg_queue *msq_obtain_object_check(struct ipc_namespace *ns, in msq_obtain_object_check() argument
114 struct kern_ipc_perm *ipcp = ipc_obtain_object_check(&msg_ids(ns), id); in msq_obtain_object_check()
122 static inline void msg_rmid(struct ipc_namespace *ns, struct msg_queue *s) in msg_rmid() argument
124 ipc_rmid(&msg_ids(ns), &s->q_perm); in msg_rmid()
138 * @ns: namespace
143 static int newque(struct ipc_namespace *ns, struct ipc_params *params) in newque() argument
[all …]
H A Dshm.c76 struct ipc_namespace *ns; member
85 struct ipc_namespace *ns; member
95 #define shm_ids(ns) ((ns)->ids[IPC_SHM_IDS]) argument
103 static void shm_destroy(struct ipc_namespace *ns, struct shmid_kernel *shp);
108 void shm_init_ns(struct ipc_namespace *ns) in shm_init_ns() argument
110 ns->shm_ctlmax = SHMMAX; in shm_init_ns()
111 ns->shm_ctlall = SHMALL; in shm_init_ns()
112 ns->shm_ctlmni = SHMMNI; in shm_init_ns()
113 ns->shm_rmid_forced = 0; in shm_init_ns()
114 ns->shm_tot = 0; in shm_init_ns()
[all …]
/OK3568_Linux_fs/u-boot/board/keymile/km_arm/
H A Dkwbimage_256M8_1.cfg25 # bit 15-12: 2, MPPSel3 SPI_MISO (1=NF_IO[5])
55 # bit 5-3: 3, Reserved
107 # bit 5: 0, clk is driven during self refresh, we don't care for APX
115 # bit 23-20: 5, recommended value for CL=4 and STARTBURST_DEL disabled bit31=0
121 # bit 3-0: 0xe, TRAS = 45ns -> 15 clk cycles
122 # bit 7-4: 0x4, TRCD = 15ns -> 5 clk cycles
123 # bit 11-8: 0x4, TRP = 15ns -> 5 clk cycles
124 # bit 15-12: 0x4, TWR = 15ns -> 5 clk cycles
125 # bit 19-16: 0x2, TWTR = 7,5ns -> 3 clk cycles
128 # bit 27-24: 0x2, TRRD = 7,5ns -> 3 clk cycles
[all …]
H A Dkwbimage_128M16_1.cfg23 # bit 15-12: 2, MPPSel3 SPI_SO (1=NF_IO[5])
53 # bit 5-3: 3, Reserved
105 # bit 5: 0, clk is driven during self refresh, we don't care for APX
113 # bit 23-20: 5, recommended value for CL=4 and STARTBURST_DEL disabled bit31=0
119 # bit 3-0: 0xE, TRAS, 15 clk (45 ns)
120 # bit 7-4: 0x4, TRCD, 5 clk (15 ns)
121 # bit 11-8: 0x4, TRP, 5 clk (15 ns)
122 # bit 15-12: 0x4, TWR, 5 clk (15 ns)
123 # bit 19-16: 0x2, TWTR, 3 clk (7.5 ns)
126 # bit 27-24: 0x3, TRRD, 4 clk (10 ns)
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mips/cavium/
H A Dbootbus.txt32 - cavium,t-adr: A cell specifying the ADR timing (in nS).
34 - cavium,t-ce: A cell specifying the CE timing (in nS).
36 - cavium,t-oe: A cell specifying the OE timing (in nS).
38 - cavium,t-we: A cell specifying the WE timing (in nS).
40 - cavium,t-rd-hld: A cell specifying the RD_HLD timing (in nS).
42 - cavium,t-wr-hld: A cell specifying the WR_HLD timing (in nS).
44 - cavium,t-pause: A cell specifying the PAUSE timing (in nS).
46 - cavium,t-wait: A cell specifying the WAIT timing (in nS).
48 - cavium,t-page: A cell specifying the PAGE timing (in nS).
50 - cavium,t-rd-dly: A cell specifying the RD_DLY timing (in nS).
[all …]
/OK3568_Linux_fs/kernel/drivers/i2c/busses/
H A Di2c-stm32f4.c51 #define STM32F4_I2C_CR2_FREQ_MASK GENMASK(5, 0)
88 #define STM32F4_I2C_TRISE_VALUE_MASK GENMASK(5, 0)
200 * In standard mode, the maximum allowed SCL rise time is 1000 ns. in stm32f4_i2c_set_rise_time()
201 * If, in the I2C_CR2 register, the value of FREQ[5:0] bits is equal to in stm32f4_i2c_set_rise_time()
202 * 0x08 so period = 125 ns therefore the TRISE[5:0] bits must be in stm32f4_i2c_set_rise_time()
203 * programmed with 0x9. (1000 ns / 125 ns + 1) in stm32f4_i2c_set_rise_time()
204 * So, for I2C standard mode TRISE = FREQ[5:0] + 1 in stm32f4_i2c_set_rise_time()
206 * In fast mode, the maximum allowed SCL rise time is 300 ns. in stm32f4_i2c_set_rise_time()
207 * If, in the I2C_CR2 register, the value of FREQ[5:0] bits is equal to in stm32f4_i2c_set_rise_time()
208 * 0x08 so period = 125 ns therefore the TRISE[5:0] bits must be in stm32f4_i2c_set_rise_time()
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/comedi/drivers/
H A Ddt2811.c25 * [5] - D/A 1 range (deprecated, see below)
52 #define DT2811_ADCSR_ADBUSY BIT(5) /* r 1=A/D busy */
75 #define DT2811_OSC_BASE 1666 /* 600 kHz = 1666.6667ns */
86 * 5 5 120 kHz 5 100000
91 1, 10, 2, 3, 4, 5, 6, 12
102 * -5V to +5V In Out
104 * 0V to +5V Out In
111 BIP_RANGE(5), /* range 0: gain=1 */
121 UNI_RANGE(5), /* range 0+8: gain=1 */
130 BIP_RANGE(5), /* range 0: gain=1 */
[all …]

12345678910>>...44