Searched +full:5 +full:p49v5923 (Results 1 – 4 of 4) sorted by relevance
| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ |
| H A D | idt,versaclock5.yaml | 7 title: Binding for IDT VersaClock 5 and 6 programmable I2C clock generators 10 The IDT VersaClock 5 and VersaClock 6 are programmable I2C 16 - 5P49V5923: 21 - 5P49V5933: 39 - idt,5p49v5923 40 - idt,5p49v5925 41 - idt,5p49v5933 42 - idt,5p49v5935 43 - idt,5p49v6901 44 - idt,5p49v6965 [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/renesas/ |
| H A D | salvator-x.dtsi | 23 compatible = "idt,5p49v5923";
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| H A D | hihope-common.dtsi | 188 compatible = "idt,5p49v5923"; 321 interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
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| /OK3568_Linux_fs/kernel/drivers/clk/ |
| H A D | clk-versaclock5.c | 3 * Driver for IDT Versaclock 5 96 #define VC5_CLK_OUTPUT_CFG0_CFG_SHIFT 5 124 #define VC5_GLOBAL_REGISTER_GLOBAL_RESET BIT(5) 135 #define VC5_MAX_CLK_OUT_NUM 5 420 u8 fb[5]; in vc5_pll_recalc_rate() 422 regmap_bulk_read(vc5->regmap, VC5_FEEDBACK_INT_DIV, fb, 5); in vc5_pll_recalc_rate() 464 u8 fb[5]; in vc5_pll_set_rate() 472 return regmap_bulk_write(vc5->regmap, VC5_FEEDBACK_INT_DIV, fb, 5); in vc5_pll_set_rate() 1097 .clk_out_cnt = 5, 1111 .clk_out_cnt = 5, [all …]
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