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/OK3568_Linux_fs/kernel/drivers/media/i2c/nvp6158_drv/
H A Dnvp6158_video.c1 // SPDX-License-Identifier: GPL-2.0
26 #define AHD_720P30_Detect_Count 1 //1:1time 0:2time check //2020-12-16
31 extern int nvp6158_chip_id[4];
33 extern unsigned int nvp6158_iic_addr[4];
45 void nvp6158_dump_reg( unsigned char ch, unsigned char bank ) in nvp6158_dump_reg() argument
50 printk("***************IIC ADDR 0x%02x - CH[%02d] *****************\r\n", in nvp6158_dump_reg()
51 nvp6158_iic_addr[ch/4], ch ); in nvp6158_dump_reg()
53 nvp6158_iic_addr[ch/4], bank ); in nvp6158_dump_reg()
54 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0xFF, bank ); in nvp6158_dump_reg()
66 tmp = gpio_i2c_read(nvp6158_iic_addr[ch / 4], (i << 4) | j); in nvp6158_dump_reg()
[all …]
H A Dnvp6158_coax_protocol.c1 // SPDX-License-Identifier: GPL-2.0
23 extern unsigned int nvp6158_iic_addr[4];
30 * 1. Up stream initialize - nvp6158_coax_tx_init
31 * 2. Fill upstream data & Send - nvp6158_coax_tx_16bit_init
46 * (3x0C) tx_zero_length : Only CVI 4M
104 cmd_cnt = __NC_VD_COAX_Command_Each_Copy(Dst, pCMD->sd); in __NC_VD_COAX_Command_Copy()
109 cmd_cnt = __NC_VD_COAX_Command_Each_Copy(Dst, pCMD->ahd_4_5m); in __NC_VD_COAX_Command_Copy()
110 //cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->ahd_4_5m ); in __NC_VD_COAX_Command_Copy()
112 //cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->ahd_4_5m ); in __NC_VD_COAX_Command_Copy()
114 cmd_cnt = __NC_VD_COAX_Command_Each_Copy(Dst, pCMD->ahd_8bit); in __NC_VD_COAX_Command_Copy()
[all …]
H A Dnvp6158_video_eq.c1 // SPDX-License-Identifier: GPL-2.0
25 extern unsigned int nvp6158_iic_addr[4];
26 extern int nvp6158_chip_id[4];
30 * Argurments : Ch(channel), pDistance(distance structure)
35 CABLE_DISTANCE NVP6158_NC_VD_MANUAL_CABLE_DISTANCE_Get (unsigned char Ch, video_input_cable_dist *p… in NVP6158_NC_VD_MANUAL_CABLE_DISTANCE_Get() argument
44 if((nvp6158_chip_id[Ch/4] == NVP6168C_R0_ID) || (nvp6158_chip_id[Ch/4] == NVP6168_R0_ID)) in NVP6158_NC_VD_MANUAL_CABLE_DISTANCE_Get()
59 if((nvp6158_chip_id[Ch/4] == NVP6168C_R0_ID) || (nvp6158_chip_id[Ch/4] == NVP6168_R0_ID)) in NVP6158_NC_VD_MANUAL_CABLE_DISTANCE_Get()
64 sGetDist[ pDistance->dist ]++; in NVP6158_NC_VD_MANUAL_CABLE_DISTANCE_Get()
87 // return (CABLE_DISTANCE)pDistance->Dist; in NVP6158_NC_VD_MANUAL_CABLE_DISTANCE_Get()
97 gpio_i2c_write(nvp6158_iic_addr[ps_eq_info->devnum], 0xFF, 0x00); in nvp6158_IsChAlive()
[all …]
H A Dnvp6158_video_auto_detect.c1 // SPDX-License-Identifier: GPL-2.0
25 extern int nvp6158_chip_id[4];
26 extern unsigned int nvp6158_iic_addr[4];
135 NC_VIVO_CH_FORMATDEF NVP6158_NC_VD_AUTO_VFCtoFMTDEF(unsigned char ch, unsigned char VFC) in NVP6158_NC_VD_AUTO_VFCtoFMTDEF() argument
137 if((nvp6158_chip_id[ch/4] == NVP6168C_R0_ID) || in NVP6158_NC_VD_AUTO_VFCtoFMTDEF()
138 (nvp6158_chip_id[ch/4] == NVP6168_R0_ID)) { in NVP6158_NC_VD_AUTO_VFCtoFMTDEF()
141 if(nvp6158_det_mode[ch] == NVP6158_DET_MODE_AUTO) in NVP6158_NC_VD_AUTO_VFCtoFMTDEF()
143 else if(nvp6158_det_mode[ch] == NVP6158_DET_MODE_CVI) in NVP6158_NC_VD_AUTO_VFCtoFMTDEF()
145 else if(nvp6158_det_mode[ch] == NVP6158_DET_MODE_TVI) in NVP6158_NC_VD_AUTO_VFCtoFMTDEF()
162 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x01); in _nvp6158_video_input_auto_detect_vafe_set()
[all …]
H A Dnvp6158_dev.c1 // SPDX-License-Identifier: GPL-2.0
55 #include <linux/i2c-dev.h>
117 //int ch; in nvp6158_kernel_thread()
122 unsigned char ch = 0; in nvp6158_kernel_thread() local
129 ch = ch % (nvp6158_cnt*4); in nvp6158_kernel_thread()
132 nvp6158_video_fmt_det(ch, &s_nvp6158_vfmts); in nvp6158_kernel_thread()
133 curfmt = s_nvp6158_vfmts.curvideofmt[ch]; in nvp6158_kernel_thread()
134 prefmt = s_nvp6158_vfmts.prevideofmt[ch]; in nvp6158_kernel_thread()
135 chvloss = s_nvp6158_vfmts.curvideoloss[ch]; in nvp6158_kernel_thread()
136 …//printk(">>>>>>%s CH[%d] chvloss = %d curfmt = %x prefmt = %x\n", __func__, ch, chvloss, curfmt, … in nvp6158_kernel_thread()
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H A Dnvp6158_drv.c1 // SPDX-License-Identifier: GPL-2.0
55 #include <linux/i2c-dev.h>
96 int nvp6158_chip_id[4];
97 int nvp6158_rev_id[4];
100 unsigned int nvp6158_iic_addr[4] = {0x60, 0x62, 0x64, 0x66};
136 * Return value : (total chip count - 1) or -1(not found any chip)
143 int ret = -1; in nvp6158_check_decoder_count()
145 /* check Device ID of maxium 4chip on the slave address, in nvp6158_check_decoder_count()
147 for(chip = 0; chip < 4; chip ++) { in nvp6158_check_decoder_count()
188 unsigned char ch = 0; in nvp6158_video_decoder_init() local
[all …]
/OK3568_Linux_fs/kernel/drivers/media/i2c/jaguar1_drv/
H A Djaguar1_coax_protocol.c1 // SPDX-License-Identifier: GPL-2.0
31 * 1. Up stream initialize - coax_tx_init
32 * 2. Fill upstream data & Send - coax_tx_cmd_send
47 * (3x0C) tx_zero_length : Only CVI 4M
111 cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->sd ); in __NC_VD_COAX_Command_Copy()
116 cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->ahd_4_5m ); in __NC_VD_COAX_Command_Copy()
118 cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->ahd_4_5m ); in __NC_VD_COAX_Command_Copy()
120 cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->ahd_8bit ); in __NC_VD_COAX_Command_Copy()
124 cmd_cnt= __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->cvi_cmd ); in __NC_VD_COAX_Command_Copy()
129 cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->tvi_v2_0 ); in __NC_VD_COAX_Command_Copy()
[all …]
H A Djaguar1_reg_set_def.h1 /* SPDX-License-Identifier: GPL-2.0 */
30 #define REG_SET_0x00_0_8_EACH_SET(ch, val) vd_register_set ( 0 , 0x00 , 0x00 + ch , val , 0 , 8 ) argument
33 #define REG_SET_0x18_0_8_EX_CBAR_ON(ch, val) vd_register_set ( 0 , 0x00 , 0x18 + ch , val , 0 , 8 ) argument
34 #define REG_SET_5x00_0_8_CMP(ch, val) vd_register_set ( 0 , 0x05 + ch , 0x00 , val , 0 , 8 ) argument
35 #define REG_SET_5x01_0_8_CML(ch, val) vd_register_set ( 0 , 0x05 + ch , 0x01 , val , 0 , 8 ) argument
36 #define REG_SET_5x1D_0_8_AFE(ch, val) vd_register_set ( 0 , 0x05 + ch , 0x1d , val , 0 , 8 ) argument
37 #define REG_SET_5x92_0_8_PWM(ch, val) vd_register_set ( 0 , 0x05 + ch , 0x92 , val , 0 , 8 ) argument
40 #define REG_SET_1xEC_0_8_yc_merge(ch, val) vd_register_set ( 0 , 0x01 , 0xec + ch , val , 0 , 8 ) argument
43 #define REG_SET_1xC8_0_8_out_sel(ch, val) vd_register_set ( 0 , 0x01 , 0xc8 + ch , val , 0 , 8 ) argument
49 #define REG_SET_1x7C_0_1_clk_auto_1(ch, val) vd_register_set ( 0 , 0x01 , 0x7c , val , 0 , 1 ) argument
[all …]
H A Djaguar1_video.c1 // SPDX-License-Identifier: GPL-2.0
126 static void vd_vi_manual_set_seq1( unsigned char dev, unsigned char ch, void *p_param ) in vd_vi_manual_set_seq1() argument
130 *| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | in vd_vi_manual_set_seq1()
135 *| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | in vd_vi_manual_set_seq1()
140 *| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | in vd_vi_manual_set_seq1()
145 *| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | in vd_vi_manual_set_seq1()
149 * Bank 13x30 ~ 33 - SK_ing in vd_vi_manual_set_seq1()
150 *| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | in vd_vi_manual_set_seq1()
155 *| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | in vd_vi_manual_set_seq1()
163 if(ch == 0) in vd_vi_manual_set_seq1()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/imx/dcss/
H A Ddcss-scaler.c1 // SPDX-License-Identifier: GPL-2.0
11 #include "dcss-dev.h"
15 #define REPEAT_EN BIT(4)
32 #define Y_UV_BYTE_SWAP BIT(4)
38 #define CHR_BIT_DEPTH_POS 4
39 #define CHR_BIT_DEPTH_MASK GENMASK(5, 4)
88 struct dcss_scaler_ch ch[3]; member
94 #define PSC_BITS_FOR_PHASE 4
101 #define PSC_PHASE_MASK (PSC_NUM_PHASES - 1)
103 #define PSC_Q_ROUND_OFFSET (1 << (PSC_Q_FRACTION - 1))
[all …]
H A Ddcss-dpr.c1 // SPDX-License-Identifier: GPL-2.0
9 #include "dcss-dev.h"
16 #define SW_SHADOW_LOAD_SEL BIT(4)
25 #define DPR2RTR_YRGB_FIFO_OVFL BIT(4)
33 #define TILE_TYPE_MASK GENMASK(4, 2)
53 #define ROT_FLIP_ORDER_EN BIT(4)
73 #define THRES_LOW_POS 4
74 #define THRES_LOW_MASK GENMASK(6, 4)
118 struct dcss_dpr_ch ch[3]; member
121 static void dcss_dpr_write(struct dcss_dpr_ch *ch, u32 val, u32 ofs) in dcss_dpr_write() argument
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3308bs-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /* default for rk3308 and 4ma for rk3308bs */
8 pcfg_pull_none_0_4ma: pcfg-pull-none-0-4ma {
9 bias-disable;
10 drive-strength-s = <4>;
12 pcfg_pull_none_0_4ma_smt: pcfg-pull-none-0-4ma-smt {
13 bias-disable;
14 drive-strength-s = <4>;
15 input-schmitt-enable;
17 pcfg_pull_up_0_4ma: pcfg-pull-up-0-4ma {
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/berlin/
H A Dberlin2-avpll.c1 // SPDX-License-Identifier: GPL-2.0
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
8 #include <linux/clk-provider.h>
15 #include "berlin2-avpll.h"
19 * VCO with 8 channels each, channel 8 is the odd-one-out and does
34 /* BG2/BG2CDs VCO_B has an additional shift of 4 for its VCO_CTRL0 reg */
67 #define VCO_SPEED_1G86_2G00 VCO_SPEED(4)
118 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_is_enabled()
119 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_is_enabled()
120 reg >>= 4; in berlin2_avpll_vco_is_enabled()
[all …]
/OK3568_Linux_fs/kernel/drivers/clocksource/
H A Dsh_mtu2.c1 // SPDX-License-Identifier: GPL-2.0
3 * SuperH Timer Support - MTU2
55 #define TSTR -1 /* shared register */
60 #define TSR 4 /* channel register */
75 /* Values 4 to 7 are channel-dependent */
80 #define TCR_TPSC_CH0_TCLKA (4 << 0)
84 #define TCR_TPSC_CH1_TCLKA (4 << 0)
88 #define TCR_TPSC_CH2_TCLKA (4 << 0)
92 #define TCR_TPSC_CH34_P256 (4 << 0)
100 #define TMDR_BFA (1 << 4)
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dsdram_common.h1 /* SPDX-License-Identifier: GPL-2.0+ */
184 u32 reserved[4];
219 u32 ddr4_dq_map[4];
225 /* 3:8bank, 2:4bank */
251 /* store result of read and write training, for ddr_dq_eye tool in u-boot */
254 #define FSP_NUM 4
255 #define CS_NUM 4
310 * [5:4] cs1_row_ch0
316 #define SYS_REG_ENC_ROW_3_4(n, ch) ((n) << (30 + (ch))) argument
317 #define SYS_REG_DEC_ROW_3_4(n, ch) (((n) >> (30 + (ch))) & 0x1) argument
[all …]
/OK3568_Linux_fs/buildroot/dl/sox/git/src/
H A Dima_rw.c1 /* libSoX ima_rw.c -- codex utilities for WAV_FORMAT_IMA_ADPCM
16 * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
44 #define imaStateAdjust(c) (((c)<4)? -1:(2*(c)-6))
45 /* +0 - +3, decrease step size */
46 /* +4 - +7, increase step size */
47 /* -0 - -3, decrease step size */
48 /* -4 - -7, increase step size */
66 unsigned ch, /* channel number to decode, REQUIRE 0 <= ch < chans */ in ImaExpandS() argument
79 ip = ibuff + 4*ch; /* input pointer to 4-byte block state-initializer */ in ImaExpandS()
80 i_inc = 4*(chans-1); /* amount by which to incr ip after each 4-byte read */ in ImaExpandS()
[all …]
/OK3568_Linux_fs/kernel/sound/soc/codecs/
H A Drk3308_codec.h2 * rk3308_codec.h -- RK3308 ALSA Soc Audio Driver
77 #define ACODEC_DAC_HPDET_STATUS 0x38 /* REG 0x0e, Read-only */
83 #define ACODEC_S_DAC_HPDET_STATUS 0x34 /* REG 0x0d, Read-only */
134 #define RK3308_ADC_DIG_OFFSET(ch) ((ch & 0x3) * 0xc0 + 0x0) argument
136 #define RK3308_ADC_DIG_CON01(ch) (RK3308_ADC_DIG_OFFSET(ch) + ACODEC_ADC_I2S_CTL0) argument
137 #define RK3308_ADC_DIG_CON02(ch) (RK3308_ADC_DIG_OFFSET(ch) + ACODEC_ADC_I2S_CTL1) argument
138 #define RK3308_ADC_DIG_CON03(ch) (RK3308_ADC_DIG_OFFSET(ch) + ACODEC_ADC_BIST_MODE_SEL) argument
139 #define RK3308_ADC_DIG_CON04(ch) (RK3308_ADC_DIG_OFFSET(ch) + ACODEC_ADC_HPF_PATH) argument
140 #define RK3308BS_ADC_DIG_CON05(ch) (RK3308_ADC_DIG_OFFSET(ch) + ACODEC_S_ADC_DIG_VOL_CON_L) argument
141 #define RK3308BS_ADC_DIG_CON06(ch) (RK3308_ADC_DIG_OFFSET(ch) + ACODEC_S_ADC_DIG_VOL_CON_R) argument
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/most/dim2/
H A Dhal.c1 // SPDX-License-Identifier: GPL-2.0
3 * hal.c - DIM2 HAL implementation
6 * Copyright (C) 2015-2016, Microchip Technology Germany II GmbH & Co. KG
25 * Number of 32-bit units for DBR map.
29 * 4: block size is 128, max allocation is 4K
37 /* -------------------------------------------------------------------------- */
50 /* -------------------------------------------------------------------------- */
64 /* -------------------------------------------------------------------------- */
86 /* -------------------------------------------------------------------------- */
126 mask <<= mask_size - 1; in alloc_dbr()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/ipu-v3/
H A Dipu-prv.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 2005-2009 Freescale Semiconductor, Inc.
16 #include <video/imx-ipu-v3.h>
52 #define IPU_CHA_DB_MODE_SEL(ch) IPU_CM_REG(0x0150 + 4 * ((ch) / 32)) argument
53 #define IPU_ALT_CHA_DB_MODE_SEL(ch) IPU_CM_REG(0x0168 + 4 * ((ch) / 32)) argument
54 #define IPU_CHA_CUR_BUF(ch) IPU_CM_REG(0x023C + 4 * ((ch) / 32)) argument
60 #define IPU_CHA_BUF0_RDY(ch) IPU_CM_REG(0x0268 + 4 * ((ch) / 32)) argument
61 #define IPU_CHA_BUF1_RDY(ch) IPU_CM_REG(0x0270 + 4 * ((ch) / 32)) argument
62 #define IPU_CHA_BUF2_RDY(ch) IPU_CM_REG(0x0288 + 4 * ((ch) / 32)) argument
63 #define IPU_ALT_CHA_BUF0_RDY(ch) IPU_CM_REG(0x0278 + 4 * ((ch) / 32)) argument
[all …]
H A Dipu-cpmem.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright 2005-2012 Freescale Semiconductor, Inc. All Rights Reserved.
11 #include "ipu-prv.h"
34 #define IPU_FIELD_IOX IPU_CPMEM_WORD(0, 90, 4)
74 #define IPU_FIELD_PFS IPU_CPMEM_WORD(1, 85, 4)
93 ipu_get_cpmem(struct ipuv3_channel *ch) in ipu_get_cpmem() argument
95 struct ipu_cpmem *cpmem = ch->ipu->cpmem_priv; in ipu_get_cpmem()
97 return cpmem->base + ch->num; in ipu_get_cpmem()
100 static void ipu_ch_param_write_field(struct ipuv3_channel *ch, u32 wbs, u32 v) in ipu_ch_param_write_field() argument
102 struct ipu_ch_param __iomem *base = ipu_get_cpmem(ch); in ipu_ch_param_write_field()
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/OK3568_Linux_fs/external/rk_pcba_test/pcba_minui/
H A Dscript_parser.c22 #define LINE_ERROR -1
31 #define DATA_TYPE_GPIO 4
52 char ch; in __get_str2int() local
64 if (strncasecmp(src, "ower", 4) == 0) { in __get_str2int()
66 src += 4; in __get_str2int()
69 ch = *src++; in __get_str2int()
70 if (islower(ch)) in __get_str2int()
71 value[0] = ch - 'a' + 1; in __get_str2int()
72 else if (isupper(ch)) in __get_str2int()
73 value[0] = ch - 'A' + 1; in __get_str2int()
[all …]
/OK3568_Linux_fs/kernel/drivers/dma/
H A Dmoxart-dma.c14 #include <linux/dma-mapping.h>
31 #include "virt-dma.h"
33 #define APB_DMA_MAX_CHANNEL 4
36 #define REG_OFF_ADDRESS_DEST 4
45 #define APB_DMA_ERR_INT_STS BIT(4)
63 * 001: +1 (Burst=0), +4 (Burst=1)
65 * 011: +4 (Burst=0), +16 (Burst=1)
66 * 101: -1 (Burst=0), -4 (Burst=1)
67 * 110: -2 (Burst=0), -8 (Burst=1)
68 * 111: -4 (Burst=0), -16 (Burst=1)
[all …]
/OK3568_Linux_fs/u-boot/arch/x86/cpu/quark/
H A Dsmc.c8 * SPDX-License-Identifier: Intel
25 300000, /* 4Gb */
88 tck = t_ck[mrc_params->ddr_speed]; /* Clock in picoseconds */ in prog_ddr_timing_control()
89 tcl = mrc_params->params.cl; /* CAS latency in clocks */ in prog_ddr_timing_control()
92 tras = MCEIL(mrc_params->params.ras, tck); in prog_ddr_timing_control()
94 /* Per JEDEC: tWR=15000ps DDR2/3 from 800-1600 */ in prog_ddr_timing_control()
97 twtr = MCEIL(mrc_params->params.wtr, tck); in prog_ddr_timing_control()
98 trrd = MCEIL(mrc_params->params.rrd, tck); in prog_ddr_timing_control()
99 trtp = 4; /* Valid for 800 and 1066, use 5 for 1333 */ in prog_ddr_timing_control()
100 tfaw = MCEIL(mrc_params->params.faw, tck); in prog_ddr_timing_control()
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/OK3568_Linux_fs/kernel/arch/x86/crypto/
H A Dsha256-avx2-asm.S2 # Implement fast SHA-256 with AVX2 instructions. (x86_64)
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
41 # This code is described in an Intel White-Paper:
42 # "Fast SHA-256 Implementations on Intel Architecture Processors"
48 # This code schedules 2 blocks at a time, with 4 lanes per block
59 # Add reg to mem using reg-mem add and store
86 SHUF_00BA = %ymm10 # shuffle xBxA -> 00BA
87 SHUF_DC00 = %ymm12 # shuffle xDxC -> DC00
115 _XFER_SIZE = 2*64*4 # 2 blocks, 64 rounds, 4 bytes/round
[all …]
/OK3568_Linux_fs/kernel/drivers/media/pci/cx25821/
H A Dcx25821-core.c1 // SPDX-License-Identifier: GPL-2.0-or-later
15 #include "cx25821-sram.h"
16 #include "cx25821-video.h"
19 MODULE_AUTHOR("Shu Lin - Hiep Huynh");
26 static unsigned int card[] = {[0 ... (CX25821_MAXBOARDS - 1)] = UNSET };
320 [RISC_WRITECR >> 28] = 4, in cx25821_risc_decode()
332 for (i = ARRAY_SIZE(bits) - 1; i >= 0; i--) { in cx25821_risc_decode()
342 struct cx25821_i2c *bus = i2c_adap->algo_data; in i2c_slave_did_ack()
343 struct cx25821_dev *dev = bus->dev; in i2c_slave_did_ack()
344 return cx_read(bus->reg_stat) & 0x01; in i2c_slave_did_ack()
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