| /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/ |
| H A D | kuroboxHG.dts | 37 #size-cells = <0>; 41 reg = <0x0>; 44 bus-frequency = <0>; /* Fixed by bootloader */ 46 i-cache-size = <0x4000>; 47 d-cache-size = <0x4000>; 53 reg = <0x0 0x8000000>; 61 store-gathering = <0>; /* 0 == off, !0 == on */ 62 reg = <0x80000000 0x100000>; 63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */ 64 0xfc000000 0xfc000000 0x100000 /* EUMB */ [all …]
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| H A D | kuroboxHD.dts | 37 #size-cells = <0>; 41 reg = <0x0>; 44 bus-frequency = <0>; /* Fixed by bootloader */ 46 i-cache-size = <0x4000>; 47 d-cache-size = <0x4000>; 53 reg = <0x0 0x4000000>; 61 store-gathering = <0>; /* 0 == off, !0 == on */ 62 reg = <0x80000000 0x100000>; 63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */ 64 0xfc000000 0xfc000000 0x100000 /* EUMB */ [all …]
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| H A D | mvme5100.dts | 26 #size-cells = <0>; 30 reg = <0x0>; 44 reg = <0x0 0x20000000>; 51 ranges = <0x0 0xfef80000 0x10000>; 52 reg = <0xfef80000 0x10000>; 57 reg = <0x8000 0x80>; 68 reg = <0x8200 0x80>; 78 #address-cells = <0>; 82 reg = <0xf3f80000 0x40000>; 92 reg = <0xfec00000 0x400000>; [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sram/ |
| H A D | qcom,ocmem.yaml | 62 "-sram@[0-9a-f]+$": 81 reg = <0xfdd00000 0x2000>, 82 <0xfec00000 0x180000>; 93 ranges = <0 0xfec00000 0x100000>; 95 gmu-sram@0 { 96 reg = <0x0 0x100000>;
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/msm/ |
| H A D | gpu.txt | 50 reg = <0xfdb00000 0x10000>; 63 iommus = <&gpu_iommu 0>; 69 reg = <0xfdd00000 0x2000>, 70 <0xfec00000 0x180000>; 82 gpu_sram: gpu-sram@0 { 83 reg = <0x0 0x100000>; 84 ranges = <0 0 0xfec00000 0x100000>; 98 reg = <0x5000000 0x40000>, <0x509e000 0x10>; 108 iommus = <&adreno_smmu 0>;
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| /OK3568_Linux_fs/u-boot/arch/x86/include/asm/ |
| H A D | ioapic.h | 12 #define IO_APIC_ADDR 0xfec00000 15 #define IO_APIC_INDEX (IO_APIC_ADDR + 0x00) 16 #define IO_APIC_DATA (IO_APIC_ADDR + 0x10) 19 #define IO_APIC_ID 0x00 20 #define IO_APIC_VER 0x01
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| /OK3568_Linux_fs/kernel/arch/arm/mach-davinci/include/mach/ |
| H A D | hardware.h | 25 #define IO_PHYS UL(0x01c00000) 26 #define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */ 27 #define IO_SIZE 0x00400000
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/video/ |
| H A D | rockchip_dp.txt | 35 reg = <0x0 0xfec00000 0x0 0x100000>; 43 phys = <&tcphy0 0>, <&tcphy1 0>; 48 #size-cells = <0>;
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| /OK3568_Linux_fs/kernel/arch/powerpc/platforms/chrp/ |
| H A D | gg2.h | 23 #define GG2_PCI_MEM_BASE 0xc0000000 /* Peripheral memory space */ 24 #define GG2_ISA_MEM_BASE 0xf7000000 /* Peripheral memory alias */ 25 #define GG2_ISA_IO_BASE 0xf8000000 /* Peripheral I/O space */ 26 #define GG2_PCI_CONFIG_BASE 0xfec00000 /* PCI configuration space */ 27 #define GG2_INT_ACK_SPECIAL 0xfec80000 /* Interrupt acknowledge and */ 29 #define GG2_ROM_BASE0 0xff000000 /* ROM bank 0 */ 30 #define GG2_ROM_BASE1 0xff800000 /* ROM bank 1 */ 39 #define GG2_PCI_BUSNO 0x40 /* Bus number */ 40 #define GG2_PCI_SUBBUSNO 0x41 /* Subordinate bus number */ 41 #define GG2_PCI_DISCCTR 0x42 /* Disconnect counter */ [all …]
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| /OK3568_Linux_fs/kernel/arch/powerpc/sysdev/ |
| H A D | grackle.c | 18 #define GRACKLE_CFA(b, d, o) (0x80 | ((b) << 8) | ((d) << 16) \ 21 #define GRACKLE_PICR1_STG 0x00000040 22 #define GRACKLE_PICR1_LOOPSNOOP 0x00000010 30 out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8)); in grackle_set_stg() 34 out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8)); in grackle_set_stg() 43 out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8)); in grackle_set_loop_snoop() 47 out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8)); in grackle_set_loop_snoop() 54 setup_indirect_pci(hose, 0xfec00000, 0xfee00000, 0); in setup_grackle() 59 #if 0 /* Disabled for now, HW problems ??? */ in setup_grackle()
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| /OK3568_Linux_fs/kernel/arch/x86/kvm/ |
| H A D | ioapic.h | 14 #define IOAPIC_VERSION_ID 0x11 /* IOAPIC version */ 15 #define IOAPIC_EDGE_TRIG 0 18 #define IOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000 19 #define IOAPIC_MEM_LENGTH 0x100 22 #define IOAPIC_REG_SELECT 0x00 23 #define IOAPIC_REG_WINDOW 0x10 26 #define IOAPIC_REG_APIC_ID 0x00 /* x86 IOAPIC only */ 27 #define IOAPIC_REG_VERSION 0x01 28 #define IOAPIC_REG_ARB_ID 0x02 /* x86 IOAPIC only */ 31 #define IOAPIC_FIXED 0x0 [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/rockchip/ |
| H A D | cdn-dp-rockchip.txt | 39 reg = <0x0 0xfec00000 0x0 0x100000>; 53 #size-cells = <0>; 58 #size-cells = <0>; 62 #size-cells = <0>; 63 dp_in_vopb: endpoint@0 { 64 reg = <0>;
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| /OK3568_Linux_fs/kernel/arch/arm/mach-mv78xx0/ |
| H A D | mv78xx0.h | 20 * f0800000 PCIe #0 I/O space 32 * fee00000 f0800000 64K PCIe #0 I/O space 42 #define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000 43 #define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000 44 #define MV78XX0_CORE_REGS_VIRT_BASE IOMEM(0xfe400000) 45 #define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000 48 #define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20)) 51 #define MV78XX0_REGS_PHYS_BASE 0xf1000000 52 #define MV78XX0_REGS_VIRT_BASE IOMEM(0xfec00000) 55 #define MV78XX0_PCIE_MEM_PHYS_BASE 0xc0000000 [all …]
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| /OK3568_Linux_fs/kernel/arch/powerpc/platforms/embedded6xx/ |
| H A D | linkstation.c | 33 return 0; in declare_of_platform_devices() 49 " bus 0\n", dev); in linkstation_add_bridge() 54 hose->first_busno = bus_range ? bus_range[0] : 0; in linkstation_add_bridge() 55 hose->last_busno = bus_range ? bus_range[1] : 0xff; in linkstation_add_bridge() 56 setup_indirect_pci(hose, 0xfec00000, 0xfee00000, 0); in linkstation_add_bridge() 62 return 0; in linkstation_add_bridge() 85 mpic = mpic_alloc(NULL, 0, 0, 4, 0, " EPIC "); in linkstation_init_IRQ() 89 mpic_assign_isu(mpic, 0, mpic->paddr + 0x10200); in linkstation_init_IRQ() 92 mpic_assign_isu(mpic, 1, mpic->paddr + 0x11000); in linkstation_init_IRQ() 95 mpic_assign_isu(mpic, 2, mpic->paddr + 0x11100); in linkstation_init_IRQ() [all …]
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| H A D | mpc10x.h | 24 * Processor: 0x80000000 - 0x807fffff -> PCI I/O: 0x00000000 - 0x007fffff 25 * Processor: 0xc0000000 - 0xdfffffff -> PCI MEM: 0x00000000 - 0x1fffffff 26 * PCI MEM: 0x80000000 -> Processor System Memory: 0x00000000 29 * Processor: 0xfe000000 - 0xfebfffff -> PCI I/O: 0x00000000 - 0x00bfffff 30 * Processor: 0x80000000 - 0xbfffffff -> PCI MEM: 0x80000000 - 0xbfffffff 31 * PCI MEM: 0x00000000 -> Processor System Memory: 0x00000000 40 #define MPC10X_BRIDGE_8240 ((0x0003 << 16) | PCI_VENDOR_ID_MOTOROLA) 41 #define MPC10X_BRIDGE_107 ((0x0004 << 16) | PCI_VENDOR_ID_MOTOROLA) 42 #define MPC10X_BRIDGE_8245 ((0x0006 << 16) | PCI_VENDOR_ID_MOTOROLA) 49 #define MPC10X_MAPA_CNFG_ADDR 0x80000cf8 [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/mach-dove/ |
| H A D | dove.h | 19 * e0000000 @runtime 128M PCIe-0 Memory space 23 * f2000000 fee00000 1M PCIe-0 I/O space 27 #define DOVE_CESA_PHYS_BASE 0xc8000000 28 #define DOVE_CESA_VIRT_BASE IOMEM(0xfdb00000) 31 #define DOVE_PCIE0_MEM_PHYS_BASE 0xe0000000 34 #define DOVE_PCIE1_MEM_PHYS_BASE 0xe8000000 37 #define DOVE_BOOTROM_PHYS_BASE 0xf8000000 40 #define DOVE_SCRATCHPAD_PHYS_BASE 0xf0000000 41 #define DOVE_SCRATCHPAD_VIRT_BASE IOMEM(0xfdd00000) 44 #define DOVE_SB_REGS_PHYS_BASE 0xf1000000 [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/mach-orion5x/ |
| H A D | orion5x.h | 39 #define ORION5X_REGS_PHYS_BASE 0xf1000000 40 #define ORION5X_REGS_VIRT_BASE IOMEM(0xfec00000) 43 #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000 44 #define ORION5X_PCIE_IO_BUS_BASE 0x00000000 47 #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000 48 #define ORION5X_PCI_IO_BUS_BASE 0x00010000 51 #define ORION5X_SRAM_PHYS_BASE (0xf2200000) 55 #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 56 #define ORION5X_PCIE_WA_VIRT_BASE IOMEM(0xfd000000) 59 #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000 [all …]
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| /OK3568_Linux_fs/kernel/arch/x86/kernel/ |
| H A D | jailhouse.c | 47 if (boot_cpu_data.cpuid_level < 0 || in jailhouse_cpuid_base() 49 return 0; in jailhouse_cpuid_base() 51 return hypervisor_cpuid_base("Jailhouse\0\0\0", 0); in jailhouse_cpuid_base() 61 memset(now, 0, sizeof(*now)); in jailhouse_get_wallclock() 102 register_lapic_address(0xfee00000); in jailhouse_get_smp_config() 104 for (cpu = 0; cpu < setup_data.v1.num_cpus; cpu++) { in jailhouse_get_smp_config() 112 mp_register_ioapic(0, 0xfec00000, gsi_top, &ioapic_cfg); in jailhouse_get_smp_config() 138 if (pcibios_last_bus < 0) in jailhouse_pci_arch_init() 139 pcibios_last_bus = 0xff; in jailhouse_pci_arch_init() 143 pci_mmconfig_add(0, 0, pcibios_last_bus, in jailhouse_pci_arch_init() [all …]
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| /OK3568_Linux_fs/kernel/net/ipv6/ |
| H A D | addrconf_core.c | 42 st = addr->s6_addr32[0]; in __ipv6_addr_type() 47 if ((st & htonl(0xE0000000)) != htonl(0x00000000) && in __ipv6_addr_type() 48 (st & htonl(0xE0000000)) != htonl(0xE0000000)) in __ipv6_addr_type() 52 if ((st & htonl(0xFF000000)) == htonl(0xFF000000)) { in __ipv6_addr_type() 59 if ((st & htonl(0xFFC00000)) == htonl(0xFE800000)) in __ipv6_addr_type() 62 if ((st & htonl(0xFFC00000)) == htonl(0xFEC00000)) in __ipv6_addr_type() 65 if ((st & htonl(0xFE000000)) == htonl(0xFC000000)) in __ipv6_addr_type() 69 if ((addr->s6_addr32[0] | addr->s6_addr32[1]) == 0) { in __ipv6_addr_type() 70 if (addr->s6_addr32[2] == 0) { in __ipv6_addr_type() 71 if (addr->s6_addr32[3] == 0) in __ipv6_addr_type() [all …]
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/include/netinet/ |
| H A D | in.h | 42 IPPROTO_IP = 0, /* Dummy protocol for TCP. */ 101 instead of our own, otherwise 0. */ 105 IPPROTO_HOPOPTS = 0, /* IPv6 Hop-by-Hop options. */ 170 #define IN_CLASSA(a) ((((in_addr_t)(a)) & 0x80000000) == 0) 171 #define IN_CLASSA_NET 0xff000000 173 #define IN_CLASSA_HOST (0xffffffff & ~IN_CLASSA_NET) 176 #define IN_CLASSB(a) ((((in_addr_t)(a)) & 0xc0000000) == 0x80000000) 177 #define IN_CLASSB_NET 0xffff0000 179 #define IN_CLASSB_HOST (0xffffffff & ~IN_CLASSB_NET) 182 #define IN_CLASSC(a) ((((in_addr_t)(a)) & 0xe0000000) == 0xc0000000) [all …]
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/include/netinet/ |
| H A D | in.h | 42 IPPROTO_IP = 0, /* Dummy protocol for TCP. */ 101 instead of our own, otherwise 0. */ 105 IPPROTO_HOPOPTS = 0, /* IPv6 Hop-by-Hop options. */ 170 #define IN_CLASSA(a) ((((in_addr_t)(a)) & 0x80000000) == 0) 171 #define IN_CLASSA_NET 0xff000000 173 #define IN_CLASSA_HOST (0xffffffff & ~IN_CLASSA_NET) 176 #define IN_CLASSB(a) ((((in_addr_t)(a)) & 0xc0000000) == 0x80000000) 177 #define IN_CLASSB_NET 0xffff0000 179 #define IN_CLASSB_HOST (0xffffffff & ~IN_CLASSB_NET) 182 #define IN_CLASSC(a) ((((in_addr_t)(a)) & 0xe0000000) == 0xc0000000) [all …]
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| /OK3568_Linux_fs/kernel/arch/x86/platform/ce4100/ |
| H A D | falconfalls.dts | 16 #size-cells = <0>; 18 cpu@0 { 21 reg = <0>; 26 soc@0 { 36 reg = <0xfec00000 0x1000>; 41 reg = <0xfed00000 0x200>; 46 reg = <0xfee00000 0x1000>; 54 bus-range = <0 0>; 55 ranges = <0x2000000 0 0xbffff000 0xbffff000 0 0x1000 56 0x2000000 0 0xdffe0000 0xdffe0000 0 0x1000 [all …]
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| /OK3568_Linux_fs/kernel/arch/x86/include/asm/ |
| H A D | apicdef.h | 12 #define IO_APIC_DEFAULT_PHYS_BASE 0xfec00000 13 #define APIC_DEFAULT_PHYS_BASE 0xfee00000 21 #define APIC_ID 0x20 23 #define APIC_LVR 0x30 24 #define APIC_LVR_MASK 0xFF00FF 26 #define GET_APIC_VERSION(x) ((x) & 0xFFu) 27 #define GET_APIC_MAXLVT(x) (((x) >> 16) & 0xFFu) 29 # define APIC_INTEGRATED(x) ((x) & 0xF0u) 33 #define APIC_XAPIC(x) ((x) >= 0x14) 34 #define APIC_EXT_SPACE(x) ((x) & 0x80000000) [all …]
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| /OK3568_Linux_fs/u-boot/arch/x86/cpu/ivybridge/ |
| H A D | lpc.c | 25 #define NMI_OFF 0 27 #define ENABLE_ACPI_MODE_IN_COREBOOT 0 28 #define TEST_SMM_FLASH_LOCKDOWN 0 36 dm_pci_write_config8(pch, ACPI_CNTL, 0x80); in pch_enable_apic() 38 writel(0, IO_APIC_INDEX); in pch_enable_apic() 47 writel(0, IO_APIC_INDEX); in pch_enable_apic() 49 debug("PCH APIC ID = %x\n", (reg32 >> 24) & 0x0f); in pch_enable_apic() 56 for (i = 0; i < 3; i++) { in pch_enable_apic() 58 debug(" reg 0x%04x:", i); in pch_enable_apic() 60 debug(" 0x%08x\n", reg32); in pch_enable_apic() [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | rk1808.dtsi | 39 #size-cells = <0>; 41 cpu0: cpu@0 { 44 reg = <0x0 0x0>; 51 reg = <0x0 0x1>; 71 #clock-cells = <0>; 87 #clock-cells = <0>; 94 #clock-cells = <0>; 110 reg = <0x0 0xfd000000 0x0 0x200000>; 127 reg = <0x0 0xfe000000 0x0 0x1000>; 142 #size-cells = <0>; [all …]
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