Searched +full:0 +full:xe6b10000 (Results 1 – 13 of 13) sorted by relevance
20 #define CONFIG_SYS_INIT_SP_ADDR 0xE817FFFC21 #define STACK_AREA_SIZE 0xC00026 #define RCAR_GEN2_SDRAM_BASE 0x4000000042 #define CONFIG_SYS_TEXT_BASE 0x4000000044 #define CONFIG_SH_QSPI_BASE 0xE6B1000046 #define CONFIG_SYS_TEXT_BASE 0x0000000052 #define CONFIG_SYS_FLASH_BASE 0x0000000053 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */71 #define CONFIG_SMC911X_BASE 0x1800000092 #define CONFIG_SMSTP0_ENA 0x00400000[all …]
137 reg = <0xe6b10000 0x2c>;140 dmas = <&dmac0 0x17>, <&dmac0 0x18>, <&dmac1 0x17>, <&dmac1 0x18>;146 #size-cells = <0>;
15 #define RWDT_BASE 0xE602000016 #define SWDT_BASE 0xE603000017 #define LBSC_BASE 0xFEC0020018 #define DBSC3_0_BASE 0xE679000019 #define DBSC3_1_BASE 0xE67A000020 #define TMU_BASE 0xE61E000021 #define GPIO5_BASE 0xE605500022 #define SH_QSPI_BASE 0xE6B1000025 #define SCIF0_BASE 0xE6E6000026 #define SCIF1_BASE 0xE6E68000[all …]
40 #clock-cells = <0>;42 clock-frequency = <0>;47 #size-cells = <0>;50 cpu0: cpu@0 {53 reg = <0>;70 L2_CA15: cache-controller-0 {81 #clock-cells = <0>;83 clock-frequency = <0>;96 #clock-cells = <0>;98 clock-frequency = <0>;[all …]
27 #size-cells = <0>;30 cpu0: cpu@0 {33 reg = <0>;50 L2_CA7: cache-controller-0 {61 #clock-cells = <0>;63 clock-frequency = <0>;76 #clock-cells = <0>;78 clock-frequency = <0>;92 reg = <0 0xe6020000 0 0x0c>;102 reg = <0 0xe6050000 0 0x50>;[all …]
34 * The external audio clocks are configured as 0 Hz fixed frequency40 #clock-cells = <0>;41 clock-frequency = <0>;45 #clock-cells = <0>;46 clock-frequency = <0>;50 #clock-cells = <0>;51 clock-frequency = <0>;57 #clock-cells = <0>;59 clock-frequency = <0>;64 #size-cells = <0>;[all …]
32 * The external audio clocks are configured as 0 Hz fixed frequency38 #clock-cells = <0>;39 clock-frequency = <0>;43 #clock-cells = <0>;44 clock-frequency = <0>;48 #clock-cells = <0>;49 clock-frequency = <0>;55 #clock-cells = <0>;57 clock-frequency = <0>;62 #size-cells = <0>;[all …]
36 * The external audio clocks are configured as 0 Hz fixed42 #clock-cells = <0>;43 clock-frequency = <0>;47 #clock-cells = <0>;48 clock-frequency = <0>;52 #clock-cells = <0>;53 clock-frequency = <0>;59 #clock-cells = <0>;61 clock-frequency = <0>;66 #size-cells = <0>;[all …]
19 * The external audio clocks are configured as 0 Hz fixed frequency25 #clock-cells = <0>;26 clock-frequency = <0>;30 #clock-cells = <0>;31 clock-frequency = <0>;35 #clock-cells = <0>;36 clock-frequency = <0>;42 #clock-cells = <0>;44 clock-frequency = <0>;49 #size-cells = <0>;[all …]
40 * The external audio clocks are configured as 0 Hz fixed frequency46 #clock-cells = <0>;47 clock-frequency = <0>;51 #clock-cells = <0>;52 clock-frequency = <0>;56 #clock-cells = <0>;57 clock-frequency = <0>;63 #clock-cells = <0>;65 clock-frequency = <0>;70 #size-cells = <0>;[all …]
19 * The external audio clocks are configured as 0 Hz fixed frequency25 #clock-cells = <0>;26 clock-frequency = <0>;31 #clock-cells = <0>;32 clock-frequency = <0>;37 #clock-cells = <0>;38 clock-frequency = <0>;44 #clock-cells = <0>;46 clock-frequency = <0>;51 #size-cells = <0>;[all …]
41 * The external audio clocks are configured as 0 Hz fixed frequency47 #clock-cells = <0>;48 clock-frequency = <0>;52 #clock-cells = <0>;53 clock-frequency = <0>;57 #clock-cells = <0>;58 clock-frequency = <0>;64 #clock-cells = <0>;66 clock-frequency = <0>;71 #size-cells = <0>;[all …]