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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/soc/dove/
H A Dpmu.txt24 - #power-domain-cells: must be 0.
35 reg = <0xd0000 0x8000>, <0xd8000 0x8000>;
43 #power-domain-cells = <0>;
44 marvell,pmu_pwr_mask = <0x00000008>;
45 marvell,pmu_iso_mask = <0x00000001>;
50 #power-domain-cells = <0>;
51 marvell,pmu_pwr_mask = <0x00000004>;
52 marvell,pmu_iso_mask = <0x00000002>;
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/
H A Dsdhci-pxa.yaml83 reg = <0xd4280800 0x800>;
95 reg = <0xd8000 0x1000>,
96 <0xdc000 0x100>,
97 <0x18454 0x4>;
98 interrupts = <0 25 0x4>;
101 mrvl,clk-delay-cycles = <0x1F>;
/OK3568_Linux_fs/kernel/drivers/misc/habanalabs/include/goya/asic_reg/
H A Dmme_qm_regs.h22 #define mmMME_QM_GLBL_CFG0 0xD8000
24 #define mmMME_QM_GLBL_CFG1 0xD8004
26 #define mmMME_QM_GLBL_PROT 0xD8008
28 #define mmMME_QM_GLBL_ERR_CFG 0xD800C
30 #define mmMME_QM_GLBL_ERR_ADDR_LO 0xD8010
32 #define mmMME_QM_GLBL_ERR_ADDR_HI 0xD8014
34 #define mmMME_QM_GLBL_ERR_WDATA 0xD8018
36 #define mmMME_QM_GLBL_SECURE_PROPS 0xD801C
38 #define mmMME_QM_GLBL_NON_SECURE_PROPS 0xD8020
40 #define mmMME_QM_GLBL_STS0 0xD8024
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-mvebu/include/mach/
H A Dsoc.h14 #define SOC_MV78230_ID 0x7823
15 #define SOC_MV78260_ID 0x7826
16 #define SOC_MV78460_ID 0x7846
17 #define SOC_88F6720_ID 0x6720
18 #define SOC_88F6810_ID 0x6810
19 #define SOC_88F6820_ID 0x6820
20 #define SOC_88F6828_ID 0x6828
23 #define MV_88F67XX_A0_ID 0x3
26 #define MV_88F68XX_Z1_ID 0x0
27 #define MV_88F68XX_A0_ID 0x4
[all …]
/OK3568_Linux_fs/kernel/Documentation/sound/cards/
H A Dmultisound.sh77 # 0x250, 0x260 or 0x270. This port can be disabled to have the card
96 # to obtain one with the command `pnpdump 1 0x203' -- this may vary
107 # io base 0x210, irq 5 and mem 0xd8000, and also sets the Kurzweil
108 # synth to 0x330 and irq 9 (may need editing for your system):
110 # (READPORT 0x0203)
115 # (CONFIGURE BVJ0440/-1 (LD 0
116 # (INT 0 (IRQ 5 (MODE +E))) (IO 0 (BASE 0x0210)) (MEM 0 (BASE 0x0d8000))
121 # (IO 0 (BASE 0x0330)) (INT 0 (IRQ 9 (MODE +E)))
140 # If you specify cfg=0x250 for the snd-msnd-pinnacle module, it
143 # on the card to 0x250, 0x260 or 0x270).
[all …]
/OK3568_Linux_fs/u-boot/arch/x86/include/asm/arch-quark/acpi/
H A Dsouthcluster.asl12 Name(_ADR, 0)
13 Name(_BBN, 0)
19 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100, , , PB00)
21 /* IO Region 0 */
23 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8, , , PI00)
26 IO(Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
30 0x0000, 0x0d00, 0xffff, 0x0000, 0xf300, , , PI01)
32 /* VGA memory (0xa0000-0xbffff) */
35 0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
36 0x00020000, , , ASEG)
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-imx/
H A Dmx3x.h36 #define MX3x_L2CC_BASE_ADDR 0x30000000
42 #define MX3x_AIPS1_BASE_ADDR 0x43f00000
44 #define MX3x_MAX_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x04000)
45 #define MX3x_EVTMON_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x08000)
46 #define MX3x_CLKCTL_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x0c000)
47 #define MX3x_ETB_SLOT4_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x10000)
48 #define MX3x_ETB_SLOT5_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x14000)
49 #define MX3x_ECT_CTIO_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x18000)
50 #define MX3x_I2C_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x80000)
51 #define MX3x_I2C3_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x84000)
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/sun4i/
H A Dsun8i_mixer.h18 #define SUN8I_MIXER_GLOBAL_CTL 0x0
19 #define SUN8I_MIXER_GLOBAL_STATUS 0x4
20 #define SUN8I_MIXER_GLOBAL_DBUFF 0x8
21 #define SUN8I_MIXER_GLOBAL_SIZE 0xc
23 #define SUN8I_MIXER_GLOBAL_CTL_RT_EN BIT(0)
25 #define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE BIT(0)
27 #define DE2_MIXER_UNIT_SIZE 0x6000
28 #define DE3_MIXER_UNIT_SIZE 0x3000
30 #define DE2_BLD_BASE 0x1000
31 #define DE2_CH_BASE 0x2000
[all …]
/OK3568_Linux_fs/u-boot/arch/x86/include/asm/arch-baytrail/acpi/
H A Dsouthcluster.asl15 Name(_ADR, 0)
16 Name(_BBN, 0)
22 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100, , , PB00)
24 /* IO Region 0 */
26 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8, , , PI00)
29 IO(Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
33 0x0000, 0x0d00, 0xffff, 0x0000, 0xf300, , , PI01)
35 /* VGA memory (0xa0000-0xbffff) */
38 0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
39 0x00020000, , , ASEG)
[all …]
/OK3568_Linux_fs/kernel/sound/isa/msnd/
H A Dmsnd_pinnacle.c94 snd_msnd_DAPQ(chip, 0); in snd_msnd_eval_dsp_msg()
99 chip->playDMAPos = 0; in snd_msnd_eval_dsp_msg()
110 chip->captureDMAPos = 0; in snd_msnd_eval_dsp_msg()
137 ": DSP message %d 0x%02x\n", in snd_msnd_eval_dsp_msg()
149 snd_printd(KERN_WARNING LOGNAME ": HIMT message %d 0x%02x\n", in snd_msnd_eval_dsp_msg()
173 head = 0; in snd_msnd_interrupt()
195 while (timeout-- > 0) { in snd_msnd_reset_dsp()
197 return 0; in snd_msnd_reset_dsp()
220 if (snd_msnd_reset_dsp(chip->io, &info) < 0) { in snd_msnd_probe()
229 "I/O 0x%lx-0x%lx, IRQ %d, memory mapped to 0x%lX-0x%lX\n", in snd_msnd_probe()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Darmada-37xx.dtsi63 #size-cells = <0>;
64 cpu@0 {
67 reg = <0>;
99 /* 32M internal register @ 0xd000_0000 */
100 ranges = <0x0 0x0 0xd0000000 0x2000000>;
104 reg = <0x12000 0x400>;
112 reg = <0x13800 0x100>, <0x13C00 0x20>;
115 gpio-ranges = <&pinctrl_nb 0 0 36>;
162 reg = <0x18800 0x100>, <0x18C00 0x20>;
165 gpio-ranges = <&pinctrl_sb 0 0 29>;
[all …]
H A Darmada-38x.dtsi78 pcie-mem-aperture = <0xe0000000 0x8000000>;
79 pcie-io-aperture = <0xe8000000 0x100000>;
83 reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
88 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
89 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
92 clocks = <&coreclk 0>;
98 reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
99 ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
102 clocks = <&coreclk 0>;
108 reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
[all …]
/OK3568_Linux_fs/u-boot/drivers/phy/marvell/
H A Dcomphy_a3700.h19 #define POLL_32B_REG 0
24 #define COMPHY_SEL_ADDR MVEBU_REG(0x0183FC)
25 #define rf_compy_select(lane) (0x1 << (((lane) == 1) ? 4 : 0))
27 #define COMPHY_PHY_CFG1_ADDR(lane) MVEBU_REG(0x018300 + (lane) * 0x28)
36 #define rf_gen_rx_select (0x0F << rf_gen_rx_sel_shift)
38 #define rf_gen_tx_select (0x0F << rf_gen_tx_sel_shift)
41 #define COMPHY_PHY_STAT1_ADDR(lane) MVEBU_REG(0x018318 + (lane) * 0x28)
42 #define rb_rx_init_done BIT(0)
49 #define PCIE_BASE MVEBU_REG(0x070000)
50 #define PCIETOP_BASE MVEBU_REG(0x080000)
[all …]
/OK3568_Linux_fs/kernel/drivers/soc/dove/
H A Dpmu.c22 #define PMC_SW_RST 0x30
23 #define PMC_IRQ_CAUSE 0x50
24 #define PMC_IRQ_MASK 0x54
26 #define PMU_PWR 0x10
27 #define PMU_ISO 0x58
60 return 0; in pmu_reset_reset()
74 return 0; in pmu_reset_assert()
88 return 0; in pmu_reset_deassert()
174 return 0; in pmu_domain_power_off()
208 return 0; in pmu_domain_power_on()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/mediatek/mt76/mt7915/
H A Dregs.h8 #define MT_MCU_WFDMA1_BASE 0x3000
11 #define MT_MCU_INT_EVENT MT_MCU_WFDMA1(0x108)
12 #define MT_MCU_INT_EVENT_DMA_STOPPED BIT(0)
17 #define MT_PLE_BASE 0x8000
20 #define MT_PLE_FL_Q0_CTRL MT_PLE(0x1b0)
21 #define MT_PLE_FL_Q1_CTRL MT_PLE(0x1b4)
22 #define MT_PLE_FL_Q2_CTRL MT_PLE(0x1b8)
23 #define MT_PLE_FL_Q3_CTRL MT_PLE(0x1bc)
25 #define MT_PLE_AC_QEMPTY(ac, n) MT_PLE(0x300 + 0x10 * (ac) + \
27 #define MT_PLE_AMSDU_PACK_MSDU_CNT(n) MT_PLE(0x10e0 + ((n) << 2))
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/marvell/
H A Darmada-37xx.dtsi35 reg = <0 0x4000000 0 0x200000>;
42 #size-cells = <0>;
43 cpu0: cpu@0 {
46 reg = <0>;
80 /* 32M internal register @ 0xd000_0000 */
81 ranges = <0x0 0x0 0xd0000000 0x2000000>;
85 reg = <0x8300 0x40>;
93 reg = <0xd000 0x1000>;
99 #size-cells = <0>;
100 reg = <0x10600 0xA00>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Darmada-39x.dtsi32 #size-cells = <0>;
35 cpu@0 {
38 reg = <0>;
59 pcie-mem-aperture = <0xe0000000 0x8000000>;
60 pcie-io-aperture = <0xe8000000 0x100000>;
64 reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
71 ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
75 reg = <0x8000 0x1000>;
78 arm,double-linefill-incr = <0>;
79 arm,double-linefill-wrap = <0>;
[all …]
H A Darmada-38x.dtsi42 pcie-mem-aperture = <0xe0000000 0x8000000>;
43 pcie-io-aperture = <0xe8000000 0x100000>;
47 reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
52 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
53 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
56 clocks = <&coreclk 0>;
62 reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
63 ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
66 clocks = <&coreclk 0>;
72 reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
[all …]
H A Ddove.dtsi22 #size-cells = <0>;
24 cpu0: cpu@0 {
28 reg = <0>;
34 marvell,tauros2-cache-features = <0>;
46 #size-cells = <0>;
51 pinctrl-0 = <&pmx_i2cmux_0>;
55 i2c0: i2c@0 {
56 reg = <0>;
58 #size-cells = <0>;
65 #size-cells = <0>;
[all …]
H A Dam33xx-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
3 reg = <0x44c00000 0x800>,
4 <0x44c00800 0x800>,
5 <0x44c01000 0x400>,
6 <0x44c01400 0x400>;
10 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
11 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
12 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
14 segment@0 { /* 0x44c00000 */
18 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
[all …]
H A Dam437x-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
3 reg = <0x44c00000 0x800>,
4 <0x44c00800 0x800>,
5 <0x44c01000 0x400>,
6 <0x44c01400 0x400>;
10 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
11 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
12 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
14 segment@0 { /* 0x44c00000 */
18 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
[all …]
/OK3568_Linux_fs/kernel/Documentation/sound/
H A Dalsa-configuration.rst57 (0 = disable debug prints, 1 = normal debug messages,
71 Default: 0
80 the card #0. Similarly, when ``adsp_map=0``, /dev/adsp will be mapped
81 to PCM #0 of the card #0.
83 commas, such like ``dsp_map=0,1``.
98 Default: 0
119 Values: 0 through 31 or negative;
145 the port must be specified. For actual AdLib FM cards it will be 0x388.
157 64:0 OPL2 FM synth OPL2 FM Port
162 sbiload -p 64:0 std.sb drums.sb
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wan/
H A Dsdla.c59 static unsigned int valid_port[] = { 0x250, 0x270, 0x280, 0x300, 0x350, 0x360, 0x380, 0x390};
62 0xA0000, 0xA2000, 0xA4000, 0xA6000, 0xA8000, 0xAA000, 0xAC000, 0xAE000,
63 … 0xB0000, 0xB2000, 0xB4000, 0xB6000, 0xB8000, 0xBA000, 0xBC000, 0xBE000,
64 … 0xC0000, 0xC2000, 0xC4000, 0xC6000, 0xC8000, 0xCA000, 0xCC000, 0xCE000,
65 … 0xD0000, 0xD2000, 0xD4000, 0xD6000, 0xD8000, 0xDA000, 0xDC000, 0xDE000,
66 … 0xE0000, 0xE2000, 0xE4000, 0xE6000, 0xE8000, 0xEA000, 0xEC000, 0xEE000};
76 #define SDLA_WINDOW(dev,addr) outb((((addr) >> 13) & 0x1F), (dev)->base_addr + SDLA_REG_Z80_WINDOW)
149 addr = 0; in sdla_clear()
157 memset(base, 0, bytes); in sdla_clear()
222 outb(0x00, dev->base_addr + SDLA_REG_CONTROL); in sdla_start()
[all …]
/OK3568_Linux_fs/kernel/drivers/mtd/nand/raw/
H A Ddiskonchip.c37 #define CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS 0
43 0xfffc8000, 0xfffca000, 0xfffcc000, 0xfffce000,
44 0xfffd0000, 0xfffd2000, 0xfffd4000, 0xfffd6000,
45 0xfffd8000, 0xfffda000, 0xfffdc000, 0xfffde000,
46 0xfffe0000, 0xfffe2000, 0xfffe4000, 0xfffe6000,
47 0xfffe8000, 0xfffea000, 0xfffec000, 0xfffee000,
49 0xc8000, 0xca000, 0xcc000, 0xce000,
50 0xd0000, 0xd2000, 0xd4000, 0xd6000,
51 0xd8000, 0xda000, 0xdc000, 0xde000,
52 0xe0000, 0xe2000, 0xe4000, 0xe6000,
[all …]
/OK3568_Linux_fs/kernel/drivers/scsi/qla2xxx/
H A Dqla_fw.h14 #define MBS_CHECKSUM_ERROR 0x4010
15 #define MBS_INVALID_PRODUCT_KEY 0x4020
55 #define PDS_PLOGI_PENDING 0x03
56 #define PDS_PLOGI_COMPLETE 0x04
57 #define PDS_PRLI_PENDING 0x05
58 #define PDS_PRLI_COMPLETE 0x06
59 #define PDS_PORT_UNAVAILABLE 0x07
60 #define PDS_PRLO_PENDING 0x09
61 #define PDS_LOGO_PENDING 0x11
62 #define PDS_PRLI2_PENDING 0x12
[all …]

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