Home
last modified time | relevance | path

Searched +full:0 +full:xb0000 (Results 1 – 25 of 82) sorted by relevance

1234

/OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/
H A Dpq3-etsec2-0.dtsi2 * PQ3 eTSEC2 device tree stub [ @ offsets 0x24000/0xb0000 ]
38 #size-cells = <0>;
40 reg = <0x24000 0x1000 0xb0030 0x4>;
49 fsl,num_rx_queues = <0x8>;
50 fsl,num_tx_queues = <0x8>;
58 reg = <0xb0000 0x1000>;
59 interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
H A Dqoriq-fman-0-10g-0.dtsi2 * QorIQ FMan 10g port #0 device tree stub [ controller @ offset 0x400000 ]
37 cell-index = <0x10>;
39 reg = <0x90000 0x1000>;
43 cell-index = <0x30>;
45 reg = <0xb0000 0x1000>;
49 cell-index = <0x8>;
51 reg = <0xf0000 0x1000>;
57 #size-cells = <0>;
59 reg = <0xf1000 0x1000>;
60 interrupts = <101 2 0 0>;
H A Dqoriq-fman-1-10g-0.dtsi2 * QorIQ FMan 10g port #0 device tree stub [ controller @ offset 0x500000 ]
37 cell-index = <0x10>;
39 reg = <0x90000 0x1000>;
43 cell-index = <0x30>;
45 reg = <0xb0000 0x1000>;
49 cell-index = <0x8>;
51 reg = <0xf0000 0x1000>;
57 #size-cells = <0>;
59 reg = <0xf1000 0x1000>;
H A Dqoriq-fman3-0-10g-0.dtsi2 * QorIQ FMan v3 10g port #0 device tree stub [ controller @ offset 0x400000 ]
37 cell-index = <0x10>;
39 reg = <0x90000 0x1000>;
44 cell-index = <0x30>;
46 reg = <0xb0000 0x1000>;
51 cell-index = <0x8>;
53 reg = <0xf0000 0x1000>;
60 #size-cells = <0>;
62 reg = <0xf1000 0x1000>;
65 pcsphy6: ethernet-phy@0 {
[all …]
H A Dqoriq-fman3-1-10g-0.dtsi2 * QorIQ FMan v3 10g port #0 device tree stub [ controller @ offset 0x500000 ]
37 cell-index = <0x10>;
39 reg = <0x90000 0x1000>;
44 cell-index = <0x30>;
46 reg = <0xb0000 0x1000>;
51 cell-index = <0x8>;
53 reg = <0xf0000 0x1000>;
60 #size-cells = <0>;
62 reg = <0xf1000 0x1000>;
65 pcsphy14: ethernet-phy@0 {
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra186-mc.yaml27 pattern: "^memory-controller@[0-9a-f]+$"
52 "^external-memory-controller@[0-9a-f]+$":
106 reg = <0x0 0x02c00000 0x0 0xb0000>;
112 ranges = <0x0 0x02c00000 0x0 0x02c00000 0x0 0xb0000>;
118 dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
122 reg = <0x0 0x02c60000 0x0 0x50000>;
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mailbox/
H A Dmarvell,armada-3700-rwtm-mailbox.txt13 reg = <0xb0000 0x100>;
/OK3568_Linux_fs/kernel/drivers/staging/media/atomisp/pci/
H A Dstr2mem_defs.h19 #define _STR2MEM_CRUN_BIT 0x100000
20 #define _STR2MEM_CMD_BITS 0x0F0000
21 #define _STR2MEM_COUNT_BITS 0x00FFFF
23 #define _STR2MEM_BLOCKS_CMD 0xA0000
24 #define _STR2MEM_PACKETS_CMD 0xB0000
25 #define _STR2MEM_BYTES_CMD 0xC0000
26 #define _STR2MEM_BYTES_FROM_PACKET_CMD 0xD0000
28 #define _STR2MEM_SOFT_RESET_REG_ID 0
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/
H A Dqoriq-fman3-0-10g-0.dtsi3 * QorIQ FMan v3 10g port #0 device tree
11 cell-index = <0x10>;
13 reg = <0x90000 0x1000>;
18 cell-index = <0x30>;
20 reg = <0xb0000 0x1000>;
25 cell-index = <0x8>;
27 reg = <0xf0000 0x1000>;
34 #size-cells = <0>;
36 reg = <0xf1000 0x1000>;
38 pcsphy6: ethernet-phy@0 {
[all …]
/OK3568_Linux_fs/u-boot/arch/x86/cpu/queensbay/
H A DKconfig48 default 0xfffb0000
53 The default base address of 0xfffb0000 indicates that the binary must
54 be located at offset 0xb0000 from the beginning of a 1MB flash device.
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Drv1106g-evb2-v10-dual-camera.dts17 …gs = "loglevel=0 rootfstype=erofs rootflags=dax console=ttyFIQ0 root=/dev/rd0 snd_soc_core.preallo…
45 pinctrl-0 = <&sdmmc_pwren>;
58 #size-cells = <0>;
60 port@0 {
61 reg = <0>;
63 #size-cells = <0>;
65 csi_dphy_input0: endpoint@0 {
66 reg = <0>;
75 #size-cells = <0>;
77 csi_dphy_output0: endpoint@0 {
[all …]
H A Dmt7629-rfb.dts41 reg = <0x40000000 0x10000000>;
65 pinctrl-0 = <&eth_pins>;
69 gmac0: mac@0 {
71 reg = <0>;
89 #size-cells = <0>;
91 phy0: ethernet-phy@0 {
92 reg = <0>;
99 pinctrl-0 = <&i2c_pins>;
105 pinctrl-0 = <&qspi_pins>;
108 flash@0 {
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dqcom,gcc-msm8998.yaml29 - description: UFS phy rx symbol clock for pipe 0
79 reg = <0x00100000 0xb0000>;
82 <0>,
83 <0>,
84 <0>,
85 <0>,
86 <0>;
H A Dimx8qxp-lpcg.yaml60 reg = <0x5b200000 0xb0000>;
67 reg = <0x5b010000 0x10000>;
/OK3568_Linux_fs/kernel/drivers/clk/imx/
H A Dclk-imx8qxp-lpcg.h11 #define LSIO_PWM_0_LPCG 0x00000
12 #define LSIO_PWM_1_LPCG 0x10000
13 #define LSIO_PWM_2_LPCG 0x20000
14 #define LSIO_PWM_3_LPCG 0x30000
15 #define LSIO_PWM_4_LPCG 0x40000
16 #define LSIO_PWM_5_LPCG 0x50000
17 #define LSIO_PWM_6_LPCG 0x60000
18 #define LSIO_PWM_7_LPCG 0x70000
19 #define LSIO_GPIO_0_LPCG 0x80000
20 #define LSIO_GPIO_1_LPCG 0x90000
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddisplay2.h95 u8 res[0xc];
113 #define SUNXI_DE2_MUX0_BASE (SUNXI_DE2_BASE + 0x100000)
114 #define SUNXI_DE2_MUX1_BASE (SUNXI_DE2_BASE + 0x200000)
116 #define SUNXI_DE2_MUX_GLB_REGS 0x00000
117 #define SUNXI_DE2_MUX_BLD_REGS 0x01000
118 #define SUNXI_DE2_MUX_CHAN_REGS 0x02000
119 #define SUNXI_DE2_MUX_CHAN_SZ 0x1000
120 #define SUNXI_DE2_MUX_VSU_REGS 0x20000
121 #define SUNXI_DE2_MUX_GSU1_REGS 0x30000
122 #define SUNXI_DE2_MUX_GSU2_REGS 0x40000
[all …]
/OK3568_Linux_fs/kernel/tools/perf/arch/s390/util/
H A Dauxtrace.c14 #define PERF_EVENT_CPUM_SF 0xB0000 /* Event: Basic-sampling */
15 #define PERF_EVENT_CPUM_SF_DIAG 0xBD000 /* Event: Combined-sampling */
27 return 0; in cpumsf_info_priv_size()
37 return 0; in cpumsf_info_fill()
43 return 0; in cpumsf_reference()
72 return 0; in cpumsf_recording_options()
80 return 0; in cpumsf_parse_snapshot_options()
92 int diagnose = 0; in auxtrace_record__init()
94 *err = 0; in auxtrace_record__init()
95 if (evlist->core.nr_entries == 0) in auxtrace_record__init()
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/msm/
H A Ddpu.txt66 Port 0 -> DPU_INTF1 (DSI1)
78 reg = <0xae00000 0x1000>;
81 power-domains = <&clock_dispcc 0>;
99 iommus = <&apps_iommu 0>;
103 ranges = <0 0 0xae00000 0xb2008>;
107 reg = <0 0x1000 0x8f000>, <0 0xb0000 0x2008>;
118 assigned-clock-rates = <0 0 300000000 19200000>;
120 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
124 #size-cells = <0>;
126 port@0 {
[all …]
/OK3568_Linux_fs/kernel/arch/mips/boot/dts/ralink/
H A Dgardena_smart_gateway_mt7688.dts18 memory@0 {
20 reg = <0x0 0x8000000>;
27 pinctrl-0 = <&pinmux_gpio_gpio>; /* GPIO11 */
40 pinctrl-0 = <&pinmux_pwm0_gpio>, /* GPIO18 */
130 pinctrl-0 = <&pinmux_spi_spi>, <&pinmux_spi_cs1_cs>;
132 m25p80@0 {
134 reg = <0>;
142 partition@0 {
144 reg = <0x0 0xa0000>;
150 reg = <0xa0000 0x10000>;
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mx7/
H A Dimx-regs.h12 #define ROM_SW_INFO_ADDR 0x000001E8
13 #define ROMCP_ARB_BASE_ADDR 0x00000000
14 #define ROMCP_ARB_END_ADDR 0x00017FFF
16 #define CAAM_ARB_BASE_ADDR 0x00100000
17 #define CAAM_ARB_END_ADDR 0x00107FFF
18 #define GIC400_ARB_BASE_ADDR 0x31000000
19 #define GIC400_ARB_END_ADDR 0x31007FFF
20 #define APBH_DMA_ARB_BASE_ADDR 0x33000000
21 #define APBH_DMA_ARB_END_ADDR 0x33007FFF
22 #define M4_BOOTROM_BASE_ADDR 0x00180000
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-dove/
H A Ddove.h19 * e0000000 @runtime 128M PCIe-0 Memory space
23 * f2000000 fee00000 1M PCIe-0 I/O space
27 #define DOVE_CESA_PHYS_BASE 0xc8000000
28 #define DOVE_CESA_VIRT_BASE IOMEM(0xfdb00000)
31 #define DOVE_PCIE0_MEM_PHYS_BASE 0xe0000000
34 #define DOVE_PCIE1_MEM_PHYS_BASE 0xe8000000
37 #define DOVE_BOOTROM_PHYS_BASE 0xf8000000
40 #define DOVE_SCRATCHPAD_PHYS_BASE 0xf0000000
41 #define DOVE_SCRATCHPAD_VIRT_BASE IOMEM(0xfdd00000)
44 #define DOVE_SB_REGS_PHYS_BASE 0xf1000000
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-imx/
H A Dmx3x.h36 #define MX3x_L2CC_BASE_ADDR 0x30000000
42 #define MX3x_AIPS1_BASE_ADDR 0x43f00000
44 #define MX3x_MAX_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x04000)
45 #define MX3x_EVTMON_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x08000)
46 #define MX3x_CLKCTL_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x0c000)
47 #define MX3x_ETB_SLOT4_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x10000)
48 #define MX3x_ETB_SLOT5_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x14000)
49 #define MX3x_ECT_CTIO_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x18000)
50 #define MX3x_I2C_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x80000)
51 #define MX3x_I2C3_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x84000)
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-uniphier/
H A Dmicro-support-card.c15 #define MICRO_SUPPORT_CARD_BASE 0x43f00000
16 #define SMC911X_BASE ((MICRO_SUPPORT_CARD_BASE) + 0x00000)
17 #define LED_BASE ((MICRO_SUPPORT_CARD_BASE) + 0x90000)
18 #define NS16550A_BASE ((MICRO_SUPPORT_CARD_BASE) + 0xb0000)
19 #define MICRO_SUPPORT_CARD_RESET ((MICRO_SUPPORT_CARD_BASE) + 0xd0034)
20 #define MICRO_SUPPORT_CARD_REVISION ((MICRO_SUPPORT_CARD_BASE) + 0xd00E0)
23 * 0: reset deassert, 1: reset
25 * bit[0]: LAN, I2C, LED
30 writel(0x00010000, MICRO_SUPPORT_CARD_RESET); in support_card_reset_deassert()
35 writel(0x00020003, MICRO_SUPPORT_CARD_RESET); in support_card_reset()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/sun4i/
H A Dsun8i_mixer.h18 #define SUN8I_MIXER_GLOBAL_CTL 0x0
19 #define SUN8I_MIXER_GLOBAL_STATUS 0x4
20 #define SUN8I_MIXER_GLOBAL_DBUFF 0x8
21 #define SUN8I_MIXER_GLOBAL_SIZE 0xc
23 #define SUN8I_MIXER_GLOBAL_CTL_RT_EN BIT(0)
25 #define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE BIT(0)
27 #define DE2_MIXER_UNIT_SIZE 0x6000
28 #define DE3_MIXER_UNIT_SIZE 0x3000
30 #define DE2_BLD_BASE 0x1000
31 #define DE2_CH_BASE 0x2000
[all …]
/OK3568_Linux_fs/kernel/sound/isa/msnd/
H A Dmsnd_pinnacle.c94 snd_msnd_DAPQ(chip, 0); in snd_msnd_eval_dsp_msg()
99 chip->playDMAPos = 0; in snd_msnd_eval_dsp_msg()
110 chip->captureDMAPos = 0; in snd_msnd_eval_dsp_msg()
137 ": DSP message %d 0x%02x\n", in snd_msnd_eval_dsp_msg()
149 snd_printd(KERN_WARNING LOGNAME ": HIMT message %d 0x%02x\n", in snd_msnd_eval_dsp_msg()
173 head = 0; in snd_msnd_interrupt()
195 while (timeout-- > 0) { in snd_msnd_reset_dsp()
197 return 0; in snd_msnd_reset_dsp()
220 if (snd_msnd_reset_dsp(chip->io, &info) < 0) { in snd_msnd_probe()
229 "I/O 0x%lx-0x%lx, IRQ %d, memory mapped to 0x%lX-0x%lX\n", in snd_msnd_probe()
[all …]

1234