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/OK3568_Linux_fs/u-boot/arch/m68k/cpu/mcf5227x/
H A Dstart.S17 move.w #0x2700,%sr; /* disable intrs */ \
41 INITSP: .long 0 /* Initial SP */
44 INITSP: .long 0 /* Initial SP */
60 /* TRAP #0 - #15 */
104 .long 0x00000000 /* checksum, not yet implemented */
105 .long 0x00020000 /* image length */
116 move.l #0xFC008000, %a1
118 move.l #0xFC008008, %a1
120 move.l #0xFC008004, %a1
127 move.l #0xFC0A4074, %a1
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mxs/
H A Dregs-base.h22 #define MXS_ICOLL_BASE 0x80000000
23 #define MXS_APBH_BASE 0x80004000
24 #define MXS_ECC8_BASE 0x80008000
25 #define MXS_BCH_BASE 0x8000A000
26 #define MXS_GPMI_BASE 0x8000C000
27 #define MXS_SSP0_BASE 0x80010000
28 #define MXS_SSP1_BASE 0x80034000
29 #define MXS_ETM_BASE 0x80014000
30 #define MXS_PINCTRL_BASE 0x80018000
31 #define MXS_DIGCTL_BASE 0x8001C000
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_3_0_default.h27 #define mmSDMA0_DEC_START_DEFAULT 0x00000000
28 #define mmSDMA0_GLOBAL_TIMESTAMP_LO_DEFAULT 0x00000000
29 #define mmSDMA0_GLOBAL_TIMESTAMP_HI_DEFAULT 0x00000000
30 #define mmSDMA0_PG_CNTL_DEFAULT 0x00000000
31 #define mmSDMA0_PG_CTX_LO_DEFAULT 0x00000000
32 #define mmSDMA0_PG_CTX_HI_DEFAULT 0x00000000
33 #define mmSDMA0_PG_CTX_CNTL_DEFAULT 0x00000000
34 #define mmSDMA0_POWER_CNTL_DEFAULT 0x40000050
35 #define mmSDMA0_CLK_CTRL_DEFAULT 0x00000100
36 #define mmSDMA0_CNTL_DEFAULT 0x000000c2
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dalphascale-asm9260.dtsi16 reg = <0x20000000 0x2000000>;
20 #address-cells = <0>;
21 #size-cells = <0>;
32 #clock-cells = <0>;
47 reg = <0x80040000 0x204>;
54 reg = <0x80054000 0x200>;
59 reg = <0x80088000 0x4000>;
H A Dimx23.dtsi32 #size-cells = <0>;
34 cpu@0 {
37 reg = <0>;
45 reg = <0x80000000 0x80000>;
52 reg = <0x80000000 0x40000>;
59 reg = <0x80000000 0x2000>;
64 reg = <0x80004000 0x2000>;
65 interrupts = <0 14 20 0
75 reg = <0x80008000 0x2000>;
83 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
[all …]
H A Dimx28.dtsi43 #size-cells = <0>;
45 cpu@0 {
48 reg = <0>;
56 reg = <0x80000000 0x80000>;
63 reg = <0x80000000 0x3c900>;
70 reg = <0x80000000 0x2000>;
74 reg = <0x80002000 0x2000>;
83 reg = <0x80004000 0x2000>;
87 87 86 0 0>;
98 reg = <0x80006000 0x800>;
[all …]
H A Dprima2.dtsi16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0x0>;
27 timebase-frequency = <0>;
28 bus-frequency = <0>;
29 clock-frequency = <0>;
51 ranges = <0x40000000 0x40000000 0x80000000>;
55 reg = <0x80040000 0x1000>;
59 arm,filter-ranges = <0 0x40000000>;
66 reg = <0x80020000 0x1000>;
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dimx23-clock.yaml19 ref_xtal 0
83 reg = <0x80040000 0x2000>;
89 reg = <0x8006c000 0x2000>;
H A Dimx28-clock.yaml19 ref_xtal 0
106 reg = <0x80040000 0x2000>;
112 reg = <0x8006a000 0x2000>;
/OK3568_Linux_fs/u-boot/include/configs/
H A Dls1021aiot.h37 #define DDR_SDRAM_CFG 0x470c0008
38 #define DDR_CS0_BNDS 0x008000bf
39 #define DDR_CS0_CONFIG 0x80014302
40 #define DDR_TIMING_CFG_0 0x50550004
41 #define DDR_TIMING_CFG_1 0xbcb38c56
42 #define DDR_TIMING_CFG_2 0x0040d120
43 #define DDR_TIMING_CFG_3 0x010e1000
44 #define DDR_TIMING_CFG_4 0x00000001
45 #define DDR_TIMING_CFG_5 0x03401400
46 #define DDR_SDRAM_CFG_2 0x00401010
[all …]
H A Dls1021atwr.h58 #define DDR_SDRAM_CFG 0x470c0008
59 #define DDR_CS0_BNDS 0x008000bf
60 #define DDR_CS0_CONFIG 0x80014302
61 #define DDR_TIMING_CFG_0 0x50550004
62 #define DDR_TIMING_CFG_1 0xbcb38c56
63 #define DDR_TIMING_CFG_2 0x0040d120
64 #define DDR_TIMING_CFG_3 0x010e1000
65 #define DDR_TIMING_CFG_4 0x00000001
66 #define DDR_TIMING_CFG_5 0x03401400
67 #define DDR_SDRAM_CFG_2 0x00401010
[all …]
H A DMPC8569MDS.h43 #define CONFIG_SYS_TEXT_BASE 0xfff80000
58 #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
59 #define CONFIG_SYS_MEMTEST_END 0x00400000
64 #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
69 #define CONFIG_SYS_CCSRBAR 0xe0000000
82 #define CONFIG_MEM_INIT_VALUE 0xDeadBeef
84 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
92 #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */
96 #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003F
97 #define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/
H A DkuroboxHG.dts37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x8000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
[all …]
H A DkuroboxHD.dts37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x4000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/phy/bb/halbb_8852b/
H A Dhalbb_hwimg_raw_data_8852b.h36 0x704, 0x601E0100,
37 0x4000, 0x00000000,
38 0x4004, 0xCA014000,
39 0x4008, 0xC751D4F0,
40 0x400C, 0x44511475,
41 0x4010, 0x00000000,
42 0x4014, 0x00000000,
43 0x4018, 0x4F4C084B,
44 0x401C, 0x084A4E52,
45 0x4020, 0x4D504E4B,
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/phy/bb/halbb_8852b/
H A Dhalbb_hwimg_raw_data_8852b.h36 0x704, 0x601E0100,
37 0x4000, 0x00000000,
38 0x4004, 0xCA014000,
39 0x4008, 0xC751D4F0,
40 0x400C, 0x44511475,
41 0x4010, 0x00000000,
42 0x4014, 0x00000000,
43 0x4018, 0x4F4C084B,
44 0x401C, 0x084A4E52,
45 0x4020, 0x4D504E4B,
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-ep93xx/
H A Dep93xx.h25 #define EP93XX_AHB_BASE 0x80000000
26 #define EP93XX_APB_BASE 0x80800000
29 * 0x80000000 - 0x8000FFFF: DMA
31 #define DMA_OFFSET 0x000000
74 * 0x80010000 - 0x8001FFFF: Ethernet MAC
76 #define MAC_OFFSET 0x010000
156 #define SELFCTL_RESET (1 << 0)
187 #define BMCTL_RXEN (1 << 0)
192 #define BMSTS_QID_MASK 0x07
193 #define BMSTS_QID_RXDATA 0x00
[all …]
/OK3568_Linux_fs/u-boot/cmd/
H A Dtsi148.c44 busdevfn = pci_find_device(LPCI_VENDOR, LPCI_DEVICE, 0); in tsi148_init()
51 pci_write_config_dword(busdevfn, 0x0c, 0); in tsi148_init()
59 memset(dev, 0, sizeof(*dev)); in tsi148_init()
63 val &= ~0xf; in tsi148_init()
83 for (j = 0; j < 8; j++) { in tsi148_init()
84 __raw_writel(htonl(0x00000000), &dev->uregs->outbound[j].otat); in tsi148_init()
85 __raw_writel(htonl(0x00000000), &dev->uregs->inbound[j].itat); in tsi148_init()
89 __raw_writel(htonl(0x00000084), &dev->uregs->vctrl); in tsi148_init()
92 if ((__raw_readl(&dev->uregs->vstat) & 0x00000100) != 0) in tsi148_init()
102 __raw_writel(htonl(0x00000000), &dev->uregs->inten); in tsi148_init()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
H A Dtable.c8 0x800, 0x80040000,
9 0x804, 0x00000003,
10 0x808, 0x0000FC00,
11 0x80C, 0x0000000A,
12 0x810, 0x10001331,
13 0x814, 0x020C3D10,
14 0x818, 0x02200385,
15 0x81C, 0x00000000,
16 0x820, 0x01000100,
17 0x824, 0x00190204,
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
H A Dtable.c6 0x800, 0x80040000,
7 0x804, 0x00000003,
8 0x808, 0x0000FC00,
9 0x80C, 0x0000000A,
10 0x810, 0x10001331,
11 0x814, 0x020C3D10,
12 0x818, 0x02200385,
13 0x81C, 0x00000000,
14 0x820, 0x01000100,
15 0x824, 0x00390204,
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
H A Dtable.c7 0x800, 0x80040000,
8 0x804, 0x00000003,
9 0x808, 0x0000fc00,
10 0x80c, 0x0000000a,
11 0x810, 0x10005388,
12 0x814, 0x020c3d10,
13 0x818, 0x02200385,
14 0x81c, 0x00000000,
15 0x820, 0x01000100,
16 0x824, 0x00390004,
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/rtl8188eu/hal/
H A Dbb_cfg.c15 0xC78, 0xFB000001,
16 0xC78, 0xFB010001,
17 0xC78, 0xFB020001,
18 0xC78, 0xFB030001,
19 0xC78, 0xFB040001,
20 0xC78, 0xFB050001,
21 0xC78, 0xFA060001,
22 0xC78, 0xF9070001,
23 0xC78, 0xF8080001,
24 0xC78, 0xF7090001,
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/rtl8723bs/hal/
H A DHalHWImg8723B_BB.c16 ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA */ in CheckPositive()
31 pDM_Odm->TypeGLNA << 0 | in CheckPositive()
41 "===> [8812A] CheckPositive (cond1, cond2) = (0x%X 0x%X)\n", in CheckPositive()
51 "===> [8812A] CheckPositive (driver1, driver2) = (0x%X 0x%X)\n", in CheckPositive()
61 (" (Platform, Interface) = (0x%X, 0x%X)\n", in CheckPositive()
71 " (Board, Package) = (0x%X, 0x%X)\n", in CheckPositive()
81 if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) in CheckPositive()
83 if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) in CheckPositive()
89 cond1 &= 0x000F0FFF; in CheckPositive()
90 driver1 &= 0x000F0FFF; in CheckPositive()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/rtl8723b/
H A Dhalhwimg8723b_bb.c30 u8 _board_type = ((p_dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ in check_positive()
41 u8 pkg_type_for_para = (p_dm->package_type == 0) ? 15 : p_dm->package_type; in check_positive()
44 (p_dm->support_interface & 0xF0) << 16 | in check_positive()
47 (p_dm->support_interface & 0x0F) << 8 | in check_positive()
50 u32 driver2 = (p_dm->type_glna & 0xFF) << 0 | in check_positive()
51 (p_dm->type_gpa & 0xFF) << 8 | in check_positive()
52 (p_dm->type_alna & 0xFF) << 16 | in check_positive()
53 (p_dm->type_apa & 0xFF) << 24; in check_positive()
55 u32 driver3 = 0; in check_positive()
57 u32 driver4 = (p_dm->type_glna & 0xFF00) >> 8 | in check_positive()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/phydm/rtl8723b/
H A Dhalhwimg8723b_bb.c35 u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA*/ in CheckPositive()
43 (pDM_Odm->SupportInterface & 0xF0) << 16 | in CheckPositive()
46 (pDM_Odm->SupportInterface & 0x0F) << 8 | in CheckPositive()
49 u4Byte driver2 = (pDM_Odm->TypeGLNA & 0xFF) << 0 | in CheckPositive()
50 (pDM_Odm->TypeGPA & 0xFF) << 8 | in CheckPositive()
51 (pDM_Odm->TypeALNA & 0xFF) << 16 | in CheckPositive()
52 (pDM_Odm->TypeAPA & 0xFF) << 24; in CheckPositive()
54 u4Byte driver3 = 0; in CheckPositive()
56 u4Byte driver4 = (pDM_Odm->TypeGLNA & 0xFF00) >> 8 | in CheckPositive()
57 (pDM_Odm->TypeGPA & 0xFF00) | in CheckPositive()
[all …]

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