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12

/OK3568_Linux_fs/u-boot/arch/arm/mach-bcm283x/include/mach/
H A Dwdog.h11 #define BCM2835_WDOG_PHYSADDR 0x3f100000
13 #define BCM2835_WDOG_PHYSADDR 0x20100000
23 #define BCM2835_WDOG_PASSWORD 0x5a000000
25 #define BCM2835_WDOG_RSTC_WRCFG_MASK 0x00000030
26 #define BCM2835_WDOG_RSTC_WRCFG_FULL_RESET 0x00000020
28 #define BCM2835_WDOG_WDOG_TIMEOUT_MASK 0x0000ffff
/OK3568_Linux_fs/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91_eefc.h25 #define AT91_EEFC_FMR_FWS_MASK 0x00000f00
26 #define AT91_EEFC_FMR_FRDY_BIT 0x00000001
28 #define AT91_EEFC_FCR_KEY 0x5a000000
29 #define AT91_EEFC_FCR_FARG_MASK 0x00ffff00
31 #define AT91_EEFC_FCR_FCMD_GETD 0x0
32 #define AT91_EEFC_FCR_FCMD_WP 0x1
33 #define AT91_EEFC_FCR_FCMD_WPL 0x2
34 #define AT91_EEFC_FCR_FCMD_EWP 0x3
35 #define AT91_EEFC_FCR_FCMD_EWPL 0x4
36 #define AT91_EEFC_FCR_FCMD_EA 0x5
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dstm32mp157.dtsi13 reg = <0x59000000 0x800>;
22 reg = <0x5a000000 0x800>;
28 #size-cells = <0>;
33 #size-cells = <0>;
H A Duniphier-sld8.dtsi17 #size-cells = <0>;
19 cpu@0 {
22 reg = <0>;
36 #clock-cells = <0>;
41 #clock-cells = <0>;
56 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
57 <0x506c0000 0x400>;
58 interrupts = <0 174 4>, <0 175 4>;
69 reg = <0x54006000 0x100>;
71 #size-cells = <0>;
[all …]
H A Duniphier-ld4.dtsi17 #size-cells = <0>;
19 cpu@0 {
22 reg = <0>;
36 #clock-cells = <0>;
41 #clock-cells = <0>;
56 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
57 <0x506c0000 0x400>;
58 interrupts = <0 174 4>, <0 175 4>;
69 reg = <0x54006000 0x100>;
71 #size-cells = <0>;
[all …]
H A Duniphier-pro4.dtsi17 #size-cells = <0>;
19 cpu@0 {
22 reg = <0>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
64 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
65 <0x506c0000 0x400>;
66 interrupts = <0 174 4>, <0 175 4>;
77 reg = <0x54006000 0x100>;
79 #size-cells = <0>;
[all …]
H A Duniphier-pxs2.dtsi18 #size-cells = <0>;
20 cpu0: cpu@0 {
23 reg = <0>;
111 #clock-cells = <0>;
116 #clock-cells = <0>;
162 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
163 <0x506c0000 0x400>;
164 interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>;
175 reg = <0x54006000 0x100>;
177 #size-cells = <0>;
[all …]
/OK3568_Linux_fs/kernel/arch/h8300/include/asm/
H A Dtraps.h22 #define JMP_OP 0x5a000000
23 #define JSR_OP 0x5e000000
26 #define CPU_VECTOR ((unsigned long *)0x000000)
27 #define ADDR_MASK (0xffffff)
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/
H A Dsamsung,s3cmci.txt21 - pinctrl-0: Should specify pin control groups used for this controller.
34 pinctrl-0 = <&sdi_pins>;
35 reg = <0x5a000000 0x100000>;
36 interrupts = <0 0 21 3>;
H A Dcdns,sdhci.yaml34 # sampling clock. The delay starts from 5ns (for delay parameter equal to 0)
40 minimum: 0
41 maximum: 0x1f
46 minimum: 0
47 maximum: 0x1f
52 minimum: 0
53 maximum: 0x1f
58 minimum: 0
59 maximum: 0x1f
64 minimum: 0
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/dma/
H A Dsocionext,uniphier-mio-dmac.yaml52 // In the example below, "interrupts = <0 68 4>, <0 68 4>, ..." is not a
57 reg = <0x5a000000 0x1000>;
58 interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>,
59 <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>;
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/
H A Dst,stm32-dsi.yaml61 port@0:
90 reg = <0x5a000000 0x800>;
98 #size-cells = <0>;
102 #size-cells = <0>;
104 port@0 {
105 reg = <0>;
119 panel-dsi@0 {
121 reg = <0>;
/OK3568_Linux_fs/kernel/arch/arm/mach-s3c/
H A Dmap-s3c24xx.h19 #define S3C2410_PA_IRQ (0x4A000000)
23 #define S3C2410_PA_MEMCTRL (0x48000000)
27 #define S3C2410_PA_TIMER (0x51000000)
34 #define S3C2410_PA_USBDEV (0x52000000)
38 #define S3C2410_PA_WATCHDOG (0x53000000)
52 #define S3C2410_PA_USBHOST (0x49000000)
55 #define S3C2416_PA_HSUDC (0x49800000)
59 #define S3C2410_PA_DMA (0x4B000000)
63 #define S3C2410_PA_CLKPWR (0x4C000000)
66 #define S3C2410_PA_LCD (0x4D000000)
[all …]
/OK3568_Linux_fs/kernel/crypto/
H A Dmichael_mic.c30 return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8); in xswap()
44 } while (0)
51 mctx->pending_len = 0; in michael_init()
55 return 0; in michael_init()
74 return 0; in michael_update()
78 mctx->pending_len = 0; in michael_update()
88 if (len > 0) { in michael_update()
93 return 0; in michael_update()
102 /* Last block and padding (0x5a, 4..7 x 0) */ in michael_final()
104 case 0: in michael_final()
[all …]
H A Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/OK3568_Linux_fs/kernel/drivers/watchdog/
H A Dbcm2835_wdt.c23 #define PM_RSTC 0x1c
24 #define PM_RSTS 0x20
25 #define PM_WDOG 0x24
27 #define PM_PASSWORD 0x5a000000
29 #define PM_WDOG_TIME_SET 0x000fffff
30 #define PM_RSTC_WRCFG_CLR 0xffffffcf
31 #define PM_RSTS_HADWRH_SET 0x00000040
32 #define PM_RSTC_WRCFG_SET 0x00000030
33 #define PM_RSTC_WRCFG_FULL_RESET 0x00000020
34 #define PM_RSTC_RESET 0x00000102
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Duniphier-ld11.dtsi10 /memreserve/ 0x80000000 0x02000000;
20 #size-cells = <0>;
33 cpu0: cpu@0 {
36 reg = <0 0x000>;
45 reg = <0 0x001>;
94 #clock-cells = <0>;
107 soc@0 {
111 ranges = <0 0 0 0xffffffff>;
116 reg = <0x54006800 0x40>;
117 interrupts = <0 33 4>;
[all …]
H A Duniphier-pxs3.dtsi10 /memreserve/ 0x80000000 0x02000000;
20 #size-cells = <0>;
39 cpu0: cpu@0 {
42 reg = <0 0x000>;
51 reg = <0 0x001>;
60 reg = <0 0x002>;
69 reg = <0 0x003>;
122 #clock-cells = <0>;
135 soc@0 {
139 ranges = <0 0 0 0xffffffff>;
[all …]
H A Duniphier-ld20.dtsi10 /memreserve/ 0x80000000 0x02000000;
20 #size-cells = <0>;
42 cpu0: cpu@0 {
45 reg = <0 0x000>;
54 reg = <0 0x001>;
63 reg = <0 0x100>;
72 reg = <0 0x101>;
163 #clock-cells = <0>;
176 soc@0 {
180 ranges = <0 0 0 0xffffffff>;
[all …]
H A Duniphier-pxs2.dtsi17 #size-cells = <0>;
19 cpu@0 {
22 reg = <0>;
106 #clock-cells = <0>;
111 #clock-cells = <0>;
127 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
128 <0x506c0000 0x400>;
129 interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>;
140 reg = <0x54006800 0x40>;
141 interrupts = <0 33 4>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-omap2/
H A Diomap.h33 #define OMAP2_L3_IO_OFFSET 0x90000000
36 #define OMAP2_L4_IO_OFFSET 0xb2000000
39 #define OMAP4_L3_IO_OFFSET 0xb4000000
42 #define AM33XX_L4_WK_IO_OFFSET 0xb5000000
45 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000
48 #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
58 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
61 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
65 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
70 /* 0x6e000000 --> 0xfe000000 */
[all …]
/OK3568_Linux_fs/kernel/drivers/soc/bcm/
H A Dbcm2835-power.c19 #define PM_GNRIC 0x00
20 #define PM_AUDIO 0x04
21 #define PM_STATUS 0x18
22 #define PM_RSTC 0x1c
23 #define PM_RSTS 0x20
24 #define PM_WDOG 0x24
25 #define PM_PADS0 0x28
26 #define PM_PADS2 0x2c
27 #define PM_PADS3 0x30
28 #define PM_PADS4 0x34
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/socionext/
H A Duniphier-ld11.dtsi19 #size-cells = <0>;
32 cpu0: cpu@0 {
35 reg = <0 0x000>;
44 reg = <0 0x001>;
93 #clock-cells = <0>;
117 reg = <0x0 0x81000000 0x0 0x01000000>;
122 soc@0 {
126 ranges = <0 0 0 0xffffffff>;
131 reg = <0x54006000 0x100>;
133 #size-cells = <0>;
[all …]
H A Duniphier-pxs3.dtsi20 #size-cells = <0>;
39 cpu0: cpu@0 {
42 reg = <0 0x000>;
52 reg = <0 0x001>;
62 reg = <0 0x002>;
72 reg = <0 0x003>;
126 #clock-cells = <0>;
181 reg = <0x0 0x81000000 0x0 0x01000000>;
186 soc@0 {
190 ranges = <0 0 0 0xffffffff>;
[all …]
H A Duniphier-ld20.dtsi20 #size-cells = <0>;
42 cpu0: cpu@0 {
45 reg = <0 0x000>;
55 reg = <0 0x001>;
65 reg = <0 0x100>;
75 reg = <0 0x101>;
167 #clock-cells = <0>;
222 reg = <0x0 0x81000000 0x0 0x01000000>;
227 soc@0 {
231 ranges = <0 0 0 0xffffffff>;
[all …]

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