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/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/video/
H A Dtegra20-dc.txt43 reg = <0x50000000 0x00024000>;
44 interrupts = <0 65 0x04 /* mpcore syncpt */
45 0 67 0x04>; /* mpcore general */
51 ranges = <0x54000000 0x54000000 0x04000000>;
55 reg = <0x54200000 0x00040000>;
56 interrupts = <0 73 0x04>;
79 nvidia,pwm = <&pwm 2 0>;
80 nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */
81 nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
82 nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/
H A Dmarvell,pxa300-gcu.txt14 reg = <0x54000000 0x1000>;
/OK3568_Linux_fs/kernel/arch/arm/mach-omap2/
H A Domap44xx.h17 #define L4_44XX_BASE 0x4a000000
18 #define L4_WK_44XX_BASE 0x4a300000
19 #define L4_PER_44XX_BASE 0x48000000
20 #define L4_EMU_44XX_BASE 0x54000000
21 #define L3_44XX_BASE 0x44000000
22 #define OMAP44XX_EMIF1_BASE 0x4c000000
23 #define OMAP44XX_EMIF2_BASE 0x4d000000
24 #define OMAP44XX_DMM_BASE 0x4e000000
25 #define OMAP4430_32KSYNCT_BASE 0x4a304000
26 #define OMAP4430_CM1_BASE 0x4a004000
[all …]
H A Domap34xx.h17 #define L4_34XX_BASE 0x48000000
18 #define L4_WK_34XX_BASE 0x48300000
19 #define L4_PER_34XX_BASE 0x49000000
20 #define L4_EMU_34XX_BASE 0x54000000
21 #define L3_34XX_BASE 0x68000000
23 #define L4_WK_AM33XX_BASE 0x44C00000
25 #define OMAP3430_32KSYNCT_BASE 0x48320000
26 #define OMAP3430_CM_BASE 0x48004800
27 #define OMAP3430_PRM_BASE 0x48306800
28 #define OMAP343X_SMS_BASE 0x6C000000
[all …]
H A Diomap.h33 #define OMAP2_L3_IO_OFFSET 0x90000000
36 #define OMAP2_L4_IO_OFFSET 0xb2000000
39 #define OMAP4_L3_IO_OFFSET 0xb4000000
42 #define AM33XX_L4_WK_IO_OFFSET 0xb5000000
45 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000
48 #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
58 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
61 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
65 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
70 /* 0x6e000000 --> 0xfe000000 */
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dtegra30-asus-nexus7-tilapia-memory-timings.dtsi13 emc-timings-0 {
17 nvidia,emc-auto-cal-interval = <0x001fffff>;
18 nvidia,emc-mode-1 = <0x80100002>;
19 nvidia,emc-mode-2 = <0x80200018>;
20 nvidia,emc-mode-reset = <0x80000b71>;
21 nvidia,emc-zcal-cnt-long = <0x00000040>;
25 0x0000001f /* EMC_RC */
26 0x00000069 /* EMC_RFC */
27 0x00000017 /* EMC_RAS */
28 0x00000007 /* EMC_RP */
[all …]
H A Ds3c24xx.dtsi23 reg = <0x4a000000 0x100>;
29 reg = <0x56000000 0x1000>;
33 interrupts = <0 0 0 3>,
34 <0 0 1 3>,
35 <0 0 2 3>,
36 <0 0 3 3>,
37 <0 0 4 4>,
38 <0 0 5 4>;
44 reg = <0x51000000 0x1000>;
45 interrupts = <0 0 10 3>, <0 0 11 3>, <0 0 12 3>, <0 0 13 3>, <0 0 14 3>;
[all …]
H A Dtegra114.dtsi17 reg = <0x80000000 0x0>;
22 reg = <0x50000000 0x00028000>;
35 ranges = <0x54000000 0x54000000 0x01000000>;
39 reg = <0x54140000 0x00040000>;
50 reg = <0x54180000 0x00040000>;
60 reg = <0x54200000 0x00040000>;
70 nvidia,head = <0>;
79 reg = <0x54240000 0x00040000>;
98 reg = <0x54280000 0x00040000>;
110 reg = <0x54300000 0x00040000>;
[all …]
H A Dtegra20.dtsi15 memory@0 {
17 reg = <0 0>;
22 reg = <0x40000000 0x40000>;
25 ranges = <0 0x40000000 0x40000>;
28 reg = <0x400 0x3fc00>;
35 reg = <0x50000000 0x00024000>;
47 ranges = <0x54000000 0x54000000 0x04000000>;
51 reg = <0x54040000 0x00040000>;
60 reg = <0x54080000 0x00040000>;
69 reg = <0x540c0000 0x00040000>;
[all …]
H A Dpxa3xx.dtsi6 ((gpio <= 2) ? (0x00b4 + 4 * gpio) : \
7 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
8 (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) : \
9 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
10 0)
12 ((gpio <= 1) ? (0x674 + 4 * gpio) : \
13 (gpio <= 6) ? (0x2dc + 4 * gpio) : \
14 0)
17 ((gpio <= 2) ? (0x00b4 + 4 * gpio) : \
18 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
[all …]
H A Dtegra30.dtsi17 reg = <0x80000000 0x0>;
23 reg = <0x00003000 0x00000800>, /* PADS registers */
24 <0x00003800 0x00000200>, /* AFI registers */
25 <0x10000000 0x10000000>; /* configuration space */
32 interrupt-map-mask = <0 0 0 0>;
33 interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
35 bus-range = <0x00 0xff>;
39 ranges = <0x02000000 0 0x00000000 0x00000000 0 0x00001000>, /* port 0 configuration space */
40 <0x02000000 0 0x00001000 0x00001000 0 0x00001000>, /* port 1 configuration space */
41 <0x02000000 0 0x00004000 0x00004000 0 0x00001000>, /* port 2 configuration space */
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-s3c/
H A Dmap-s3c24xx.h19 #define S3C2410_PA_IRQ (0x4A000000)
23 #define S3C2410_PA_MEMCTRL (0x48000000)
27 #define S3C2410_PA_TIMER (0x51000000)
34 #define S3C2410_PA_USBDEV (0x52000000)
38 #define S3C2410_PA_WATCHDOG (0x53000000)
52 #define S3C2410_PA_USBHOST (0x49000000)
55 #define S3C2416_PA_HSUDC (0x49800000)
59 #define S3C2410_PA_DMA (0x4B000000)
63 #define S3C2410_PA_CLKPWR (0x4C000000)
66 #define S3C2410_PA_LCD (0x4D000000)
[all …]
/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/gpu/
H A Dnvidia,tegra20-host1x.txt244 reg = <0x50000000 0x00024000>;
245 interrupts = <0 65 0x04 /* mpcore syncpt */
246 0 67 0x04>; /* mpcore general */
254 ranges = <0x54000000 0x54000000 0x04000000>;
258 reg = <0x54040000 0x00040000>;
259 interrupts = <0 68 0x04>;
267 reg = <0x54080000 0x00040000>;
268 interrupts = <0 69 0x04>;
276 reg = <0x540c0000 0x00040000>;
277 interrupts = <0 70 0x04>;
[all …]
/OK3568_Linux_fs/u-boot/include/configs/
H A Dzipitz2.h16 #define CONFIG_SYS_TEXT_BASE 0x0
25 #define CONFIG_ENV_ADDR 0x40000
26 #define CONFIG_ENV_SIZE 0x10000
32 "if mmc rescan && ext2load mmc 0 0xa0000000 boot/uboot.script ;"\
34 "source 0xa0000000; " \
36 "bootm 0x50000; " \
41 #define CONFIG_SYS_TEXT_BASE 0x0
59 #define CONFIG_SYS_MMC_BASE 0xF0000000
89 #define CONFIG_SYS_CPUSPEED 0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=System…
94 #define PHYS_SRAM 0x5c000000 /* SRAM Bank #1 */
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-pxa/include/mach/
H A Dhardware.h19 #define UNCACHED_PHYS_0 0xfe000000
20 #define UNCACHED_PHYS_0_SIZE 0x00100000
25 * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff
26 * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff
27 * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff
28 * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff
29 * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff
30 * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff
31 * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff
36 #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra20-host1x.txt81 - reg: csi port number. Valid port numbers are 0 through 5.
95 port@0 with single child 'endpoint' node always a sink.
98 port@0 (required node)
100 - reg: 0
355 reg = <0x50000000 0x00024000>;
356 interrupts = <0 65 0x04 /* mpcore syncpt */
357 0 67 0x04>; /* mpcore general */
365 ranges = <0x54000000 0x54000000 0x04000000>;
369 reg = <0x54040000 0x00040000>;
370 interrupts = <0 68 0x04>;
[all …]
/OK3568_Linux_fs/u-boot/post/lib_powerpc/
H A Dcpu_asm.h10 #define BIT_C 0x00000001
12 #define OP_BLR 0x4e800020
13 #define OP_EXTSB 0x7c000774
14 #define OP_EXTSH 0x7c000734
15 #define OP_NEG 0x7c0000d0
16 #define OP_CNTLZW 0x7c000034
17 #define OP_ADD 0x7c000214
18 #define OP_ADDC 0x7c000014
19 #define OP_ADDME 0x7c0001d4
20 #define OP_ADDZE 0x7c000194
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra30-emc.yaml40 "^emc-timings-[0-9]+$":
49 "^timing-[0-9]+$":
62 minimum: 0
78 Mode Register 0.
85 minimum: 0
224 reg = <0x7000f400 0x400>;
225 interrupts = <0 78 4>;
236 nvidia,emc-auto-cal-interval = <0x001fffff>;
237 nvidia,emc-mode-1 = <0x80100002>;
238 nvidia,emc-mode-2 = <0x80200018>;
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dtegra20.dtsi14 reg = <0x50000000 0x00024000>;
24 ranges = <0x54000000 0x54000000 0x04000000>;
28 reg = <0x54040000 0x00040000>;
37 reg = <0x54080000 0x00040000>;
46 reg = <0x540c0000 0x00040000>;
55 reg = <0x54100000 0x00040000>;
64 reg = <0x54140000 0x00040000>;
73 reg = <0x54180000 0x00040000>;
81 reg = <0x54200000 0x00040000>;
89 nvidia,head = <0>;
[all …]
H A Dtegra114.dtsi15 reg = <0x50000000 0x00028000>;
25 ranges = <0x54000000 0x54000000 0x01000000>;
29 reg = <0x54140000 0x00040000>;
38 reg = <0x54180000 0x00040000>;
46 reg = <0x54200000 0x00040000>;
56 nvidia,head = <0>;
65 reg = <0x54240000 0x00040000>;
84 reg = <0x54280000 0x00040000>;
96 reg = <0x54300000 0x00040000>;
103 nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */
[all …]
H A Dtegra210.dtsi17 reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
18 0x0 0x01003800 0x0 0x00000800 /* AFI registers */
19 0x0 0x02000000 0x0 0x10000000>; /* configuration space */
26 interrupt-map-mask = <0 0 0 0>;
27 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
29 bus-range = <0x00 0xff>;
33 ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */
34 0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */
35 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */
36 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
[all …]
H A Dtegra30.dtsi16 reg = <0x00003000 0x00000800 /* PADS registers */
17 0x00003800 0x00000200 /* AFI registers */
18 0x10000000 0x10000000>; /* configuration space */
25 interrupt-map-mask = <0 0 0 0>;
26 interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
28 bus-range = <0x00 0xff>;
32 ranges = <0x82000000 0 0x00000000 0x00000000 0 0x00001000 /* port 0 configuration space */
33 0x82000000 0 0x00001000 0x00001000 0 0x00001000 /* port 1 configuration space */
34 0x82000000 0 0x00004000 0x00004000 0 0x00001000 /* port 2 configuration space */
35 0x81000000 0 0 0x02000000 0 0x00010000 /* downstream I/O */
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/include/asm/
H A Dinsn.h22 * 0 0 - - Unallocated
23 * 1 0 0 - Data processing, immediate
24 * 1 0 1 - Branch, exception generation and system instructions
25 * - 1 - 0 Loads and stores
26 * - 1 0 1 Data processing - register
27 * 0 1 1 1 Data processing - SIMD and floating point
42 AARCH64_INSN_HINT_NOP = 0x0 << 5,
43 AARCH64_INSN_HINT_YIELD = 0x1 << 5,
44 AARCH64_INSN_HINT_WFE = 0x2 << 5,
45 AARCH64_INSN_HINT_WFI = 0x3 << 5,
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/mediatek/mt76/mt7915/
H A Ddma.c18 err = mt76_queue_alloc(dev, hwq, MT7915_TXQ_BAND0, n_desc, 0, in mt7915_init_tx_queues()
20 if (err < 0) in mt7915_init_tx_queues()
23 for (i = 0; i < MT_TXQ_MCU; i++) in mt7915_init_tx_queues()
26 return 0; in mt7915_init_tx_queues()
39 err = mt76_queue_alloc(dev, hwq, idx, n_desc, 0, MT_TX_RING_BASE); in mt7915_init_mcu_queue()
40 if (err < 0) in mt7915_init_mcu_queue()
45 return 0; in mt7915_init_mcu_queue()
55 type = FIELD_GET(MT_RXD0_PKT_TYPE, le32_to_cpu(rxd[0])); in mt7915_queue_rx_skb()
91 if (napi_complete_done(napi, 0)) in mt7915_poll_tx()
94 return 0; in mt7915_poll_tx()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/
H A Domap_common.h680 /* Initialize general purpose I2C(0) on the SoC */
689 #define OMAP_ABB_NOMINAL_OPP 0
692 #define OMAP_ABB_CONTROL_FAST_OPP_SEL_MASK (0x1 << 0)
693 #define OMAP_ABB_CONTROL_SLOW_OPP_SEL_MASK (0x1 << 1)
694 #define OMAP_ABB_CONTROL_OPP_CHANGE_MASK (0x1 << 2)
695 #define OMAP_ABB_CONTROL_SR2_IN_TRANSITION_MASK (0x1 << 6)
696 #define OMAP_ABB_SETUP_SR2EN_MASK (0x1 << 0)
697 #define OMAP_ABB_SETUP_ACTIVE_FBB_SEL_MASK (0x1 << 2)
698 #define OMAP_ABB_SETUP_ACTIVE_RBB_SEL_MASK (0x1 << 1)
699 #define OMAP_ABB_SETUP_SR2_WTCNT_VALUE_MASK (0xff << 8)
[all …]

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