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/OK3568_Linux_fs/kernel/arch/arm/nwfpe/
H A Dfpopcode.c19 { .high = 0x0000, .low = 0x0000000000000000ULL},/* extended 0.0 */
20 { .high = 0x3fff, .low = 0x8000000000000000ULL},/* extended 1.0 */
21 { .high = 0x4000, .low = 0x8000000000000000ULL},/* extended 2.0 */
22 { .high = 0x4000, .low = 0xc000000000000000ULL},/* extended 3.0 */
23 { .high = 0x4001, .low = 0x8000000000000000ULL},/* extended 4.0 */
24 { .high = 0x4001, .low = 0xa000000000000000ULL},/* extended 5.0 */
25 { .high = 0x3ffe, .low = 0x8000000000000000ULL},/* extended 0.5 */
26 { .high = 0x4002, .low = 0xa000000000000000ULL},/* extended 10.0 */
31 0x0000000000000000ULL, /* double 0.0 */
32 0x3ff0000000000000ULL, /* double 1.0 */
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/crypto/
H A Dti,sa2ul.yaml70 reg = <0x4e00000 0x1200>;
72 dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>,
73 <&main_udmap 0x4001>;
/OK3568_Linux_fs/external/common_algorithm/misc/include/
H A Drtsp_demo.h19 RTSP_CODEC_ID_NONE = 0,
20 RTSP_CODEC_ID_VIDEO_H264 = 0x0001, /*codec_data is SPS + PPS frames*/
23 RTSP_CODEC_ID_AUDIO_G711A = 0x4001, /*codec_data is NULL*/
/OK3568_Linux_fs/kernel/drivers/staging/comedi/drivers/
H A Ddas08_cs.c59 dev->board_ptr = &das08_cs_boards[0]; in das08_cs_auto_attach()
65 iobase = link->resource[0]->start; in das08_cs_auto_attach()
87 PCMCIA_DEVICE_MANF_CARD(0x01c5, 0x4001),
/OK3568_Linux_fs/u-boot/drivers/bios_emulator/
H A Dbiosemu.c52 BE_sysEnv _BE_env = {{0}};
71 #define OFF(addr) (u16)(((addr) >> 0) & 0xffff)
72 #define SEG(addr) (u16)(((addr) >> 4) & 0xf000)
82 BIOS image as the BIOS that is used and emulated at 0xC0000.
90 memset(&M, 0, sizeof(M)); in BE_init()
93 return 0; in BE_init()
100 return 0; in BE_init()
104 _BE_env.emulateVGA = 0; in BE_init()
108 return 0; in BE_init()
142 _BE_env.biosmem_limit = 0xC0000 + info->BIOSImageLen - 1; in BE_setVGA()
[all …]
/OK3568_Linux_fs/kernel/include/linux/
H A DmISDNif.h44 * <16 bit 0 >
59 #define MISDN_CMDMASK 0xff00
60 #define MISDN_LAYERMASK 0x00ff
63 #define OPEN_CHANNEL 0x0100
64 #define CLOSE_CHANNEL 0x0200
65 #define CONTROL_CHANNEL 0x0300
66 #define CHECK_DATA 0x0400
69 #define PH_ACTIVATE_REQ 0x0101
70 #define PH_DEACTIVATE_REQ 0x0201
71 #define PH_DATA_REQ 0x2001
[all …]
/OK3568_Linux_fs/kernel/include/uapi/linux/
H A Dmedia-bus-format.h16 * These bus formats uniquely identify data formats on the data bus. Format 0
35 #define MEDIA_BUS_FMT_FIXED 0x0001
37 /* RGB - next is 0x1024 */
38 #define MEDIA_BUS_FMT_RGB444_1X12 0x1016
39 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001
40 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002
41 #define MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE 0x1003
42 #define MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE 0x1004
43 #define MEDIA_BUS_FMT_RGB565_1X16 0x1017
44 #define MEDIA_BUS_FMT_BGR565_2X8_BE 0x1005
[all …]
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/include/linux/
H A Dmedia-bus-format.h16 * These bus formats uniquely identify data formats on the data bus. Format 0
35 #define MEDIA_BUS_FMT_FIXED 0x0001
37 /* RGB - next is 0x101b */
38 #define MEDIA_BUS_FMT_RGB444_1X12 0x1016
39 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001
40 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002
41 #define MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE 0x1003
42 #define MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE 0x1004
43 #define MEDIA_BUS_FMT_RGB565_1X16 0x1017
44 #define MEDIA_BUS_FMT_BGR565_2X8_BE 0x1005
[all …]
/OK3568_Linux_fs/u-boot/include/linux/
H A Dmedia-bus-format.h16 * These bus formats uniquely identify data formats on the data bus. Format 0
35 #define MEDIA_BUS_FMT_FIXED 0x0001
37 /* RGB - next is 0x1024 */
38 #define MEDIA_BUS_FMT_RGB444_1X12 0x1016
39 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001
40 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002
41 #define MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE 0x1003
42 #define MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE 0x1004
43 #define MEDIA_BUS_FMT_RGB565_1X16 0x1017
44 #define MEDIA_BUS_FMT_BGR565_2X8_BE 0x1005
[all …]
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/include/linux/
H A Dmedia-bus-format.h16 * These bus formats uniquely identify data formats on the data bus. Format 0
35 #define MEDIA_BUS_FMT_FIXED 0x0001
37 /* RGB - next is 0x101b */
38 #define MEDIA_BUS_FMT_RGB444_1X12 0x1016
39 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001
40 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002
41 #define MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE 0x1003
42 #define MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE 0x1004
43 #define MEDIA_BUS_FMT_RGB565_1X16 0x1017
44 #define MEDIA_BUS_FMT_BGR565_2X8_BE 0x1005
[all …]
/OK3568_Linux_fs/kernel/drivers/dma/ti/
H A Dk3-psil-am654.c54 PSIL_SA2UL(0x4000, 0),
55 PSIL_SA2UL(0x4001, 0),
56 PSIL_SA2UL(0x4002, 0),
57 PSIL_SA2UL(0x4003, 0),
59 PSIL_ETHERNET(0x4100),
60 PSIL_ETHERNET(0x4101),
61 PSIL_ETHERNET(0x4102),
62 PSIL_ETHERNET(0x4103),
64 PSIL_ETHERNET(0x4200),
65 PSIL_ETHERNET(0x4201),
[all …]
H A Dk3-psil-j721e.c64 PSIL_SA2UL(0x4000, 0),
65 PSIL_SA2UL(0x4001, 0),
66 PSIL_SA2UL(0x4002, 0),
67 PSIL_SA2UL(0x4003, 0),
69 PSIL_ETHERNET(0x4100),
70 PSIL_ETHERNET(0x4101),
71 PSIL_ETHERNET(0x4102),
72 PSIL_ETHERNET(0x4103),
74 PSIL_ETHERNET(0x4200),
75 PSIL_ETHERNET(0x4201),
[all …]
/OK3568_Linux_fs/kernel/drivers/media/i2c/
H A Dov5640.c32 #define OV5640_DEFAULT_SLAVE_ID 0x3c
34 #define OV5640_REG_SYS_RESET02 0x3002
35 #define OV5640_REG_SYS_CLOCK_ENABLE02 0x3006
36 #define OV5640_REG_SYS_CTRL0 0x3008
37 #define OV5640_REG_SYS_CTRL0_SW_PWDN 0x42
38 #define OV5640_REG_SYS_CTRL0_SW_PWUP 0x02
39 #define OV5640_REG_CHIP_ID 0x300a
40 #define OV5640_REG_IO_MIPI_CTRL00 0x300e
41 #define OV5640_REG_PAD_OUTPUT_ENABLE01 0x3017
42 #define OV5640_REG_PAD_OUTPUT_ENABLE02 0x3018
[all …]
H A Dov8858.c6 * V0.0X01.0X02 fix mclk issue when probe multiple camera.
7 * V0.0X01.0X03 add enum_frame_interval function.
8 * V0.0X01.0X04 add quick stream on/off
9 * V0.0X01.0X05 add function g_mbus_config
10 * V0.0X01.0X06
43 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x06)
53 #define CHIP_ID 0x008858
54 #define OV8858_REG_CHIP_ID 0x300a
56 #define OV8858_REG_CTRL_MODE 0x0100
57 #define OV8858_MODE_SW_STANDBY 0x0
[all …]
H A Dos04a10.c7 * V0.0X01.0X00 first version.
8 * V0.0X01.0X01 support conversion gain switch.
9 * V0.0X01.0X02 add debug interface for conversion gain switch.
10 * V0.0X01.0X03 support enum sensor fmt
11 * V0.0X01.0X04 add quick stream on/off
12 * V0.0X01.0X05 support get dcg ratio from sensor
37 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x05)
55 #define CHIP_ID 0x530441
56 #define OS04A10_REG_CHIP_ID 0x300a
58 #define OS04A10_REG_CTRL_MODE 0x0100
[all …]
H A Dov8856.c28 #define OV8856_REG_CHIP_ID 0x300a
29 #define OV8856_CHIP_ID 0x00885a
31 #define OV8856_REG_MODE_SELECT 0x0100
32 #define OV8856_MODE_STANDBY 0x00
33 #define OV8856_MODE_STREAMING 0x01
36 #define OV8856_2A_MODULE 0x01
37 #define OV8856_1B_MODULE 0x02
39 /* the OTP read-out buffer is at 0x7000 and 0xf is the offset
42 #define OV8856_MODULE_REVISION 0x700f
43 #define OV8856_OTP_MODE_CTRL 0x3d84
[all …]
H A Dov13858.c16 #define OV13858_REG_MODE_SELECT 0x0100
17 #define OV13858_MODE_STANDBY 0x00
18 #define OV13858_MODE_STREAMING 0x01
20 #define OV13858_REG_SOFTWARE_RST 0x0103
21 #define OV13858_SOFTWARE_RST 0x01
24 #define OV13858_REG_PLL1_CTRL_0 0x0300
25 #define OV13858_REG_PLL1_CTRL_1 0x0301
26 #define OV13858_REG_PLL1_CTRL_2 0x0302
27 #define OV13858_REG_PLL1_CTRL_3 0x0303
28 #define OV13858_REG_PLL1_CTRL_4 0x0304
[all …]
/OK3568_Linux_fs/u-boot/drivers/ufs/
H A Dunipro.h8 #define TX_HIBERN8TIME_CAPABILITY 0x000F
9 #define TX_MODE 0x0021
10 #define TX_HSRATE_SERIES 0x0022
11 #define TX_HSGEAR 0x0023
12 #define TX_PWMGEAR 0x0024
13 #define TX_AMPLITUDE 0x0025
14 #define TX_HS_SLEWRATE 0x0026
15 #define TX_SYNC_SOURCE 0x0027
16 #define TX_HS_SYNC_LENGTH 0x0028
17 #define TX_HS_PREPARE_LENGTH 0x0029
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/include/asm/
H A Dperf_event.h18 #define ARMV8_PMUV3_PERFCTR_SW_INCR 0x00
19 #define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL 0x01
20 #define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL 0x02
21 #define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x03
22 #define ARMV8_PMUV3_PERFCTR_L1D_CACHE 0x04
23 #define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL 0x05
24 #define ARMV8_PMUV3_PERFCTR_LD_RETIRED 0x06
25 #define ARMV8_PMUV3_PERFCTR_ST_RETIRED 0x07
26 #define ARMV8_PMUV3_PERFCTR_INST_RETIRED 0x08
27 #define ARMV8_PMUV3_PERFCTR_EXC_TAKEN 0x09
[all …]
/OK3568_Linux_fs/u-boot/arch/x86/include/asm/arch-quark/
H A Dquark.h11 #define MSG_PORT_MEM_ARBITER 0x00
12 #define MSG_PORT_HOST_BRIDGE 0x03
13 #define MSG_PORT_RMU 0x04
14 #define MSG_PORT_MEM_MGR 0x05
15 #define MSG_PORT_USB_AFE 0x14
16 #define MSG_PORT_PCIE_AFE 0x16
17 #define MSG_PORT_SOC_UNIT 0x31
19 /* Port 0x00: Memory Arbiter Message Port Registers */
22 #define AEC_CTRL 0x00
24 /* Port 0x03: Host Bridge Message Port Registers */
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/
H A Dhub.fuc30 gpc_count: .b32 0
31 rop_count: .b32 0
34 ctx_current: .b32 0
38 chan_mmio_count: .b32 0
39 chan_mmio_address: .b32 0
45 .b32 0x0417e91c // 0x17e91c, 2
55 nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_VAL(5), 0, $r15)
57 nv_iowr(NV_PGRAPH_FECS_INTR_UP_SET, 0, $r15)
64 // CC_SCRATCH[0]:
67 // 31:0: total PGRAPH context size
[all …]
/OK3568_Linux_fs/kernel/arch/sh/kernel/cpu/sh4/
H A Dprobe.c28 pvr = (__raw_readl(CCN_PVR) >> 8) & 0xffffff; in cpu_probe()
29 prr = (__raw_readl(CCN_PRR) >> 4) & 0xff; in cpu_probe()
56 if (((pvr >> 16) & 0xff) == 0x10) { in cpu_probe()
59 if ((cvr & 0x10000000) == 0) { in cpu_probe()
65 boot_cpu_data.cut_major = pvr & 0x7f; in cpu_probe()
76 if ((cvr & 0x20000000)) in cpu_probe()
80 pvr &= 0xffff; in cpu_probe()
87 case 0x205: in cpu_probe()
92 case 0x206: in cpu_probe()
97 case 0x1100: in cpu_probe()
[all …]
/OK3568_Linux_fs/kernel/drivers/scsi/ufs/
H A Dunipro.h14 #define TX_HIBERN8TIME_CAPABILITY 0x000F
15 #define TX_MODE 0x0021
16 #define TX_HSRATE_SERIES 0x0022
17 #define TX_HSGEAR 0x0023
18 #define TX_PWMGEAR 0x0024
19 #define TX_AMPLITUDE 0x0025
20 #define TX_HS_SLEWRATE 0x0026
21 #define TX_SYNC_SOURCE 0x0027
22 #define TX_HS_SYNC_LENGTH 0x0028
23 #define TX_HS_PREPARE_LENGTH 0x0029
[all …]
/OK3568_Linux_fs/kernel/drivers/phy/cadence/
H A Dphy-cadence-salvo.c19 #define PHY_PMA_CMN_CTRL1 0xC800
20 #define TB_ADDR_CMN_DIAG_HSCLK_SEL 0x01e0
21 #define TB_ADDR_CMN_PLL0_VCOCAL_INIT_TMR 0x0084
22 #define TB_ADDR_CMN_PLL0_VCOCAL_ITER_TMR 0x0085
23 #define TB_ADDR_CMN_PLL0_INTDIV 0x0094
24 #define TB_ADDR_CMN_PLL0_FRACDIV 0x0095
25 #define TB_ADDR_CMN_PLL0_HIGH_THR 0x0096
26 #define TB_ADDR_CMN_PLL0_SS_CTRL1 0x0098
27 #define TB_ADDR_CMN_PLL0_SS_CTRL2 0x0099
28 #define TB_ADDR_CMN_PLL0_DSM_DIAG 0x0097
[all …]
/OK3568_Linux_fs/kernel/drivers/net/usb/
H A Dpegasus.h9 #define PEGASUS_II 0x80000000
10 #define HAS_HOME_PNA 0x40000000
14 #define EPROM_WRITE 0x01
15 #define EPROM_READ 0x02
16 #define EPROM_DONE 0x04
17 #define EPROM_WR_ENABLE 0x10
18 #define EPROM_LOAD 0x20
20 #define PHY_DONE 0x80
21 #define PHY_READ 0x40
22 #define PHY_WRITE 0x20
[all …]

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