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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/soc/ti/
H A Dk3-ringacc.yaml85 reg = <0x0 0x3c000000 0x0 0x400000>,
86 <0x0 0x38000000 0x0 0x400000>,
87 <0x0 0x31120000 0x0 0x100>,
88 <0x0 0x33000000 0x0 0x40000>;
91 ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
/OK3568_Linux_fs/u-boot/board/Marvell/db-mv784mp-gp/
H A Ddb-mv784mp-gp.c16 #define ETH_PHY_CTRL_REG 0
22 * "u-boot-2011.12-2014_T1.0" for the board rd78460gp aka
39 #define RD_78460_GP_GPP_OUT_ENA_HIGH (~(0x0))
43 #define RD_78460_GP_GPP_OUT_VAL_HIGH 0x0
48 writel(0x00000000, MVEBU_MPP_BASE + 0x00); in board_early_init_f()
49 writel(0x00000000, MVEBU_MPP_BASE + 0x04); in board_early_init_f()
50 writel(0x33000000, MVEBU_MPP_BASE + 0x08); in board_early_init_f()
51 writel(0x11000000, MVEBU_MPP_BASE + 0x0c); in board_early_init_f()
52 writel(0x11111111, MVEBU_MPP_BASE + 0x10); in board_early_init_f()
53 writel(0x00221100, MVEBU_MPP_BASE + 0x14); in board_early_init_f()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_default.h26 #define cfgNB_NBCFG0_NB_VENDOR_ID_DEFAULT 0x00000000
27 #define cfgNB_NBCFG0_NB_DEVICE_ID_DEFAULT 0x00000000
28 #define cfgNB_NBCFG0_NB_COMMAND_DEFAULT 0x00000000
29 #define cfgNB_NBCFG0_NB_STATUS_DEFAULT 0x00000000
30 #define cfgNB_NBCFG0_NB_REVISION_ID_DEFAULT 0x00000000
31 #define cfgNB_NBCFG0_NB_REGPROG_INF_DEFAULT 0x00000000
32 #define cfgNB_NBCFG0_NB_SUB_CLASS_DEFAULT 0x00000000
33 #define cfgNB_NBCFG0_NB_BASE_CODE_DEFAULT 0x00000000
34 #define cfgNB_NBCFG0_NB_CACHE_LINE_DEFAULT 0x00000000
35 #define cfgNB_NBCFG0_NB_LATENCY_DEFAULT 0x00000000
[all …]
H A Dnbio_6_1_default.h26 #define cfgPSWUSCFG0_VENDOR_ID_DEFAULT 0x00000000
27 #define cfgPSWUSCFG0_DEVICE_ID_DEFAULT 0x00000000
28 #define cfgPSWUSCFG0_COMMAND_DEFAULT 0x00000000
29 #define cfgPSWUSCFG0_STATUS_DEFAULT 0x00000000
30 #define cfgPSWUSCFG0_REVISION_ID_DEFAULT 0x00000000
31 #define cfgPSWUSCFG0_PROG_INTERFACE_DEFAULT 0x00000000
32 #define cfgPSWUSCFG0_SUB_CLASS_DEFAULT 0x00000000
33 #define cfgPSWUSCFG0_BASE_CLASS_DEFAULT 0x00000000
34 #define cfgPSWUSCFG0_CACHE_LINE_DEFAULT 0x00000000
35 #define cfgPSWUSCFG0_LATENCY_DEFAULT 0x00000000
[all …]
H A Dnbio_2_3_default.h26 #define mmBIF_BX_PF_MM_INDEX_DEFAULT 0x00000000
27 #define mmBIF_BX_PF_MM_DATA_DEFAULT 0x00000000
28 #define mmBIF_BX_PF_MM_INDEX_HI_DEFAULT 0x00000000
32 #define mmSYSHUB_INDEX_OVLP_DEFAULT 0x00000000
33 #define mmSYSHUB_DATA_OVLP_DEFAULT 0x00000000
34 #define mmPCIE_INDEX_DEFAULT 0x00000000
35 #define mmPCIE_DATA_DEFAULT 0x00000000
36 #define mmPCIE_INDEX2_DEFAULT 0x00000000
37 #define mmPCIE_DATA2_DEFAULT 0x00000000
38 #define mmSBIOS_SCRATCH_0_DEFAULT 0x00000000
[all …]
/OK3568_Linux_fs/u-boot/include/configs/
H A Dsmdkc100.h32 #define CONFIG_SYS_SDRAM_BASE 0x30000000
35 #define CONFIG_SYS_TEXT_BASE 0x34800000
44 * 1MB = 0x100000, 0x100000 = 1024 * 1024
51 #define CONFIG_SERIAL0 1 /* use SERIAL 0 on SMDKC100 */
69 #define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x40000;" \
70 " onenand write 0x32008000 0x0 0x40000\0"
76 "onenand erase 0x60000 0x300000;" \
77 "onenand write 0x31008000 0x60000 0x300000\0" \
80 "onenand write 0x32000000 0x1260000 0x8C0000\0" \
82 "onenand read 0x30007FC0 0x60000 0x300000;" \
[all …]
H A Ds5p_goni.h29 #define CONFIG_SYS_SDRAM_BASE 0x30000000
32 #define CONFIG_SYS_TEXT_BASE 0x34800000
63 #define CONFIG_G_DNL_THOR_VENDOR_NUM 0x04E8
64 #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
65 #define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525
66 #define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5
77 ",60m(qboot)\0"
89 "u-boot raw 0x80 0x400;" \
90 "uImage ext4 0 2;" \
91 "exynos3-goni.dtb ext4 0 2;" \
[all …]
/OK3568_Linux_fs/kernel/drivers/media/platform/sti/bdisp/
H A Dbdisp-reg.h8 /* 0 - General */
87 #define BLT_CTL 0x0A00
88 #define BLT_ITS 0x0A04
89 #define BLT_STA1 0x0A08
90 #define BLT_AQ1_CTL 0x0A60
91 #define BLT_AQ1_IP 0x0A64
92 #define BLT_AQ1_LNA 0x0A68
93 #define BLT_AQ1_STA 0x0A6C
94 #define BLT_ITM0 0x0AD0
96 #define BLT_PLUGS1_OP2 0x0B04
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/
H A Darasan,sdhci.yaml129 enum: [0, 1]
150 enum: [0, 2]
151 default: 0
172 reg = <0xe0100000 0x1000>;
176 interrupts = <0 24 4>;
182 reg = <0xe2800000 0x1000>;
186 interrupts = <0 24 4>;
197 reg = <0xfe330000 0x10000>;
207 #clock-cells = <0>;
214 interrupts = <0 48 4>;
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/ath/ath5k/
H A Drfbuffer.h108 AR5K_RF_TURBO = 0,
165 #define AR5K_RF5111_RF_TURBO { 1, 3, 0 }
168 #define AR5K_RF5111_OB_2GHZ { 3, 119, 0 }
169 #define AR5K_RF5111_DB_2GHZ { 3, 122, 0 }
171 #define AR5K_RF5111_OB_5GHZ { 3, 104, 0 }
172 #define AR5K_RF5111_DB_5GHZ { 3, 107, 0 }
174 #define AR5K_RF5111_PWD_XPD { 1, 95, 0 }
175 #define AR5K_RF5111_XPD_GAIN { 4, 96, 0 }
181 #define AR5K_RF5111_GAIN_I { 6, 29, 0 }
182 #define AR5K_RF5111_PLO_SEL { 1, 4, 0 }
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/include/asm/
H A Dinsn.h22 * 0 0 - - Unallocated
23 * 1 0 0 - Data processing, immediate
24 * 1 0 1 - Branch, exception generation and system instructions
25 * - 1 - 0 Loads and stores
26 * - 1 0 1 Data processing - register
27 * 0 1 1 1 Data processing - SIMD and floating point
42 AARCH64_INSN_HINT_NOP = 0x0 << 5,
43 AARCH64_INSN_HINT_YIELD = 0x1 << 5,
44 AARCH64_INSN_HINT_WFE = 0x2 << 5,
45 AARCH64_INSN_HINT_WFI = 0x3 << 5,
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/ti/
H A Dk3-j7200-main.dtsi11 reg = <0x00 0x70000000 0x00 0x100000>;
14 ranges = <0x00 0x00 0x70000000 0x100000>;
16 atf-sram@0 {
17 reg = <0x00 0x20000>;
23 reg = <0x00 0x00100000 0x00 0x1c000>;
26 ranges = <0x00 0x00 0x00100000 0x1c000>;
31 mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
32 <0x4088 0x3>, <0x408c 0x3>; /* SERDES0 lane2/3 select */
38 mux-reg-masks = <0x4000 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */
49 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
[all …]
H A Dk3-am65-main.dtsi12 reg = <0x0 0x70000000 0x0 0x200000>;
15 ranges = <0x0 0x0 0x70000000 0x200000>;
17 atf-sram@0 {
18 reg = <0x0 0x20000>;
22 reg = <0xf0000 0x10000>;
26 reg = <0x100000 0x100000>;
37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
38 <0x00 0x01880000 0x00 0x90000>, /* GICR */
39 <0x00 0x6f000000 0x00 0x2000>, /* GICC */
40 <0x00 0x6f010000 0x00 0x1000>, /* GICH */
[all …]
H A Dk3-j721e-main.dtsi13 #clock-cells = <0>;
15 clock-frequency = <0>;
19 #clock-cells = <0>;
21 clock-frequency = <0>;
28 reg = <0x0 0x70000000 0x0 0x800000>;
31 ranges = <0x0 0x0 0x70000000 0x800000>;
33 atf-sram@0 {
34 reg = <0x0 0x20000>;
40 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */
43 ranges = <0x0 0x0 0x00100000 0x1c000>;
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphytbl_n.c11 0x08004a04,
12 0x00100000,
13 0x01000a05,
14 0x00100020,
15 0x09804506,
16 0x00100030,
17 0x09804507,
18 0x00100030,
19 0x00000000,
20 0x00000000,
[all …]
/OK3568_Linux_fs/kernel/arch/hexagon/kernel/
H A Dvm_init_segtable.S16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/
H A Dimx8mn.dtsi44 #size-cells = <0>;
51 arm,psci-suspend-param = <0x0010033>;
59 A53_0: cpu@0 {
62 reg = <0x0>;
77 reg = <0x1>;
90 reg = <0x2>;
103 reg = <0x3>;
125 opp-supported-hw = <0xb00>, <0x7>;
133 opp-supported-hw = <0x300>, <0x7>;
141 opp-supported-hw = <0x100>, <0x3>;
[all …]
H A Dimx8mm.dtsi44 #size-cells = <0>;
51 arm,psci-suspend-param = <0x0010033>;
59 A53_0: cpu@0 {
62 reg = <0x0>;
77 reg = <0x1>;
90 reg = <0x2>;
103 reg = <0x3>;
125 opp-supported-hw = <0xe>, <0x7>;
133 opp-supported-hw = <0xc>, <0x7>;
141 opp-supported-hw = <0x8>, <0x3>;
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/broadcom/b43/
H A Dtables_nphy.c19 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
20 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
21 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
22 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
23 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
24 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
25 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
26 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
27 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
28 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[all …]
/OK3568_Linux_fs/kernel/crypto/
H A Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mx7/
H A Dimx-regs.h12 #define ROM_SW_INFO_ADDR 0x000001E8
13 #define ROMCP_ARB_BASE_ADDR 0x00000000
14 #define ROMCP_ARB_END_ADDR 0x00017FFF
16 #define CAAM_ARB_BASE_ADDR 0x00100000
17 #define CAAM_ARB_END_ADDR 0x00107FFF
18 #define GIC400_ARB_BASE_ADDR 0x31000000
19 #define GIC400_ARB_END_ADDR 0x31007FFF
20 #define APBH_DMA_ARB_BASE_ADDR 0x33000000
21 #define APBH_DMA_ARB_END_ADDR 0x33007FFF
22 #define M4_BOOTROM_BASE_ADDR 0x00180000
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dimx7s.dtsi54 #size-cells = <0>;
61 arm,psci-suspend-param = <0x0010000>;
69 cpu0: cpu@0 {
72 reg = <0>;
82 #clock-cells = <0>;
89 #clock-cells = <0>;
98 #phy-cells = <0>;
106 #phy-cells = <0>;
125 #size-cells = <0>;
127 port@0 {
[all …]
/OK3568_Linux_fs/kernel/drivers/media/usb/cx231xx/
H A Dcx231xx-avcore.c29 #define TUNER_MODE_FM_RADIO 0
55 u32 temp = 0; in verve_read_byte()
64 u32 _gpio_direction = 0; in initGPIO()
65 u32 value = 0; in initGPIO()
66 u8 val = 0; in initGPIO()
68 _gpio_direction = _gpio_direction & 0xFC0003FF; in initGPIO()
69 _gpio_direction = _gpio_direction | 0x03FDFC00; in initGPIO()
70 cx231xx_send_gpio_cmd(dev, _gpio_direction, (u8 *)&value, 4, 0, 0); in initGPIO()
72 verve_read_byte(dev, 0x07, &val); in initGPIO()
73 dev_dbg(dev->dev, "verve_read_byte address0x07=0x%x\n", val); in initGPIO()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/broadcom/
H A Dbnx2.c82 static int disable_msi = 0;
88 BCM5706 = 0,
120 PCI_VENDOR_ID_HP, 0x3101, 0, 0, NC370T },
122 PCI_VENDOR_ID_HP, 0x3106, 0, 0, NC370I },
124 PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5706 },
126 PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5708 },
128 PCI_VENDOR_ID_HP, 0x3102, 0, 0, NC370F },
130 PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5706S },
132 PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5708S },
134 PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5709 },
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/qlogic/qed/
H A Dqed_hsi.h130 #define CORE_PWM_PROD_UPDATE_DATA_AGG_CMD_MASK 0x3
131 #define CORE_PWM_PROD_UPDATE_DATA_AGG_CMD_SHIFT 0
132 #define CORE_PWM_PROD_UPDATE_DATA_RESERVED1_MASK 0x3F /* Set 0 */
162 #define CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG_MASK 0x3
163 #define CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG_SHIFT 0
164 #define CORE_RX_ACTION_ON_ERROR_NO_BUFF_MASK 0x3
166 #define CORE_RX_ACTION_ON_ERROR_RESERVED_MASK 0xF
285 #define CORE_TX_BD_DATA_FORCE_VLAN_MODE_MASK 0x1
286 #define CORE_TX_BD_DATA_FORCE_VLAN_MODE_SHIFT 0
287 #define CORE_TX_BD_DATA_VLAN_INSERTION_MASK 0x1
[all …]