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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_2_3_default.h26 #define mmBIF_BX_PF_MM_INDEX_DEFAULT 0x00000000
27 #define mmBIF_BX_PF_MM_DATA_DEFAULT 0x00000000
28 #define mmBIF_BX_PF_MM_INDEX_HI_DEFAULT 0x00000000
32 #define mmSYSHUB_INDEX_OVLP_DEFAULT 0x00000000
33 #define mmSYSHUB_DATA_OVLP_DEFAULT 0x00000000
34 #define mmPCIE_INDEX_DEFAULT 0x00000000
35 #define mmPCIE_DATA_DEFAULT 0x00000000
36 #define mmPCIE_INDEX2_DEFAULT 0x00000000
37 #define mmPCIE_DATA2_DEFAULT 0x00000000
38 #define mmSBIOS_SCRATCH_0_DEFAULT 0x00000000
[all …]
H A Dnbio_6_1_default.h26 #define cfgPSWUSCFG0_VENDOR_ID_DEFAULT 0x00000000
27 #define cfgPSWUSCFG0_DEVICE_ID_DEFAULT 0x00000000
28 #define cfgPSWUSCFG0_COMMAND_DEFAULT 0x00000000
29 #define cfgPSWUSCFG0_STATUS_DEFAULT 0x00000000
30 #define cfgPSWUSCFG0_REVISION_ID_DEFAULT 0x00000000
31 #define cfgPSWUSCFG0_PROG_INTERFACE_DEFAULT 0x00000000
32 #define cfgPSWUSCFG0_SUB_CLASS_DEFAULT 0x00000000
33 #define cfgPSWUSCFG0_BASE_CLASS_DEFAULT 0x00000000
34 #define cfgPSWUSCFG0_CACHE_LINE_DEFAULT 0x00000000
35 #define cfgPSWUSCFG0_LATENCY_DEFAULT 0x00000000
[all …]
/OK3568_Linux_fs/u-boot/board/xilinx/microblaze-generic/
H A Dxparameters.h20 #define XILINX_GPIO_BASEADDR 0x40000000
23 #define XILINX_FLASH_START 0x2c000000
24 #define XILINX_FLASH_SIZE 0x00800000
27 #define XILINX_WATCHDOG_BASEADDR 0x50000000
/OK3568_Linux_fs/u-boot/include/configs/
H A Dtwister.h32 #define CONFIG_SMC911X_BASE 0x2C000000
36 "bootcmd=run nandboot\0"
39 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000
41 #define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100)
H A Dduovero.h35 #define CONFIG_SMC911X_BASE 0x2C000000
H A Domap3_evm.h26 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
29 #define CONFIG_SPL_TEXT_BASE 0x40200000
64 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
67 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
74 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
90 #define CONFIG_SMC911X_BASE 0x2C000000
98 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
99 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
100 "bootenv=uEnv.txt\0" \
101 "optargs=\0" \
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H A Ddevkit8000.h24 * header. That is 0x800FFFC0--0x80100000 should not be used for any
27 #define CONFIG_SYS_TEXT_BASE 0x80100000
29 #define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/
30 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
32 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
33 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
54 #define CONFIG_DM9000_BASE 0x2c000000
56 #define DM9000_DATA (CONFIG_DM9000_BASE + 0x400)
79 #define CONFIG_JFFS2_PART_OFFSET 0x680000
80 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
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H A Dvexpress_aemv8a.h26 #define CONFIG_SYS_TEXT_BASE 0x88000000
27 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
29 #define CONFIG_SYS_TEXT_BASE 0xe0000000
30 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
36 #define V2M_PA_CS0 0x00000000
37 #define V2M_PA_CS1 0x14000000
38 #define V2M_PA_CS2 0x18000000
39 #define V2M_PA_CS3 0x1c000000
40 #define V2M_PA_CS4 0x0c000000
41 #define V2M_PA_CS5 0x10000000
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H A Domap3_overo.h15 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
18 #define CONFIG_SPL_TEXT_BASE 0x40200000
52 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
53 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
69 "bootdir=/boot\0" \
70 "bootfile=zImage\0" \
71 "usbtty=cdc_acm\0" \
72 "console=ttyO2,115200n8\0" \
73 "mpurate=auto\0" \
74 "optargs=\0" \
[all …]
H A Dcm_t3517.h18 #define CONFIG_SYS_TEXT_BASE 0x80008000
41 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000.
42 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
43 * so that leaves DRAM base to DRAM base + 0x4000 available.
45 #define CONFIG_SYS_BOOTMAPSZ 0x4000
98 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
100 #define CONFIG_SYS_I2C_EEPROM_BUS 0
116 "loadaddr=0x82000000\0" \
117 "baudrate=115200\0" \
118 "console=ttyO2,115200n8\0" \
[all …]
H A Dcm_t35.h90 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
92 #define CONFIG_SYS_I2C_EEPROM_BUS 0
113 "loadaddr=0x82000000\0" \
114 "usbtty=cdc_acm\0" \
115 "console=ttyO2,115200n8\0" \
116 "mpurate=500\0" \
117 "vram=12M\0" \
118 "dvimode=1024x768MR-16@60\0" \
119 "defaultdisplay=dvi\0" \
120 "mmcdev=0\0" \
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/arm/
H A Dfoundation-v8-gicv3.dtsi13 ranges = <0x0 0x0 0x2f000000 0x100000>;
15 reg = <0x0 0x2f000000 0x0 0x10000>,
16 <0x0 0x2f100000 0x0 0x200000>,
17 <0x0 0x2c000000 0x0 0x2000>,
18 <0x0 0x2c010000 0x0 0x2000>,
19 <0x0 0x2c02f000 0x0 0x2000>;
26 reg = <0x20000 0x20000>;
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Domap3-sbc-t3730.dts21 pinctrl-0 = <&sb_t35_usb_hub_pins>;
25 OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_167 - SB-T35 USB HUB RST */
31 ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */
32 <4 0 0x2d000000 0x01000000>, /* SB-T35 SMSC9x Eth */
33 <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */
H A Domap3-sbc-t3530.dts21 pinctrl-0 = <&sb_t35_usb_hub_pins>;
25 OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_167 - SB-T35 USB HUB RST */
31 ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */
32 <4 0 0x2d000000 0x01000000>, /* SB-T35 SMSC9x Eth */
33 <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */
37 cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_HIGH>;
H A Domap3-cm-t3x30.dtsi10 cpu@0 {
27 OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs5.gpmc_ncs5 */
28 OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 */
34 OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
35 OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
36 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
37 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
38 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */
39 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
40 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
[all …]
H A Domap-zoom-common.dtsi9 ranges = <3 0 0x10000000 0x1000000>, /* CS3: 16MB for UART */
10 <7 0 0x2c000000 0x01000000>;
17 uart@3,0 {
19 reg = <3 0 8>; /* CS3, offset 0, IO size 8 */
27 gpmc,mux-add-data = <0>;
48 gpmc,wait-monitoring-ns = <0>;
49 gpmc,clk-activation-ns = <0>;
55 reg = <3 0x100 8>; /* CS3, offset 0x100, IO size 8 */
66 reg = <3 0x200 8>; /* CS3, offset 0x200, IO size 8 */
77 reg = <3 0x300 8>; /* CS3, offset 0x300, IO size 8 */
[all …]
H A Domap4-duovero-parlor.dts31 #size-cells = <0>;
59 pinctrl-0 = <
67 OMAP4_IOPAD(0x116, PIN_OUTPUT | MUX_MODE3) /* abe_dmic_din3.gpio_122 */
73 OMAP4_IOPAD(0x114, PIN_INPUT_PULLUP | MUX_MODE3) /* abe_dmic_din2.gpio_121 */
79 OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
80 OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
86 OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
87 OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
93 OMAP4_IOPAD(0x068, PIN_INPUT | MUX_MODE3) /* gpmc_a20.gpio_44: IRQ */
94 OMAP4_IOPAD(0x06a, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a21.gpio_45: nReset */
[all …]
H A Domap3-evm-processor-common.dtsi8 reg = <0x80000000 0x10000000>; /* 256 MB */
13 pinctrl-0 = <&wl12xx_gpio>;
21 pinctrl-0 = <
29 pinctrl-0 = <&ehci_phy_pins>;
34 pinctrl-0 = <&on_board_gpio_61 &hsusb2_pins>;
38 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
39 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
40 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
41 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
43 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
[all …]
H A Dlogicpd-som-lv-baseboard.dtsi7 pinctrl-0 = <&gpio_key_pins>;
26 pinctrl-0 = <&led_pins &led_pins_wkup>;
55 pinctrl-0 = <&mcbsp2_pins>;
64 ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
65 1 0 0x2c000000 0x1000000 /* CS1: 16MB for LAN9221 */
66 2 0 0x10000000 0x2000000>; /* CS2: 32MB for NOR */
70 pinctrl-0 = <&lan9221_pins>;
73 reg = <1 0 0xff>;
86 pinctrl-0 = <&dss_dpi_pins1>;
111 pinctrl-0 = <&lcd_enable_pin>;
[all …]
H A Domap3-igep0020-common.dtsi16 pinctrl-0 = <&leds_pins>;
58 #phy-cells = <0>;
67 #size-cells = <0>;
69 port@0 {
70 reg = <0>;
105 pinctrl-0 = <
112 OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
118 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
119 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
120 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dgpmc-eth.txt41 Note that base address will be typically 0 as this
53 reg = <0x6e000000 0x1000>;
60 ranges = <5 0 0x2c000000 0x1000000>;
62 ethernet@5,0 {
64 reg = <5 0 0xff>;
68 gpmc,cs-on-ns = <0>;
/OK3568_Linux_fs/u-boot/board/gumstix/duovero/
H A Dduovero.c40 struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000;
45 * @return 0
52 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; in board_init()
54 return 0; in board_init()
62 * @return 0
66 int ret = 0; in misc_init_r()
70 val = 0xe1; in misc_init_r()
71 ret = i2c_write(TWL6030_CHIP_PM, 0xbe, 1, &val, 1); in misc_init_r()
77 gpio_direction_output(WIFI_EN, 0); in misc_init_r()
80 gpio_set_value(WIFI_EN, 0); in misc_init_r()
[all …]
/OK3568_Linux_fs/u-boot/post/lib_powerpc/
H A Dcpu_asm.h10 #define BIT_C 0x00000001
12 #define OP_BLR 0x4e800020
13 #define OP_EXTSB 0x7c000774
14 #define OP_EXTSH 0x7c000734
15 #define OP_NEG 0x7c0000d0
16 #define OP_CNTLZW 0x7c000034
17 #define OP_ADD 0x7c000214
18 #define OP_ADDC 0x7c000014
19 #define OP_ADDME 0x7c0001d4
20 #define OP_ADDZE 0x7c000194
[all …]
/OK3568_Linux_fs/kernel/lib/crypto/
H A Ddes.c31 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14,
32 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54,
33 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16,
34 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56,
35 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c,
36 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c,
37 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e,
38 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e,
39 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34,
40 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74,
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/interrupt-controller/
H A Darm,gic-v3.yaml33 enum: [ 0, 1, 2 ]
46 The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI
51 SPI interrupts are in the range [0-987]. PPI interrupts are in the
52 range [0-15]. Extented SPI interrupts are in the range [0-1023].
53 Extended PPI interrupts are in the range [0-127].
56 bits[3:0] trigger type and level flags.
68 of 0 if present.
95 multipleOf: 0x10000
96 exclusiveMinimum: 0
136 "^interrupt-partition-[0-9]+$":
[all …]

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