| /OK3568_Linux_fs/kernel/arch/powerpc/boot/ |
| H A D | gamecube-head.S | 28 rlwinm 9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
42 li 8, 0
43 mtspr 0x210, 8 /* IBAT0U */
44 mtspr 0x212, 8 /* IBAT1U */
45 mtspr 0x214, 8 /* IBAT2U */
46 mtspr 0x216, 8 /* IBAT3U */
47 mtspr 0x218, 8 /* DBAT0U */
48 mtspr 0x21a, 8 /* DBAT1U */
49 mtspr 0x21c, 8 /* DBAT2U */
50 mtspr 0x21e, 8 /* DBAT3U */
[all …]
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| H A D | wii-head.S | 29 rlwinm 9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
43 li 8, 0
44 mtspr 0x210, 8 /* IBAT0U */
45 mtspr 0x212, 8 /* IBAT1U */
46 mtspr 0x214, 8 /* IBAT2U */
47 mtspr 0x216, 8 /* IBAT3U */
48 mtspr 0x218, 8 /* DBAT0U */
49 mtspr 0x21a, 8 /* DBAT1U */
50 mtspr 0x21c, 8 /* DBAT2U */
51 mtspr 0x21e, 8 /* DBAT3U */
[all …]
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| /OK3568_Linux_fs/kernel/drivers/scsi/qedi/ |
| H A D | qedi_nvm_iscsi_cfg.h | 37 union nvm_iscsi_ipv4_addr addr; /* 0x0 */
38 union nvm_iscsi_ipv4_addr subnet_mask; /* 0x4 */
39 union nvm_iscsi_ipv4_addr gateway; /* 0x8 */
40 union nvm_iscsi_ipv4_addr primary_dns; /* 0xC */
41 union nvm_iscsi_ipv4_addr secondary_dns; /* 0x10 */
42 union nvm_iscsi_ipv4_addr dhcp_addr; /* 0x14 */
44 union nvm_iscsi_ipv4_addr isns_server; /* 0x18 */
45 union nvm_iscsi_ipv4_addr slp_server; /* 0x1C */
46 union nvm_iscsi_ipv4_addr primay_radius_server; /* 0x20 */
47 union nvm_iscsi_ipv4_addr secondary_radius_server; /* 0x24 */
[all …]
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| /OK3568_Linux_fs/kernel/Documentation/input/ |
| H A D | gameport-programming.rst | 16 Make sure struct gameport is initialized to 0 in all other fields. The
22 0x201 address is smaller.
24 Eg. if your driver supports addresses 0x200, 0x208, 0x210 and 0x218, then
25 0x218 would be the address of first choice.
28 space (is above 0x1000), use that one, and don't map the ISA mirror.
52 my_mmio = 0xff;
79 for (i = 0; i < 4; i++)
166 outb(0xff, io) will be used.
180 read function. It should fill axes[0..3] with four values of the joystick axes
181 and buttons[0] with four bits representing the buttons.
[all …]
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| /OK3568_Linux_fs/kernel/drivers/tty/ |
| H A D | moxa.h | 5 #define MOXA 0x400
17 #define Magic_code 0x404
22 #define C218_ConfBase 0x800
23 #define C218_status (C218_ConfBase + 0) /* BIOS running status */
25 #define C218_key (C218_ConfBase + 4) /* WORD (0x218 for C218) */
28 #define C218chksum_ok (C218_ConfBase + 0x0a) /* BYTE (1:ok) */
29 #define C218_TestRx (C218_ConfBase + 0x10) /* 8 bytes for 8 ports */
30 #define C218_TestTx (C218_ConfBase + 0x18) /* 8 bytes for 8 ports */
31 #define C218_RXerr (C218_ConfBase + 0x20) /* 8 bytes for 8 ports */
32 #define C218_ErrFlag (C218_ConfBase + 0x28) /* 8 bytes for 8 ports */
[all …]
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/marvell/octeontx2/nic/ |
| H A D | otx2_reg.h | 17 #define RVU_PF_VFX_PFVF_MBOX0 (0x00000)
18 #define RVU_PF_VFX_PFVF_MBOX1 (0x00008)
19 #define RVU_PF_VFX_PFVF_MBOXX(a, b) (0x0 | (a) << 12 | (b) << 3)
20 #define RVU_PF_VF_BAR4_ADDR (0x10)
21 #define RVU_PF_BLOCK_ADDRX_DISC(a) (0x200 | (a) << 3)
22 #define RVU_PF_VFME_STATUSX(a) (0x800 | (a) << 3)
23 #define RVU_PF_VFTRPENDX(a) (0x820 | (a) << 3)
24 #define RVU_PF_VFTRPEND_W1SX(a) (0x840 | (a) << 3)
25 #define RVU_PF_VFPF_MBOX_INTX(a) (0x880 | (a) << 3)
26 #define RVU_PF_VFPF_MBOX_INT_W1SX(a) (0x8A0 | (a) << 3)
[all …]
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| /OK3568_Linux_fs/kernel/arch/sh/drivers/pci/ |
| H A D | pci-sh7780.h | 13 #define PCIECR 0xFE000008
14 #define PCIECR_ENBL 0x01
17 #define SH7780_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */
18 #define SH7780_PCI_CONFIG_SIZE 0x01000000 /* Config space size */
20 #define SH7780_PCIREG_BASE 0xFE040000 /* PCI regs base address */
23 #define SH7780_PCIIR 0x114 /* PCI Interrupt Register */
24 #define SH7780_PCIIMR 0x118 /* PCI Interrupt Mask Register */
25 #define SH7780_PCIAIR 0x11C /* Error Address Register */
26 #define SH7780_PCICIR 0x120 /* Error Command/Data Register */
27 #define SH7780_PCIAINT 0x130 /* Arbiter Interrupt Register */
[all …]
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| /OK3568_Linux_fs/kernel/Documentation/userspace-api/ioctl/ |
| H A D | ioctl-decoding.rst | 24 7-0 function #
28 So for example 0x82187201 is a read with arg length of 0x218,
|
| /OK3568_Linux_fs/kernel/include/dt-bindings/clock/ |
| H A D | lpc18xx-ccu.h | 13 #define CLK_APB3_BUS 0x100
14 #define CLK_APB3_I2C1 0x108
15 #define CLK_APB3_DAC 0x110
16 #define CLK_APB3_ADC0 0x118
17 #define CLK_APB3_ADC1 0x120
18 #define CLK_APB3_CAN0 0x128
19 #define CLK_APB1_BUS 0x200
20 #define CLK_APB1_MOTOCON_PWM 0x208
21 #define CLK_APB1_I2C0 0x210
22 #define CLK_APB1_I2S 0x218
[all …]
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| /OK3568_Linux_fs/kernel/drivers/video/rockchip/rve/include/ |
| H A D | rve_reg.h | 8 #define RVE_SWREG0_IVE_VERSION 0x000
9 #define RVE_SWREG1_IVE_IRQ 0x004
10 #define RVE_SWREG2_IRQ_CTRL 0x008
11 #define RVE_SWREG3_IVE_IDLE_PRC_STA 0x00c
12 #define RVE_SWREG4_IVE_FORCE_IDLE_WBASE 0x010
13 #define RVE_SWREG5_IVE_IDLE_CTRL 0x014
14 #define RVE_SWREG6_IVE_WORK_STA 0x018
15 #define RVE_SWREG7_IVE_SWAP 0x01c
18 #define RVE_SWLTB0_START_BASE 0x100
19 #define RVE_SWLTB1_CTRL 0x104
[all …]
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| /OK3568_Linux_fs/kernel/include/linux/bcma/ |
| H A D | bcma_driver_gmac_cmn.h | 7 #define BCMA_GMAC_CMN_STAG0 0x000
8 #define BCMA_GMAC_CMN_STAG1 0x004
9 #define BCMA_GMAC_CMN_STAG2 0x008
10 #define BCMA_GMAC_CMN_STAG3 0x00C
11 #define BCMA_GMAC_CMN_PARSER_CTL 0x020
12 #define BCMA_GMAC_CMN_MIB_MAX_LEN 0x024
13 #define BCMA_GMAC_CMN_PHY_ACCESS 0x100
14 #define BCMA_GMAC_CMN_PA_DATA_MASK 0x0000ffff
15 #define BCMA_GMAC_CMN_PA_ADDR_MASK 0x001f0000
17 #define BCMA_GMAC_CMN_PA_REG_MASK 0x1f000000
[all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | cpucfg.h | 18 u32 rst; /* base + 0x0 */
19 u32 ctrl; /* base + 0x4 */
20 u32 status; /* base + 0x8 */
21 u8 res[0x34]; /* base + 0xc */
25 u8 res0[0x40]; /* 0x000 */
26 struct sunxi_cpucfg_cpu cpu[4]; /* 0x040 */
27 u8 res1[0x44]; /* 0x140 */
28 u32 gen_ctrl; /* 0x184 */
29 u32 l2_status; /* 0x188 */
30 u8 res2[0x4]; /* 0x18c */
[all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/ |
| H A D | sdram_rv1108_pctl_phy.h | 17 u32 reserved0[(0x40 - 0x10) / 4];
23 u32 reserved1[(0x60 - 0x54) / 4];
27 u32 reserved2[(0x7c - 0x6c) / 4];
42 u32 reserved4[(0xc0 - 0xb4) / 4];
78 u32 reserved5[(0x180 - 0x14c) / 4];
83 u32 reserved6[(0x200 - 0x190) / 4];
110 u32 reserved8[(0x270 - 0x268) / 4];
122 u32 reserved10[(0x2ac - 0x29c) / 4];
137 u32 reserved12[(0x2f0 - 0x2e4) / 4];
139 u32 reserved13[(0x300 - 0x2f4) / 4];
[all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | imx50-pinfunc.h | 13 #define MX50_PAD_KEY_COL0__KPP_COL_0 0x020 0x2cc 0x000 0x0 0x0
14 #define MX50_PAD_KEY_COL0__GPIO4_0 0x020 0x2cc 0x000 0x1 0x0
15 #define MX50_PAD_KEY_COL0__EIM_NANDF_CLE 0x020 0x2cc 0x000 0x2 0x0
16 #define MX50_PAD_KEY_COL0__CTI_TRIGIN7 0x020 0x2cc 0x000 0x6 0x0
17 #define MX50_PAD_KEY_COL0__USBPHY1_TXREADY 0x020 0x2cc 0x000 0x7 0x0
18 #define MX50_PAD_KEY_ROW0__KPP_ROW_0 0x024 0x2d0 0x000 0x0 0x0
19 #define MX50_PAD_KEY_ROW0__GPIO4_1 0x024 0x2d0 0x000 0x1 0x0
20 #define MX50_PAD_KEY_ROW0__EIM_NANDF_ALE 0x024 0x2d0 0x000 0x2 0x0
21 #define MX50_PAD_KEY_ROW0__CTI_TRIGIN_ACK7 0x024 0x2d0 0x000 0x6 0x0
22 #define MX50_PAD_KEY_ROW0__USBPHY1_RXVALID 0x024 0x2d0 0x000 0x7 0x0
[all …]
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| H A D | imx6sl-pinfunc.h | 13 #define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x04c 0x2a4 0x000 0x0 0x0
14 #define MX6SL_PAD_AUD_MCLK__PWM4_OUT 0x04c 0x2a4 0x000 0x1 0x0
15 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0
16 #define MX6SL_PAD_AUD_MCLK__FEC_MDC 0x04c 0x2a4 0x000 0x3 0x0
17 #define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 0x04c 0x2a4 0x000 0x4 0x0
18 #define MX6SL_PAD_AUD_MCLK__GPIO1_IO06 0x04c 0x2a4 0x000 0x5 0x0
19 #define MX6SL_PAD_AUD_MCLK__SPDIF_EXT_CLK 0x04c 0x2a4 0x7f4 0x6 0x0
20 #define MX6SL_PAD_AUD_RXC__AUD3_RXC 0x050 0x2a8 0x000 0x0 0x0
21 #define MX6SL_PAD_AUD_RXC__I2C1_SDA 0x050 0x2a8 0x720 0x1 0x0
22 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0
[all …]
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| /OK3568_Linux_fs/kernel/drivers/watchdog/ |
| H A D | machzwd.c | 44 #define ZF_IOBASE 0x218
45 #define INDEX 0x218
46 #define DATA_B 0x219
47 #define DATA_W 0x21A
48 #define DATA_D 0x21A
51 #define ZFL_VERSION 0x02 /* 16 */
52 #define CONTROL 0x10 /* 16 */
53 #define STATUS 0x12 /* 8 */
54 #define COUNTER_1 0x0C /* 16 */
55 #define COUNTER_2 0x0E /* 8 */
[all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | imx6sl-pinfunc.h | 17 #define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x04c 0x2a4 0x000 0x0 0x0
18 #define MX6SL_PAD_AUD_MCLK__PWM4_OUT 0x04c 0x2a4 0x000 0x1 0x0
19 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0
20 #define MX6SL_PAD_AUD_MCLK__FEC_MDC 0x04c 0x2a4 0x000 0x3 0x0
21 #define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 0x04c 0x2a4 0x000 0x4 0x0
22 #define MX6SL_PAD_AUD_MCLK__GPIO1_IO06 0x04c 0x2a4 0x000 0x5 0x0
23 #define MX6SL_PAD_AUD_MCLK__SPDIF_EXT_CLK 0x04c 0x2a4 0x7f4 0x6 0x0
24 #define MX6SL_PAD_AUD_RXC__AUD3_RXC 0x050 0x2a8 0x000 0x0 0x0
25 #define MX6SL_PAD_AUD_RXC__I2C1_SDA 0x050 0x2a8 0x720 0x1 0x0
26 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0
[all …]
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| /OK3568_Linux_fs/u-boot/include/ |
| H A D | fsl_sfp.h | 38 u32 ospr; /* 0x200 */
39 u32 ospr1; /* 0x204 */
41 u32 fswpr; /* 0x218 FSL Section Write Protect */
42 u32 fsl_uid; /* 0x21c FSL UID 0 */
43 u32 fsl_uid_1; /* 0x220 FSL UID 0 */
45 u32 srk_hash[8]; /* 0x254 Super Root Key Hash */
46 u32 oem_uid; /* 0x274 OEM UID 0*/
47 u32 oem_uid_1; /* 0x278 OEM UID 1*/
48 u32 oem_uid_2; /* 0x27c OEM UID 2*/
49 u32 oem_uid_3; /* 0x280 OEM UID 3*/
[all …]
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| /OK3568_Linux_fs/kernel/drivers/media/common/b2c2/ |
| H A D | flexcop-reg.h | 11 FLEXCOP_UNK = 0,
18 FC_UNK = 0,
32 FC_USB = 0,
47 #define fc_data_Tag_ID_DVB 0x3e
48 #define fc_data_Tag_ID_ATSC 0x3f
49 #define fc_data_Tag_ID_IDSB 0x8b
51 #define fc_key_code_default 0x1
52 #define fc_key_code_even 0x2
53 #define fc_key_code_odd 0x3
64 FC_WRITE = 0,
[all …]
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| /OK3568_Linux_fs/kernel/sound/soc/fsl/ |
| H A D | fsl_audmix.h | 15 #define FSL_AUDMIX_CTR 0x200 /* Control */
16 #define FSL_AUDMIX_STR 0x204 /* Status */
18 #define FSL_AUDMIX_ATCR0 0x208 /* Attenuation Control */
19 #define FSL_AUDMIX_ATIVAL0 0x20c /* Attenuation Initial Value */
20 #define FSL_AUDMIX_ATSTPUP0 0x210 /* Attenuation step up factor */
21 #define FSL_AUDMIX_ATSTPDN0 0x214 /* Attenuation step down factor */
22 #define FSL_AUDMIX_ATSTPTGT0 0x218 /* Attenuation step target */
23 #define FSL_AUDMIX_ATTNVAL0 0x21c /* Attenuation Value */
24 #define FSL_AUDMIX_ATSTP0 0x220 /* Attenuation step number */
26 #define FSL_AUDMIX_ATCR1 0x228 /* Attenuation Control */
[all …]
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/phy/rf/halrf_8852b/ |
| H A D | halrf_efuse_8852b.h | 31 EFUSE_INFO_RF_BOARD_OPTION_8852B_ADDR = 0x2c1,
32 EFUSE_INFO_RF_RFE_8852B_ADDR = 0x2ca,
33 EFUSE_INFO_RF_CHAN_PLAN_8852B_ADDR = 0x2b8,
34 EFUSE_INFO_RF_XTAL_8852B_ADDR = 0x2b9,
35 EFUSE_INFO_RF_THERMAL_A_8852B_ADDR = 0x2d0,
36 EFUSE_INFO_RF_THERMAL_B_8852B_ADDR = 0x2d1,
37 EFUSE_INFO_RF_2G_CCK_A_TSSI_DE_1_8852B_ADDR = 0x210,
38 EFUSE_INFO_RF_2G_CCK_A_TSSI_DE_2_8852B_ADDR = 0x211,
39 EFUSE_INFO_RF_2G_CCK_A_TSSI_DE_3_8852B_ADDR = 0x212,
40 EFUSE_INFO_RF_2G_CCK_A_TSSI_DE_4_8852B_ADDR = 0x213,
[all …]
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/phy/rf/halrf_8852b/ |
| H A D | halrf_efuse_8852b.h | 31 EFUSE_INFO_RF_BOARD_OPTION_8852B_ADDR = 0x2c1,
32 EFUSE_INFO_RF_RFE_8852B_ADDR = 0x2ca,
33 EFUSE_INFO_RF_CHAN_PLAN_8852B_ADDR = 0x2b8,
34 EFUSE_INFO_RF_XTAL_8852B_ADDR = 0x2b9,
35 EFUSE_INFO_RF_THERMAL_A_8852B_ADDR = 0x2d0,
36 EFUSE_INFO_RF_THERMAL_B_8852B_ADDR = 0x2d1,
37 EFUSE_INFO_RF_2G_CCK_A_TSSI_DE_1_8852B_ADDR = 0x210,
38 EFUSE_INFO_RF_2G_CCK_A_TSSI_DE_2_8852B_ADDR = 0x211,
39 EFUSE_INFO_RF_2G_CCK_A_TSSI_DE_3_8852B_ADDR = 0x212,
40 EFUSE_INFO_RF_2G_CCK_A_TSSI_DE_4_8852B_ADDR = 0x213,
[all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-stv0991/ |
| H A D | stv0991_creg.h | 12 u32 version; /* offset 0x0 */
13 u32 hdpctl; /* offset 0x4 */
14 u32 hdpval; /* offset 0x8 */
15 u32 hdpgposet; /* offset 0xc */
16 u32 hdpgpoclr; /* offset 0x10 */
17 u32 hdpgpoval; /* offset 0x14 */
18 u32 stm_mux; /* offset 0x18 */
19 u32 sysctrl_1; /* offset 0x1c */
20 u32 sysctrl_2; /* offset 0x20 */
21 u32 sysctrl_3; /* offset 0x24 */
[all …]
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| /OK3568_Linux_fs/u-boot/include/linux/mtd/ |
| H A D | omap_gpmc.h | 12 #define GPMC_BUF_EMPTY 0
18 OMAP_ECC_HAM1_CODE_SW = 1, /* avoid un-initialized int can be 0x0 */
35 u32 config1; /* 0x00 */
36 u32 config2; /* 0x04 */
37 u32 config3; /* 0x08 */
38 u32 config4; /* 0x0C */
39 u32 config5; /* 0x10 */
40 u32 config6; /* 0x14 */
41 u32 config7; /* 0x18 */
42 u32 nand_cmd; /* 0x1C */
[all …]
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| /OK3568_Linux_fs/u-boot/drivers/ata/ |
| H A D | sata_sil3114.h | 30 unsigned char port_no; /* primary=0, secondary=1 */
35 /* 0-port is not available */
40 #define ATA_CMD_STANDBY 0xE2
41 #define ATA_CMD_STANDBYNOW1 0xE0
42 #define ATA_CMD_IDLE 0xE3
43 #define ATA_CMD_IDLEIMMEDIATE 0xE1
48 #define SIL_VEND_ID 0x1095
49 #define SIL3114_DEVICE_ID 0x3114
52 #define VND_SYSCONFSTAT 0x88 /* System Configuration Status and Command */
60 #define VND_SCONTROL_CH0 0x100
[all …]
|