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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dmstar-v7.dtsi17 #size-cells = <0>;
19 cpu0: cpu@0 {
22 reg = <0x0>;
53 ranges = <0x16001000 0x16001000 0x00007000>,
54 <0x1f000000 0x1f000000 0x00400000>,
55 <0xa0000000 0xa0000000 0x20000>;
59 reg = <0x16001000 0x1000>,
60 <0x16002000 0x2000>,
61 <0x16004000 0x2000>,
62 <0x16006000 0x2000>;
[all …]
/OK3568_Linux_fs/kernel/include/linux/ssb/
H A Dssb_driver_extif.h24 #define SSB_EXTIF_PCMCIA_IOBASE(x) ((x) + 0x100000)
25 #define SSB_EXTIF_PCMCIA_CFGBASE(x) ((x) + 0x200000)
26 #define SSB_EXTIF_CFGIF_BASE(x) ((x) + 0x800000)
27 #define SSB_EXTIF_FLASH_BASE(x) ((x) + 0xc00000)
47 #define SSB_EXTIF_CTL 0x0000
48 #define SSB_EXTIF_CTL_UARTEN (1 << 0) /* UART enable */
49 #define SSB_EXTIF_EXTSTAT 0x0004
50 #define SSB_EXTIF_EXTSTAT_EMODE (1 << 0) /* Endian mode (ro) */
53 #define SSB_EXTIF_PCMCIA_CFG 0x0010
54 #define SSB_EXTIF_PCMCIA_MEMWAIT 0x0014
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dsdram_rk3328.h16 #define SDRAM_ADDR 0x00000000
19 #define DDRCONF 0x8
20 #define DDRTIMING 0xc
21 #define DDRMODE 0x10
22 #define READLATENCY 0x14
23 #define AGING0 0x18
24 #define AGING1 0x1c
25 #define AGING2 0x20
26 #define AGING3 0x24
27 #define AGING4 0x28
[all …]
H A Dsdram_px30.h18 #define PMUGRF_OS_REG0 (0x200)
22 #define DDR_GRF_CON(n) (0 + (n) * 4)
23 #define DDR_GRF_STATUS_BASE (0X100)
25 #define DDR_GRF_LP_CON (0x20)
27 #define SPLIT_MODE_32_L16_VALID (0)
32 #define DDR_GRF_SPLIT_CON (0x8)
33 #define SPLIT_MODE_MASK (0x3)
37 #define SPLIT_SIZE_MASK (0xff)
38 #define SPLIT_SIZE_OFFSET (0)
42 #define PB(n) ((0x1 << (15 + 16)) | ((n) << 15))
[all …]
/OK3568_Linux_fs/kernel/drivers/misc/habanalabs/include/gaudi/
H A Dgaudi_packets.h14 #define PACKET_HEADER_PACKET_ID_MASK 0x1F00000000000000ull
17 PACKET_WREG_32 = 0x1,
18 PACKET_WREG_BULK = 0x2,
19 PACKET_MSG_LONG = 0x3,
20 PACKET_MSG_SHORT = 0x4,
21 PACKET_CP_DMA = 0x5,
22 PACKET_REPEAT = 0x6,
23 PACKET_MSG_PROT = 0x7,
24 PACKET_FENCE = 0x8,
25 PACKET_LIN_DMA = 0x9,
[all …]
/OK3568_Linux_fs/u-boot/include/
H A Dfsl_lpuart.h64 #define LPUART_BAUD_BOTHEDGE_MASK (0x20000)
65 #define LPUART_BAUD_OSR_MASK (0x1F000000)
67 #define LPUART_BAUD_OSR(x) ((((uint32_t)(x)) << 24) & 0x1F000000)
68 #define LPUART_BAUD_SBR_MASK (0x1FFF)
69 #define LPUART_BAUD_SBR_SHIFT (0U)
70 #define LPUART_BAUD_SBR(x) (((uint32_t)(x)) & 0x1FFF)
71 #define LPUART_BAUD_M10_MASK (0x20000000U)
72 #define LPUART_BAUD_SBNS_MASK (0x2000U)
/OK3568_Linux_fs/kernel/arch/mips/boot/dts/lantiq/
H A Ddanube.dtsi8 cpu@0 {
17 reg = <0x1f800000 0x800000>;
18 ranges = <0x0 0x1f800000 0x7fffff>;
24 reg = <0x80200 0x120>;
29 reg = <0x803f0 0x10>;
37 reg = <0x1f000000 0x800000>;
38 ranges = <0x0 0x1f000000 0x7fffff>;
45 reg = <0x101000 0x1000>;
50 reg = <0x102000 0x1000>;
55 reg = <0x103000 0x1000>;
[all …]
/OK3568_Linux_fs/kernel/arch/mips/include/asm/sgi/
H A Dgio.h23 * 0 GFX 0x1f000000 - 0x1f3fffff 4MB
24 * 1 EXP0 0x1f400000 - 0x1f5fffff 2MB
25 * 2 EXP1 0x1f600000 - 0x1f9fffff 4MB
29 * - MISC 0x1fb00000 - 0x1fbfffff 1MB
32 * - RESERVED 0x18000000 - 0x1effffff 112MB
42 * bits 0:6 the product ID; ranges from 0x00 to 0x7F.
43 * bit 7 0=GIO Product ID is 8 bits wide
46 * bit 16 0=GIO32 and GIO32-bis, 1=GIO64.
47 * bit 17 0=no ROM present
52 * IDs above 0x50/0xd0 are of 3rd party boards.
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/interrupt-controller/
H A Dgoogle,goldfish-pic.txt15 #interrupt-cells = <0x1>;
16 #address-cells = <0>;
23 reg = <0x1f000000 0x1000>;
26 #interrupt-cells = <0x1>;
29 interrupts = <0x2>;
/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/spi/
H A Dspi-ath79.txt7 - #size-cells: <0>, also as required by generic SPI binding.
15 reg = <0x1f000000 0x10>;
18 #size-cells = <0>;
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/spi/
H A Dspi-ath79.txt9 - #size-cells: <0>, also as required by generic SPI binding.
17 reg = <0x1f000000 0x10>;
23 #size-cells = <0>;
H A Dmikrotik,rb4xx-spi.yaml33 #size-cells = <0>;
35 reg = <0x1f000000 0x10>;
H A Dqca,ar934x-spi.yaml39 reg = <0x1f000000 0x1c>;
42 #size-cells = <0>;
/OK3568_Linux_fs/kernel/arch/mips/boot/dts/ralink/
H A Drt2880_eval.dts10 memory@0 {
12 reg = <0x8000000 0x2000000>;
21 reg = <0x1f000000 0x400000>;
28 partition@0 {
30 reg = <0x0 0x30000>;
35 reg = <0x30000 0x10000>;
40 reg = <0x40000 0x10000>;
45 reg = <0x50000 0x3b0000>;
H A Drt3052_eval.dts10 memory@0 {
12 reg = <0x0 0x2000000>;
21 reg = <0x1f000000 0x800000>;
28 partition@0 {
30 reg = <0x0 0x30000>;
35 reg = <0x30000 0x10000>;
40 reg = <0x40000 0x10000>;
45 reg = <0x50000 0x7b0000>;
/OK3568_Linux_fs/kernel/arch/mips/cobalt/
H A Dlcd.c13 .start = 0x1f000000,
14 .end = 0x1f00001f,
35 return 0; in cobalt_lcd_add()
/OK3568_Linux_fs/u-boot/include/configs/
H A Dmeson-gxbb-common.h14 #define CONFIG_ENV_SIZE 0x2000
19 #define CONFIG_SYS_SDRAM_BASE 0
20 #define CONFIG_SYS_TEXT_BASE 0x01000000
21 #define CONFIG_SYS_INIT_SP_ADDR 0x20000000
25 #define GICD_BASE 0xc4301000
26 #define GICC_BASE 0xc4302000
34 func(MMC, mmc, 0) \
43 "fdt_addr_r=0x01000000\0" \
44 "scriptaddr=0x1f000000\0" \
45 "kernel_addr_r=0x01080000\0" \
[all …]
H A Dsh7757lcr.h16 #define CONFIG_SYS_TEXT_BASE 0x8ef80000
22 #define SH7757LCR_SDRAM_BASE (0x80000000)
24 #define SH7757LCR_SDRAM_ECC_SETTING 0x0f000000 /* 240MByte */
46 #define CONFIG_SYS_MONITOR_BASE 0x00000000
53 #define CONFIG_SH_ETHER_USE_PORT 0
60 #define SH7757LCR_ETHERNET_MAC_BASE_SPI 0x000b0000
70 #define CONFIG_SH_SPI_BASE 0xfe002000
74 #define CONFIG_SH_MMCIF_ADDR 0xffcb0000
78 #define SH7757LCR_SDRAM_PHYS_TOP 0x40000000
79 #define SH7757LCR_GRA_OFFSET 0x1f000000
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/fault/
H A Dgv100.c43 const u32 instlo = nvkm_ro32(mem, base + 0x00); in gv100_fault_buffer_process()
44 const u32 insthi = nvkm_ro32(mem, base + 0x04); in gv100_fault_buffer_process()
45 const u32 addrlo = nvkm_ro32(mem, base + 0x08); in gv100_fault_buffer_process()
46 const u32 addrhi = nvkm_ro32(mem, base + 0x0c); in gv100_fault_buffer_process()
47 const u32 timelo = nvkm_ro32(mem, base + 0x10); in gv100_fault_buffer_process()
48 const u32 timehi = nvkm_ro32(mem, base + 0x14); in gv100_fault_buffer_process()
49 const u32 info0 = nvkm_ro32(mem, base + 0x18); in gv100_fault_buffer_process()
50 const u32 info1 = nvkm_ro32(mem, base + 0x1c); in gv100_fault_buffer_process()
54 get = 0; in gv100_fault_buffer_process()
60 info.engine = (info0 & 0x000000ff); in gv100_fault_buffer_process()
[all …]
/OK3568_Linux_fs/u-boot/arch/mips/dts/
H A Dqca953x.dtsi18 #size-cells = <0>;
20 cpu@0 {
23 reg = <0>;
33 #clock-cells = <0>;
45 reg = <0x18040000 0x100>;
64 reg = <0x18020000 0x20>;
75 reg = <0x1f000000 0x10>;
81 #size-cells = <0>;
H A Dar934x.dtsi17 #size-cells = <0>;
19 cpu@0 {
22 reg = <0>;
32 #clock-cells = <0>;
54 reg = <0x1b000100 0x100>;
61 reg = <0x18020000 0x20>;
67 gmac0: eth@0x19000000 {
69 reg = <0x19000000 0x200>;
77 #size-cells = <0>;
78 phy0: ethernet-phy@0 {
[all …]
H A Dar933x.dtsi18 #size-cells = <0>;
20 cpu@0 {
23 reg = <0>;
33 #clock-cells = <0>;
45 reg = <0x18040000 0x100>;
64 reg = <0x1b000100 0x100>;
71 reg = <0x18020000 0x20>;
77 gmac0: eth@0x19000000 {
79 reg = <0x19000000 0x200>;
87 #size-cells = <0>;
[all …]
/OK3568_Linux_fs/kernel/arch/mips/txx9/rbtx4938/
H A Dsetup.c54 writeb(0, rbtx4938_pcireset_addr); in rbtx4938_pci_setup()
70 txx9_pci66_check(c, 0, 0)) { in rbtx4938_pci_setup()
72 writeb(0, rbtx4938_pcireset_addr); in rbtx4938_pci_setup()
90 /* PCI1DMD==0 => PCI1CLK==GBUSCLK/2 => PCI66 */ in rbtx4938_pci_setup()
100 c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000); in rbtx4938_pci_setup()
102 tx4927_pcic_setup(tx4938_pcic1ptr, c, 0); in rbtx4938_pci_setup()
112 #define SEEPROM2_CS 0 /* IOC */
115 #define SPI_BUSNO 0
124 /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */ in rbtx4938_ethaddr_init()
125 if (spi_eeprom_read(SPI_BUSNO, SEEPROM1_CS, 0, dat, sizeof(dat))) { in rbtx4938_ethaddr_init()
[all …]
/OK3568_Linux_fs/kernel/drivers/misc/habanalabs/include/goya/
H A Dgoya_packets.h14 #define PACKET_HEADER_PACKET_ID_MASK 0x1F00000000000000ull
17 PACKET_WREG_32 = 0x1,
18 PACKET_WREG_BULK = 0x2,
19 PACKET_MSG_LONG = 0x3,
20 PACKET_MSG_SHORT = 0x4,
21 PACKET_CP_DMA = 0x5,
22 PACKET_MSG_PROT = 0x7,
23 PACKET_FENCE = 0x8,
24 PACKET_LIN_DMA = 0x9,
25 PACKET_NOP = 0xA,
[all …]
/OK3568_Linux_fs/kernel/include/linux/bcma/
H A Dbcma_driver_gmac_cmn.h7 #define BCMA_GMAC_CMN_STAG0 0x000
8 #define BCMA_GMAC_CMN_STAG1 0x004
9 #define BCMA_GMAC_CMN_STAG2 0x008
10 #define BCMA_GMAC_CMN_STAG3 0x00C
11 #define BCMA_GMAC_CMN_PARSER_CTL 0x020
12 #define BCMA_GMAC_CMN_MIB_MAX_LEN 0x024
13 #define BCMA_GMAC_CMN_PHY_ACCESS 0x100
14 #define BCMA_GMAC_CMN_PA_DATA_MASK 0x0000ffff
15 #define BCMA_GMAC_CMN_PA_ADDR_MASK 0x001f0000
17 #define BCMA_GMAC_CMN_PA_REG_MASK 0x1f000000
[all …]

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