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/OK3568_Linux_fs/u-boot/board/Barix/ipam390/
H A DREADME.ipam39018 If this pin is logical 0 (low level):
51 Load address: 0xc0000000
57 NAND erase.part: device 0 offset 0x20000, size 0x160000
58 Erasing at 0x160000 -- 100% complete.
61 NAND write: device 0 offset 0x20000, size 0x78894
79 $ mono HexAIS_OMAP-L138.exe -entrypoint 0xC1080000 -ini ipam390-ais-uart.cfg \
80 -o ../current/ipam390/uboot-uart-ais.bin ./u-boot.bin@0xC1080000;
92 (AIS Parse): Read magic word 0x41504954.
97 (AIS Parse): Processing command 0: 0x5853590D.
100 (AIS Parse): Processing command 1: 0x5853590D.
[all …]
/OK3568_Linux_fs/kernel/drivers/media/pci/bt8xx/
H A Dbttv-audio-hook.c30 for (loops = 17; loops >= 0 ; loops--) { in winview_volume()
70 gpio_inout(0x300, 0x300); in gvbctv3pci_audio()
74 con = 0x000; in gvbctv3pci_audio()
77 con = 0x300; in gvbctv3pci_audio()
80 con = 0x200; in gvbctv3pci_audio()
83 gpio_bits(0x300, con); in gvbctv3pci_audio()
97 con = 0x300; in gvbctv5pci_audio()
100 con = 0x100; in gvbctv5pci_audio()
103 con = 0x000; in gvbctv5pci_audio()
106 if (con != (val & 0x300)) { in gvbctv5pci_audio()
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dkirkwood-netgear_readynas_duo_v2.dts19 reg = <0x00000000 0x10000000>;
78 #clock-cells = <0>;
88 reg = <0x32>;
93 reg = <0x3e>;
95 fan_gear_mode = <0>;
97 pwm_polarity = <0>;
113 pinctrl-0 = < &pmx_led_blue_power &pmx_led_blue_activity
147 pinctrl-0 = <&pmx_button_power &pmx_button_backup
172 pinctrl-0 = <&pmx_poweroff>;
180 #size-cells = <0>;
[all …]
H A Dls1021a-moxa-uc-8410a.dts28 #clock-cells = <0>;
164 reg = <0x20>;
169 reg = <0x68>;
178 rgmii_phy0: ethernet-phy@0 {
180 reg = <0x0>;
182 <3 0x11 0 0x4415>, /* Reg 3,17 */
183 <3 0x10 0 0x77>; /* Reg 3,16 */
188 reg = <0x1>;
190 <3 0x11 0 0x4415>, /* Reg 3,17 */
191 <3 0x10 0 0x77>; /* Reg 3,16 */
[all …]
H A Dkirkwood-netgear_readynas_nv+_v2.dts19 reg = <0x00000000 0x10000000>;
83 #clock-cells = <0>;
93 reg = <0x32>;
98 reg = <0x3e>;
100 fan_gear_mode = <0>;
102 pwm_polarity = <0>;
132 pinctrl-0 = < &pmx_led_blue_power &pmx_led_blue_backup
171 pinctrl-0 = <&pmx_button_power &pmx_button_backup
196 pinctrl-0 = <&pmx_poweroff>;
204 #size-cells = <0>;
[all …]
H A Darmada-370-netgear-rn102.dts22 memory@0 {
24 reg = <0x00000000 0x20000000>; /* 512 MB */
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
29 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
30 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
50 pinctrl-0 = <&ge1_rgmii_pins>;
64 pinctrl-0 = <&i2c0_pins>;
71 reg = <0x68>;
77 reg = <0x3e>;
79 fan_gear_mode = <0>;
[all …]
H A Darmada-370-netgear-rn104.dts22 memory@0 {
24 reg = <0x00000000 0x20000000>; /* 512 MB */
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
29 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
30 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
44 pinctrl-0 = <&ge0_rgmii_pins>;
52 pinctrl-0 = <&ge1_rgmii_pins>;
66 pinctrl-0 = <&i2c0_pins>;
73 reg = <0x68>;
79 reg = <0x3e>;
[all …]
H A Darmada-xp-netgear-rn2120.dts22 memory@0 {
24 reg = <0 0x00000000 0 0x80000000>; /* 2GB */
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
29 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
30 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
31 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
48 reg = <0x3e>;
50 fan_gear_mode = <0>;
52 pwm_polarity = <0>;
58 reg = <0x48>;
[all …]
H A Dimx27-apf27.dts18 reg = <0xa0000000 0x04000000>;
23 clock-frequency = <0>;
30 MX27_PAD_SD3_CMD__FEC_TXD0 0x0
31 MX27_PAD_SD3_CLK__FEC_TXD1 0x0
32 MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
33 MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
34 MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
35 MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
36 MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
37 MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
[all …]
H A Dkirkwood-dreamplug.dts13 reg = <0x00000000 0x20000000>;
43 m25p40@0 {
47 reg = <0>;
49 mode = <0>;
51 partition@0 {
52 reg = <0x0 0x80000>;
57 reg = <0x100000 0x10000>;
62 reg = <0x180000 0x10000>;
74 pinctrl-0 = <&pmx_sdio>;
84 pinctrl-0 = <&pmx_led_bluetooth &pmx_led_wifi
[all …]
/OK3568_Linux_fs/kernel/arch/x86/kernel/
H A Damd_nb.c18 #define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450
19 #define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
20 #define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480
21 #define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630
22 #define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464
23 #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec
24 #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494
25 #define PCI_DEVICE_ID_AMD_17H_M60H_DF_F4 0x144c
26 #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F4 0x1444
27 #define PCI_DEVICE_ID_AMD_19H_DF_F4 0x1654
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/txbf/
H A Dhaltxbf8814a.c21 u1Byte i = 0; in phydm_beamforming_set_iqgen_8814A()
22 u2Byte counter = 0; in phydm_beamforming_set_iqgen_8814A()
26 ODM_SetRFReg(pDM_Odm, i, RF_WE_LUT, 0x80000, 0x1); /*RF Mode table write enable*/ in phydm_beamforming_set_iqgen_8814A()
32 ODM_SetRFReg(pDM_Odm, i, RF_RCK_OS, 0xfffff, 0x18000); /*Select Rx mode*/ in phydm_beamforming_set_iqgen_8814A()
38 rf_mode[i] = ODM_GetRFReg(pDM_Odm, i, RF_RCK_OS, 0xfffff); in phydm_beamforming_set_iqgen_8814A()
41 …if ((rf_mode[0] == 0x180000) && (rf_mode[1] == 0x180000) && (rf_mode[2] == 0x180000) && (rf_mode[3… in phydm_beamforming_set_iqgen_8814A()
50 ODM_SetRFReg(pDM_Odm, i, RF_TXPA_G1, 0xfffff, 0xBE77F); /*Set Table data*/ in phydm_beamforming_set_iqgen_8814A()
51 ODM_SetRFReg(pDM_Odm, i, RF_TXPA_G2, 0xfffff, 0x226BF); /*Enable TXIQGEN in Rx mode*/ in phydm_beamforming_set_iqgen_8814A()
53 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, 0xfffff, 0xE26BF); /*Enable TXIQGEN in Rx mode*/ in phydm_beamforming_set_iqgen_8814A()
56 ODM_SetRFReg(pDM_Odm, i, RF_WE_LUT, 0x80000, 0x0); /*RF Mode table write disable*/ in phydm_beamforming_set_iqgen_8814A()
[all …]
/OK3568_Linux_fs/kernel/arch/sparc/kernel/
H A Dunaligned_64.c49 switch ((insn>>19)&0xf) { in decode_direction()
63 tmp = ((insn >> 19) & 0xf); in decode_access_size()
83 return 0; in decode_access_size()
89 if (insn & 0x800000) { in decode_asi()
90 if (insn & 0x2000) in decode_asi()
98 /* 0x400000 = signed, 0 = unsigned */
101 return (insn & 0x400000); in decode_signedness()
108 if (from_kernel != 0) in maybe_flush_windows()
125 return (!reg ? 0 : regs->u_regs[reg]); in fetch_reg()
172 int from_kernel = (regs->tstate & TSTATE_PRIV) != 0; in compute_effective_address()
[all …]
/OK3568_Linux_fs/u-boot/include/configs/
H A Dmccmon6.h18 #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x80000)
20 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + 0x180000)
21 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + 0x1980000)
23 #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
30 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR (0x800)
31 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (0x80)
32 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR (0x1000)
45 #define CONFIG_SYS_MEMTEST_START 0x10000000
50 #define CONFIG_SF_DEFAULT_CS 0
63 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
[all …]
H A Drk3588_common.h13 #define CONFIG_SPL_TEXT_BASE 0x00000000
14 #define CONFIG_SPL_MAX_SIZE 0x00040000
15 #define CONFIG_SPL_BSS_START_ADDR 0x03fe0000
16 #define CONFIG_SPL_BSS_MAX_SIZE 0x00010000
17 #define CONFIG_SPL_STACK 0x03fe0000
21 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000
26 #define CONFIG_SYS_TEXT_BASE 0x00200000
28 #define CONFIG_SYS_INIT_SP_ADDR 0x00600000
29 #define CONFIG_SYS_LOAD_ADDR 0x00600800
33 #define GICD_BASE 0xfe600000
[all …]
H A Dat91-sama5_common.h15 #define CONFIG_SYS_TEXT_BASE 0x26f00000
51 #define CONFIG_ENV_OFFSET 0x2000
52 #define CONFIG_ENV_SIZE 0x1000
53 #define CONFIG_SYS_MMC_ENV_DEV 0
56 #define CONFIG_ENV_SIZE 0x4000
62 "fatload mmc 0:1 0x21000000 ${dtb_name}; " \
63 "fatload mmc 0:1 0x22000000 zImage; " \
64 "bootz 0x22000000 - 0x21000000"
70 #define CONFIG_ENV_OFFSET 0xc0000
71 #define CONFIG_ENV_OFFSET_REDUND 0x100000
[all …]
H A Dat91sam9rlek.h16 #define CONFIG_SYS_TEXT_BASE 0x21F00000
51 #define CONFIG_SYS_SDRAM_SIZE 0x04000000
74 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
77 #define CONFIG_SYS_MEMTEST_END 0x23e00000
82 #define CONFIG_ENV_OFFSET 0x4200
83 #define CONFIG_ENV_SIZE 0x4200
84 #define CONFIG_ENV_SECT_SIZE 0x210
86 #define CONFIG_BOOTCOMMAND "sf probe 0; " \
87 "sf read 0x22000000 0x84000 0x294000; " \
88 "bootm 0x22000000"
[all …]
H A Dmvebu_armada-37xx.h15 #define CONFIG_SYS_TEXT_BASE 0x00000000
18 #define CONFIG_SYS_SDRAM_BASE 0x00000000
51 #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
52 #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
53 #define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */
54 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
60 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000)
66 #define CONFIG_SYS_I2C_SLAVE 0x0
71 #define CONFIG_ENV_SPI_BUS 0
72 #define CONFIG_ENV_SPI_CS 0
[all …]
H A Dmvebu_armada-8k.h17 #define CONFIG_SYS_TEXT_BASE 0x00000000
20 #define CONFIG_SYS_SDRAM_BASE 0x00000000
53 #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
54 #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
55 #define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */
56 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
62 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000)
67 #define CONFIG_ENV_SPI_BUS 0
68 #define CONFIG_ENV_SPI_CS 0
80 #define CONFIG_ENV_OFFSET 0x180000 /* as Marvell U-Boot version */
/OK3568_Linux_fs/u-boot/board/theobroma-systems/puma_rk3399/
H A Dfit_spl_atf.its23 load = <0x00200000>;
32 load = <0x1000>;
33 entry = <0x1000>;
40 load = <0x180000>;
/OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/
H A Dksi8560.dts31 #size-cells = <0>;
33 PowerPC,8560@0 {
35 reg = <0>;
38 d-cache-size = <0x8000>; /* L1, 32K */
39 i-cache-size = <0x8000>; /* L1, 32K */
40 timebase-frequency = <0>; /* From U-boot */
41 bus-frequency = <0>; /* From U-boot */
42 clock-frequency = <0>; /* From U-boot */
49 reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */
56 ranges = <0x00000000 0xfdf00000 0x00100000>;
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sram/
H A Dqcom,ocmem.yaml62 "-sram@[0-9a-f]+$":
81 reg = <0xfdd00000 0x2000>,
82 <0xfec00000 0x180000>;
93 ranges = <0 0xfec00000 0x100000>;
95 gmu-sram@0 {
96 reg = <0x0 0x100000>;
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/remoteproc/
H A Dwkup_m3_rproc.txt37 ranges = <0 0x44c00000 0x400000>;
43 reg = <0x100000 0x4000>,
44 <0x180000 0x2000>;
/OK3568_Linux_fs/kernel/drivers/clk/imx/
H A Dclk-imx8qxp-lpcg.h11 #define LSIO_PWM_0_LPCG 0x00000
12 #define LSIO_PWM_1_LPCG 0x10000
13 #define LSIO_PWM_2_LPCG 0x20000
14 #define LSIO_PWM_3_LPCG 0x30000
15 #define LSIO_PWM_4_LPCG 0x40000
16 #define LSIO_PWM_5_LPCG 0x50000
17 #define LSIO_PWM_6_LPCG 0x60000
18 #define LSIO_PWM_7_LPCG 0x70000
19 #define LSIO_GPIO_0_LPCG 0x80000
20 #define LSIO_GPIO_1_LPCG 0x90000
[all …]
/OK3568_Linux_fs/kernel/include/video/
H A Dpmagb-b-fb.h16 #define PMAGB_B_ROM 0x000000 /* REX option ROM */
17 #define PMAGB_B_SFB 0x100000 /* SFB ASIC */
18 #define PMAGB_B_GP0 0x140000 /* general purpose output 0 */
19 #define PMAGB_B_GP1 0x180000 /* general purpose output 1 */
20 #define PMAGB_B_BT459 0x1c0000 /* Bt459 RAMDAC */
21 #define PMAGB_B_FBMEM 0x200000 /* frame buffer */
22 #define PMAGB_B_SIZE 0x400000 /* address space size */
25 #define SFB_REG_VID_HOR 0x64 /* video horizontal setup */
26 #define SFB_REG_VID_VER 0x68 /* video vertical setup */
27 #define SFB_REG_VID_BASE 0x6c /* video base address */
[all …]

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