| /OK3568_Linux_fs/u-boot/include/configs/ |
| H A D | am57xx_evm.h | 26 #define CONFIG_SYS_MMC_ENV_PART 0 28 #define CONFIG_ENV_OFFSET 0x260000 38 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 47 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ 67 "dfu_bufsiz=0x10000\0" \ 107 * 0x000000 - 0x040000 : QSPI.SPL (256KiB) 108 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB) 109 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB) 110 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB) 111 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB) [all …]
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| H A D | dra7xx_evm.h | 23 #define CONFIG_MAX_MEM_MAPPED 0x80000000 29 #define CONFIG_ENV_OFFSET 0x260000 44 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 54 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ 74 "dfu_bufsiz=0x10000\0" \ 84 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000 86 "dfu_bufsiz=0x10000\0" \ 115 * 0x000000 - 0x040000 : QSPI.SPL (256KiB) 116 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB) 117 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB) [all …]
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| H A D | display5.h | 14 #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 18 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x3F00 21 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x100 /* 128KiB */ 29 * 0x000000 - 0x020000 : SPI.SPL (128KiB) 30 * 0x020000 - 0x120000 : SPI.u-boot (1MiB) 31 * 0x120000 - 0x130000 : SPI.u-boot-env1 (64KiB) 32 * 0x130000 - 0x140000 : SPI.u-boot-env2 (64KiB) 33 * 0x140000 - 0x540000 : SPI.swupdate-kernel-FIT (4MiB) 34 * 0x540000 - 0x1540000 : SPI.swupdate-initramfs (16MiB) 35 * 0x1540000 - 0x1640000 : SPI.factory (1MiB) [all …]
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| H A D | adp-ae3xx.h | 32 #define CONFIG_SYS_TEXT_BASE 0x00500000 39 #define CONFIG_SYS_TEXT_BASE 0x80000000 63 #define TIMER_LOAD_VAL 0xffffffff 82 /* FTUART is a high speed NS 16C550A compatible UART, addr: 0x99600000 */ 112 #define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ 119 #define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */ 120 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ 124 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0xA0000 - \ 131 #define CONFIG_SYS_LOAD_ADDR 0x300000 135 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + 0x03F00000) [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | dra74x.dtsi | 49 reg = <0x41500000 0x100>; 55 reg = <0x41501000 0x4>, 56 <0x41501010 0x4>, 57 <0x41501014 0x4>; 65 clocks = <&dsp2_clkctrl DRA7_DSP2_MMU0_DSP2_CLKCTRL 0>; 69 ranges = <0x0 0x41501000 0x1000>; 73 mmu0_dsp2: mmu@0 { 75 reg = <0x0 0x100>; 77 #iommu-cells = <0>; 78 ti,syscon-mmuconfig = <&dsp2_system 0x0>; [all …]
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| H A D | at91-kizbox3_common.dtsi | 68 pinctrl-0 = <&pinctrl_pwm0_pwm_h0 76 pwms = <&pwm0 0 10000000 0>; 84 pwms = <&pwm0 1 10000000 0>; 92 pwms = <&pwm0 2 10000000 0>; 99 pwms = <&pwm0 3 10000000 0>; 114 pinctrl-0 = <&pinctrl_ebi_nand_addr>; 116 reg = <0x3 0x0 0x800000>; 118 atmel,rb = <0>; 131 bootstrap@0 { 133 reg = <0x0 0x20000>; [all …]
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| H A D | at91-sama5d2_ptc_ek.dts | 46 pinctrl-0 = <&pinctrl_usba_vbus>; 52 atmel,vbus-gpio = <0 54 0 57 pinctrl-0 = <&pinctrl_usb_default>; 67 pinctrl-0 = <&pinctrl_nand_default>; 74 reg = <0x3 0x0 0x2>; 75 atmel,rb = <0>; 86 at91bootstrap@0 { 88 reg = <0x0 0x40000>; 93 reg = <0x40000 0xc0000>; [all …]
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| H A D | at91sam9x5cm.dtsi | 11 reg = <0x20000000 0x8000000>; 27 timer@0 { 29 reg = <0>; 40 pinctrl_1wire_cm: 1wire_cm-0 { 52 pinctrl-0 = <&pinctrl_ebi_addr_nand 59 pinctrl-0 = <&pinctrl_nand_oe_we 65 reg = <0x3 0x0 0x800000>; 80 at91bootstrap@0 { 82 reg = <0x0 0x40000>; 87 reg = <0x40000 0xc0000>; [all …]
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| H A D | at91-cosino.dtsi | 24 reg = <0x20000000 0x8000000>; 49 pinctrl-0 = <&pinctrl_ebi_addr_nand 55 pinctrl-0 = <&pinctrl_nand_oe_we 62 reg = <0x3 0x0 0x800000>; 77 at91bootstrap@0 { 79 reg = <0x0 0x40000>; 84 reg = <0x40000 0x80000>; 89 reg = <0xc0000 0x140000>; 94 reg = <0x200000 0x600000>; 99 reg = <0x800000 0x0f800000>; [all …]
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| H A D | kirkwood-linksys-viper.dts | 23 reg = <0x00000000 0x8000000>; 37 #size-cells = <0>; 38 pinctrl-0 = < &pmx_btn_wps &pmx_btn_reset >; 56 pinctrl-0 = < &pmx_led_white_health &pmx_led_white_pulse >; 92 pinctrl-0 = <&pmx_nand>; 100 partition@0 { 102 reg = <0x0 0x80000>; 108 reg = <0x80000 0x20000>; 113 reg = <0xA0000 0x20000>; 118 reg = <0x200000 0x2A0000>; [all …]
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| H A D | spear320-hmi.dts | 18 reg = <0 0x40000000>; 25 pinctrl-0 = <&state_default>; 102 partition@0 { 104 reg = <0x0 0x80000>; 108 reg = <0x80000 0x140000>; 112 reg = <0x1C0000 0x40000>; 116 reg = <0x200000 0x40000>; 120 reg = <0x240000 0xC00000>; 124 reg = <0xE40000 0x0>; 131 #size-cells = <0>; [all …]
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| H A D | at91-sam9x60ek.dts | 40 #size-cells = <0>; 42 vdd_1v8: fixed-regulator-vdd_1v8@0 { 82 pinctrl-0 = <&pinctrl_key_gpio_default>; 96 pinctrl-0 = <&pinctrl_gpio_leds>; 121 pinctrl-0 = <&pinctrl_adc_default &pinctrl_adtrg_default>; 127 pinctrl-0 = <&pinctrl_can0_rx_tx>; 133 pinctrl-0 = <&pinctrl_can1_rx_tx>; 139 pinctrl-0 = <&pinctrl_classd_default>; 147 pinctrl-0 = <&pinctrl_dbgu>; 153 pinctrl-0 = <&pinctrl_ebi_addr_nand &pinctrl_ebi_data_0_7>; [all …]
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| H A D | at91-sama5d4_xplained.dts | 20 reg = <0x20000000 0x20000000>; 42 cs-gpios = <&pioC 3 0>, <0>, <0>, <0>; 44 m25p80@0 { 47 reg = <0>; 60 pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>; 71 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; 75 slot@0 { 76 reg = <0>; 78 cd-gpios = <&pioE 3 0>; 94 pinctrl-0 = <&pinctrl_spi1_cs>; [all …]
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| H A D | picoxcell-pc3x2.dtsi | 12 #address-cells = <0>; 13 #size-cells = <0>; 31 pclk: clock@0 { 43 ranges = <0 0x80000000 0x400000>; 47 reg = <0x30000 0x10000>; 54 reg = <0x40000 0x10000>; 61 reg = <0x50000 0x10000>; 69 reg = <0x60000 0x1000>; 76 reg = <0x64000 0x1000>; 82 reg = <0x80000 0x10000>; [all …]
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| H A D | omap3430-sdp.dts | 15 reg = <0x80000000 0x10000000>; /* 256 MB */ 23 reg = <0x48>; 50 ranges = <0 0 0x10000000 0x08000000>, 51 <1 0 0x28000000 0x1000000>, /* CS1: 16MB for NAND */ 52 <2 0 0x20000000 0x1000000>; /* CS2: 16MB for OneNAND */ 54 nor@0,0 { 59 reg = <0 0 0x08000000>; 63 gpmc,cs-on-ns = <0>; 84 partition@0 { 86 reg = <0 0x40000>; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/arm/ |
| H A D | rtsm_ve-motherboard-rs2.dtsi | 15 reg = <0x140000 0x200>; 21 reg = <0x150000 0x200>;
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| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | at91sam9x5cm.dtsi | 12 reg = <0x20000000 0x8000000>; 29 pinctrl_1wire_cm: 1wire_cm-0 { 49 at91bootstrap@0 { 51 reg = <0x0 0x40000>; 56 reg = <0x40000 0x80000>; 61 reg = <0xc0000 0x140000>; 66 reg = <0x200000 0x600000>; 71 reg = <0x800000 0x1f800000>; 96 pinctrl-0 = <&pinctrl_1wire_cm>;
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| /OK3568_Linux_fs/kernel/drivers/clk/imx/ |
| H A D | clk-imx8qxp-lpcg.h | 11 #define LSIO_PWM_0_LPCG 0x00000 12 #define LSIO_PWM_1_LPCG 0x10000 13 #define LSIO_PWM_2_LPCG 0x20000 14 #define LSIO_PWM_3_LPCG 0x30000 15 #define LSIO_PWM_4_LPCG 0x40000 16 #define LSIO_PWM_5_LPCG 0x50000 17 #define LSIO_PWM_6_LPCG 0x60000 18 #define LSIO_PWM_7_LPCG 0x70000 19 #define LSIO_GPIO_0_LPCG 0x80000 20 #define LSIO_GPIO_1_LPCG 0x90000 [all …]
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| /OK3568_Linux_fs/u-boot/include/environment/ti/ |
| H A D | dfu.h | 14 "boot part 0 1;" \ 15 "rootfs part 0 2;" \ 16 "MLO fat 0 1;" \ 17 "MLO.raw raw 0x100 0x100;" \ 18 "u-boot.img.raw raw 0x300 0x1000;" \ 19 "u-env.raw raw 0x1300 0x200;" \ 20 "spl-os-args.raw raw 0x1500 0x200;" \ 21 "spl-os-image.raw raw 0x1700 0x6900;" \ 22 "spl-os-args fat 0 1;" \ 23 "spl-os-image fat 0 1;" \ [all …]
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| /OK3568_Linux_fs/kernel/include/video/ |
| H A D | pmagb-b-fb.h | 16 #define PMAGB_B_ROM 0x000000 /* REX option ROM */ 17 #define PMAGB_B_SFB 0x100000 /* SFB ASIC */ 18 #define PMAGB_B_GP0 0x140000 /* general purpose output 0 */ 19 #define PMAGB_B_GP1 0x180000 /* general purpose output 1 */ 20 #define PMAGB_B_BT459 0x1c0000 /* Bt459 RAMDAC */ 21 #define PMAGB_B_FBMEM 0x200000 /* frame buffer */ 22 #define PMAGB_B_SIZE 0x400000 /* address space size */ 25 #define SFB_REG_VID_HOR 0x64 /* video horizontal setup */ 26 #define SFB_REG_VID_VER 0x68 /* video vertical setup */ 27 #define SFB_REG_VID_BASE 0x6c /* video base address */ [all …]
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| /OK3568_Linux_fs/kernel/sound/soc/intel/atom/sst/ |
| H A D | sst_acpi.c | 38 #define SST_BYT_IRAM_PHY_START 0xff2c0000 39 #define SST_BYT_IRAM_PHY_END 0xff2d4000 40 #define SST_BYT_DRAM_PHY_START 0xff300000 41 #define SST_BYT_DRAM_PHY_END 0xff320000 42 #define SST_BYT_IMR_VIRT_START 0xc0000000 /* virtual addr in LPE */ 43 #define SST_BYT_IMR_VIRT_END 0xc01fffff 44 #define SST_BYT_SHIM_PHY_ADDR 0xff340000 45 #define SST_BYT_MBOX_PHY_ADDR 0xff344000 46 #define SST_BYT_DMA0_PHY_ADDR 0xff298000 47 #define SST_BYT_DMA1_PHY_ADDR 0xff29c000 [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/socionext/ |
| H A D | socionext,uniphier-system-cache.yaml | 70 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>; 71 interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>; 73 cache-size = <0x140000>; 83 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, <0x506c0000 0x400>; 84 interrupts = <0 190 4>, <0 191 4>; 86 cache-size = <0x200000>; 95 reg = <0x500c8000 0x2000>, <0x503c8100 0x8>, <0x506c8000 0x400>; 96 interrupts = <0 174 4>, <0 175 4>; 98 cache-size = <0x200000>;
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | cpu_sun9i.h | 13 #define REGS_AHB0_BASE 0x01C00000 14 #define REGS_AHB1_BASE 0x00800000 15 #define REGS_AHB2_BASE 0x03000000 16 #define REGS_APB0_BASE 0x06000000 17 #define REGS_APB1_BASE 0x07000000 18 #define REGS_RCPUS_BASE 0x08000000 20 #define SUNXI_SRAM_D_BASE 0x08100000 23 #define SUNXI_NFC_BASE (REGS_AHB0_BASE + 0x3000) 24 #define SUNXI_TSC_BASE (REGS_AHB0_BASE + 0x4000) 26 #define SUNXI_GTBUS_BASE (REGS_AHB0_BASE + 0x9000) [all …]
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| /OK3568_Linux_fs/kernel/sound/pci/ctxfi/ |
| H A D | ct20k1reg.h | 10 #define DSPXRAM_START 0x000000 11 #define DSPXRAM_END 0x013FFC 12 #define DSPAXRAM_START 0x020000 13 #define DSPAXRAM_END 0x023FFC 14 #define DSPYRAM_START 0x040000 15 #define DSPYRAM_END 0x04FFFC 16 #define DSPAYRAM_START 0x020000 17 #define DSPAYRAM_END 0x063FFC 18 #define DSPMICRO_START 0x080000 19 #define DSPMICRO_END 0x0B3FFC [all …]
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| /OK3568_Linux_fs/kernel/include/soc/fsl/qe/ |
| H A D | immap_qe.h | 25 u8 res0[0x04]; 27 u8 res1[0x70]; 43 u8 res0[0x4]; 46 u8 res1[0x4]; 48 u8 res2[0x20]; 50 u8 res3[0x1C]; 58 u8 res0[0xA]; 60 u8 res1[0x2]; 65 u8 res2[0x8]; 69 u8 res3[0x2]; [all …]
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