Searched +full:0 +full:x10180000 (Results 1 – 14 of 14) sorted by relevance
30 #define NOMADIK_FSMC_BASE 0x10100000 /* FSMC registers */31 #define NOMADIK_SDRAMC_BASE 0x10110000 /* SDRAM Controller */32 #define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */33 #define NOMADIK_MDIF_BASE 0x10120000 /* MDIF */34 #define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */35 #define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */36 #define NOMADIK_DMA1_BASE 0x10150000 /* DMA1 Controller */37 #define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */38 #define NOMADIK_CRYP_BASE 0x10180000 /* Crypto processor */39 #define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */[all …]
145 reg = <0x10180000 0x40000>;
13 #define RT3883_SDRAM_BASE 0x0000000014 #define RT3883_SYSC_BASE 0x1000000015 #define RT3883_TIMER_BASE 0x1000010016 #define RT3883_INTC_BASE 0x1000020017 #define RT3883_MEMC_BASE 0x1000030018 #define RT3883_UART0_BASE 0x1000050019 #define RT3883_PIO_BASE 0x1000060020 #define RT3883_FSCC_BASE 0x1000070021 #define RT3883_NANDC_BASE 0x1000081022 #define RT3883_I2C_BASE 0x10000900[all …]
41 reg = <0x20018000 0x4000>;42 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,52 reg = <0x2001c000 0x4000>;53 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,64 reg = <0x20078000 0x4000>;77 #clock-cells = <0>;83 reg = <0x10138000 0x1000>;90 reg = <0x1013c000 0x100>;95 reg = <0x1013c200 0x20>;96 interrupts = <GIC_PPI 11 0x304>;[all …]
31 reg = <0x60000000 0x40000000>;43 #size-cells = <0>;49 reg = <0xf00>;62 reg = <0xf01>;75 reg = <0x20078000 0x4000>;77 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,89 #clock-cells = <0>;109 reg = <0x20000000 0x1000>;119 reg = <0x0 0x20004000 0x0 0x1000>;124 reg = <0x20060000 0x100>;[all …]
41 reg = <0x60000000 0x40000000>;54 #size-cells = <0>;57 cpu0:cpu@0x000 {60 reg = <0x000>;70 cpu1:cpu@0x001 {73 reg = <0x001>;76 cpu2:cpu@0x002 {79 reg = <0x002>;82 cpu3:cpu@0x003 {85 reg = <0x003>;[all …]
43 reg = <0x20018000 0x4000>;44 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,55 reg = <0x2001c000 0x4000>;56 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,68 reg = <0x20078000 0x4000>;82 #clock-cells = <0>;88 reg = <0x10090000 0x10000>;99 reg = <0x10138000 0x1000>;106 reg = <0x1013c000 0x100>;111 reg = <0x1013c200 0x20>;[all …]
38 #size-cells = <0>;44 reg = <0xf00>;53 reg = <0xf01>;99 reg = <0x20078000 0x4000>;100 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,141 #clock-cells = <0>;146 reg = <0x10080000 0x2000>;149 ranges = <0 0x10080000 0x2000>;151 smp-sram@0 {153 reg = <0x00 0x10>;[all …]
75 #size-cells = <0>;80 reg = <0xf00>;89 reg = <0xf01>;95 reg = <0xf02>;101 reg = <0xf03>;112 14 254 0116 1 13 0190 reg = <0x20078000 0x4000>;191 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,231 vop-dclk-mode = <0>;[all …]