| /OK3568_Linux_fs/u-boot/board/altera/cyclone5-socdk/qts/ |
| H A D | iocsr_config.h | 16 0x00000000, 17 0x00000000, 18 0x0FF00000, 19 0xC0000000, 20 0x0000003F, 21 0x00008000, 22 0x00020080, 23 0x08020000, 24 0x08000000, 25 0x00018020, [all …]
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| /OK3568_Linux_fs/u-boot/board/terasic/de0-nano-soc/qts/ |
| H A D | iocsr_config.h | 16 0x00000000, 17 0x00000000, 18 0x0FF00000, 19 0xC0000000, 20 0x0000003F, 21 0x00008000, 22 0x00020080, 23 0x18060000, 24 0x08000000, 25 0x00018020, [all …]
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| /OK3568_Linux_fs/u-boot/board/terasic/de10-nano/qts/ |
| H A D | iocsr_config.h | 16 0x00000000, 17 0x00000000, 18 0x0FF00000, 19 0xC0000000, 20 0x0000003F, 21 0x00008000, 22 0x00020080, 23 0x18060000, 24 0x08000000, 25 0x00018020, [all …]
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| /OK3568_Linux_fs/u-boot/board/sr1500/qts/ |
| H A D | iocsr_config.h | 16 0x00100000, 17 0x40000000, 18 0x0FF00000, 19 0xC0000000, 20 0x0000003F, 21 0x00008000, 22 0x000E0180, 23 0x18060000, 24 0x18000000, 25 0x00018060, [all …]
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| /OK3568_Linux_fs/u-boot/board/is1/qts/ |
| H A D | iocsr_config.h | 16 0x00000000, 17 0x00000000, 18 0x0FF00000, 19 0xC0000000, 20 0x0000003F, 21 0x00008000, 22 0x00060180, 23 0x18060000, 24 0x18000000, 25 0x00018060, [all …]
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| /OK3568_Linux_fs/u-boot/board/ebv/socrates/qts/ |
| H A D | iocsr_config.h | 16 0x00000000, 17 0x00000000, 18 0x0FF00000, 19 0xC0000000, 20 0x0000003F, 21 0x00008000, 22 0x00004824, 23 0x01209000, 24 0x82400000, 25 0x00018004, [all …]
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| /OK3568_Linux_fs/u-boot/board/terasic/de1-soc/qts/ |
| H A D | iocsr_config.h | 16 0x00000000, 17 0x00000000, 18 0x0FF00000, 19 0xC0000000, 20 0x0000003F, 21 0x00008000, 22 0x00060180, 23 0x18060000, 24 0x18000000, 25 0x00018060, [all …]
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| /OK3568_Linux_fs/u-boot/board/samtec/vining_fpga/qts/ |
| H A D | iocsr_config.h | 16 0x00000000, 17 0x00000000, 18 0x0FF00000, 19 0xC0000000, 20 0x0000003F, 21 0x00008000, 22 0x00060180, 23 0x18060000, 24 0x18000000, 25 0x00018060, [all …]
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| /OK3568_Linux_fs/u-boot/board/terasic/sockit/qts/ |
| H A D | iocsr_config.h | 16 0x00000000, 17 0x00000000, 18 0x0FF00000, 19 0xC0000000, 20 0x0000003F, 21 0x00008000, 22 0x00060180, 23 0x18060000, 24 0x18000000, 25 0x00018060, [all …]
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| /OK3568_Linux_fs/u-boot/board/aries/mcvevk/qts/ |
| H A D | iocsr_config.h | 16 0x00000000, 17 0x00000000, 18 0x0FF00000, 19 0xC0000000, 20 0x0000003F, 21 0x00008000, 22 0x00000000, 23 0x18060000, 24 0x00000060, 25 0x00000000, [all …]
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| /OK3568_Linux_fs/u-boot/board/altera/arria5-socdk/qts/ |
| H A D | iocsr_config.h | 16 0x00000000, 17 0x00000000, 18 0x00000000, 19 0x00000000, 20 0x00000000, 21 0x00008000, 22 0x00060180, 23 0x18060000, 24 0x18000060, 25 0x00018060, [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/ |
| H A D | sec_boot.S | 15 ldr r2, =0x02073000 @ r2: target address 29 * This workaround code is relocated to the address 0x02073000 31 * (Base Address - 0x02020000, Limit Address - 0x020740000). 44 * Resume address - 0x2073008 45 * Resume flag - 0x207300C 48 * Switch address - 0x2073018 51 * Hotplug address - 0x207301C 54 * C2 address - 0x2073024 57 * CPU0 state - 0x2073028 58 * CPU1 state - 0x207302C [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/include/mach/ |
| H A D | cpu.h | 11 #define DEVICE_NOT_AVAILABLE 0 14 #define EXYNOS4_ADDR_BASE 0x10000000 17 #define EXYNOS4_I2C_SPACING 0x10000 19 #define EXYNOS4_GPIO_PART3_BASE 0x03860000 20 #define EXYNOS4_PRO_ID 0x10000000 21 #define EXYNOS4_SYSREG_BASE 0x10010000 22 #define EXYNOS4_POWER_BASE 0x10020000 23 #define EXYNOS4_SWRESET 0x10020400 24 #define EXYNOS4_CLOCK_BASE 0x10030000 25 #define EXYNOS4_SYSTIMER_BASE 0x10050000 [all …]
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| /OK3568_Linux_fs/external/security/librkcrypto/test/c_mode/ |
| H A D | des_core.c | 42 volatile unsigned char *p = (unsigned char*)v; while( n-- ) *p++ = 0; in mbedtls_zeroize() 73 0x01010400, 0x00000000, 0x00010000, 0x01010404, 74 0x01010004, 0x00010404, 0x00000004, 0x00010000, 75 0x00000400, 0x01010400, 0x01010404, 0x00000400, 76 0x01000404, 0x01010004, 0x01000000, 0x00000004, 77 0x00000404, 0x01000400, 0x01000400, 0x00010400, 78 0x00010400, 0x01010000, 0x01010000, 0x01000404, 79 0x00010004, 0x01000004, 0x01000004, 0x00010004, 80 0x00000000, 0x00000404, 0x00010404, 0x01000000, 81 0x00010000, 0x01010404, 0x00000004, 0x01010000, [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/spi/ |
| H A D | spi-sifive.yaml | 60 enum: [0, 1, 2, 3, 4, 5, 6, 7, 8] 75 reg = <0x10040000 0x1000>, <0x20000000 0x10000000>; 80 #size-cells = <0>;
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/samsung/ |
| H A D | pmu.yaml | 62 pattern: '^clkout([0-9]|[12][0-9]|3[0-1])$' 121 reg = <0x10040000 0x5000>;
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| /OK3568_Linux_fs/kernel/lib/crypto/ |
| H A D | des.c | 31 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14, 32 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54, 33 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16, 34 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56, 35 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c, 36 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c, 37 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e, 38 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e, 39 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34, 40 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74, [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/mach-imx/ |
| H A D | mx2x.h | 16 #define MX2x_AIPI_BASE_ADDR 0x10000000 18 #define MX2x_DMA_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x01000) 19 #define MX2x_WDOG_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x02000) 20 #define MX2x_GPT1_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x03000) 21 #define MX2x_GPT2_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x04000) 22 #define MX2x_GPT3_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x05000) 23 #define MX2x_PWM_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x06000) 24 #define MX2x_RTC_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x07000) 25 #define MX2x_KPP_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x08000) 26 #define MX2x_OWIRE_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x09000) [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | arm-realview-eb.dts | 31 arm,hbi = <0x140>; 56 reg = <0x10041000 0x1000>, 57 <0x10040000 0x100>; 69 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>; 74 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; 79 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>; 84 interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>, 85 <0 18 IRQ_TYPE_LEVEL_HIGH>; 90 interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>; 95 interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>; [all …]
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| H A D | stm32mp15xx-osd32.dtsi | 19 reg = <0x10000000 0x40000>; 25 reg = <0x10040000 0x1000>; 31 reg = <0x10041000 0x1000>; 37 reg = <0x10042000 0x4000>; 43 reg = <0x30000000 0x40000>; 49 reg = <0x38000000 0x10000>; 63 pinctrl-0 = <&i2c4_pins_a>; 72 reg = <0x33>; 73 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; 89 regulator-initial-mode = <0>; [all …]
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| H A D | arm-realview-eb-mp.dtsi | 46 reg = <0x1f001000 0x1000>, 47 <0x1f000100 0x100>; 56 reg = <0x10041000 0x1000>, 57 <0x10040000 0x100>; 59 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; 64 reg = <0x1f002000 0x1000>; 66 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>, 67 <0 30 IRQ_TYPE_LEVEL_HIGH>, 68 <0 31 IRQ_TYPE_LEVEL_HIGH>; 88 reg = <0x1f000000 0x100>; [all …]
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| H A D | stm32mp157c-odyssey-som.dtsi | 22 reg = <0xc0000000 0x20000000>; 32 reg = <0x10000000 0x40000>; 38 reg = <0x10040000 0x1000>; 44 reg = <0x10041000 0x1000>; 50 reg = <0x10042000 0x4000>; 56 reg = <0x30000000 0x40000>; 62 reg = <0x38000000 0x10000>; 67 reg = <0xd4000000 0x4000000>; 90 pinctrl-0 = <&i2c2_pins_a>; 100 reg = <0x33>; [all …]
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| H A D | stm32mp15xx-dhcom-som.dtsi | 18 reg = <0xC0000000 0x40000000>; 28 reg = <0x10000000 0x40000>; 34 reg = <0x10040000 0x1000>; 40 reg = <0x10041000 0x1000>; 46 reg = <0x10042000 0x4000>; 52 reg = <0x30000000 0x40000>; 58 reg = <0x38000000 0x10000>; 81 adc1: adc@0 { 83 st,adc-channels = <0>; 96 pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>; [all …]
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| H A D | stm32mp157c-ed1.dts | 25 reg = <0xC0000000 0x40000000>; 35 reg = <0x10000000 0x40000>; 41 reg = <0x10040000 0x1000>; 47 reg = <0x10041000 0x1000>; 53 reg = <0x10042000 0x4000>; 59 reg = <0x30000000 0x40000>; 65 reg = <0x38000000 0x10000>; 70 reg = <0xe8000000 0x8000000>; 88 gpios-states = <0>; 89 states = <1800000 0x1>, [all …]
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| /OK3568_Linux_fs/kernel/arch/riscv/boot/dts/sifive/ |
| H A D | fu540-c000.dtsi | 24 #size-cells = <0>; 25 cpu0: cpu@0 { 31 reg = <0>; 144 compatible = "sifive,plic-1.0.0"; 145 reg = <0x0 0xc000000 0x0 0x4000000>; 149 &cpu0_intc 0xffffffff 150 &cpu1_intc 0xffffffff &cpu1_intc 9 151 &cpu2_intc 0xffffffff &cpu2_intc 9 152 &cpu3_intc 0xffffffff &cpu3_intc 9 153 &cpu4_intc 0xffffffff &cpu4_intc 9>; [all …]
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