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/OK3568_Linux_fs/kernel/arch/arm/include/debug/
H A Dimx-uart.h9 #define IMX1_UART1_BASE_ADDR 0x00206000
10 #define IMX1_UART2_BASE_ADDR 0x00207000
14 #define IMX25_UART1_BASE_ADDR 0x43f90000
15 #define IMX25_UART2_BASE_ADDR 0x43f94000
16 #define IMX25_UART3_BASE_ADDR 0x5000c000
17 #define IMX25_UART4_BASE_ADDR 0x50008000
18 #define IMX25_UART5_BASE_ADDR 0x5002c000
22 #define IMX27_UART1_BASE_ADDR 0x1000a000
23 #define IMX27_UART2_BASE_ADDR 0x1000b000
24 #define IMX27_UART3_BASE_ADDR 0x1000c000
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dexynos54xx.dtsi42 <7 0>,
60 reg = <0x02020000 0x54000>;
63 ranges = <0 0x02020000 0x54000>;
65 smp-sram@0 {
67 reg = <0x0 0x1000>;
72 reg = <0x53000 0x1000>;
78 reg = <0x101c0000 0xb00>;
95 reg = <0x101d0000 0x100>;
101 reg = <0x12d10000 0x100>;
111 reg = <0x12ca0000 0x1000>;
[all …]
H A Dexynos4210.dtsi33 #size-cells = <0>;
38 reg = <0x900>;
57 reg = <0x901>;
77 reg = <0x02020000 0x20000>;
80 ranges = <0 0x02020000 0x20000>;
82 smp-sram@0 {
84 reg = <0x0 0x1000>;
89 reg = <0x1f000 0x1000>;
95 reg = <0x10023CA0 0x20>;
96 #power-domain-cells = <0>;
[all …]
H A Dexynos4412.dtsi36 #size-cells = <0>;
41 reg = <0xA00>;
51 reg = <0xA01>;
61 reg = <0xA02>;
71 reg = <0xA03>;
162 reg = <0x11400000 0x1000>;
168 reg = <0x11000000 0x1000>;
180 reg = <0x03860000 0x1000>;
182 interrupts = <10 0>;
187 reg = <0x106E0000 0x1000>;
[all …]
H A Dexynos3250.dtsi51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0>;
100 xusbxti: clock-0 {
102 clock-frequency = <0>;
103 #clock-cells = <0>;
109 clock-frequency = <0>;
110 #clock-cells = <0>;
116 clock-frequency = <0>;
117 #clock-cells = <0>;
[all …]
H A Dexynos5250.dtsi51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0>;
169 reg = <0x02020000 0x30000>;
172 ranges = <0 0x02020000 0x30000>;
174 smp-sram@0 {
176 reg = <0x0 0x1000>;
181 reg = <0x2f000 0x1000>;
187 reg = <0x10044000 0x20>;
188 #power-domain-cells = <0>;
[all …]
H A Dimx6sll.dtsi45 #size-cells = <0>;
47 cpu0: cpu@0 {
50 reg = <0>;
82 #clock-cells = <0>;
89 #clock-cells = <0>;
96 #clock-cells = <0>;
97 clock-frequency = <0>;
103 #clock-cells = <0>;
104 clock-frequency = <0>;
117 reg = <0x00900000 0x20000>;
[all …]
H A Dimx6sl.dtsi48 #size-cells = <0>;
50 cpu@0 {
53 reg = <0x0>;
85 #clock-cells = <0>;
91 #clock-cells = <0>;
99 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
104 #phy-cells = <0>;
116 reg = <0x00900000 0x20000>;
117 ranges = <0 0x00900000 0x20000>;
127 reg = <0x00a01000 0x1000>,
[all …]
H A Dimx6ul.dtsi56 #size-cells = <0>;
58 cpu0: cpu@0 {
61 reg = <0>;
106 #clock-cells = <0>;
113 #clock-cells = <0>;
120 #clock-cells = <0>;
121 clock-frequency = <0>;
127 #clock-cells = <0>;
128 clock-frequency = <0>;
147 reg = <0x00900000 0x20000>;
[all …]
H A Dimx6qdl.dtsi55 #clock-cells = <0>;
61 #clock-cells = <0>;
62 clock-frequency = <0>;
67 #clock-cells = <0>;
74 #size-cells = <0>;
79 lvds-channel@0 {
81 #size-cells = <0>;
82 reg = <0>;
85 port@0 {
86 reg = <0>;
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sram/
H A Dsram.yaml143 reg = <0x5c000000 0x40000>; /* 256 KiB SRAM at address 0x5c000000 */
147 ranges = <0 0x5c000000 0x40000>;
150 reg = <0x100 0x50>;
154 reg = <0x1000 0x1000>;
159 reg = <0x20000 0x20000>;
174 reg = <0x02020000 0x54000>;
177 ranges = <0 0x02020000 0x54000>;
179 smp-sram@0 {
181 reg = <0x0 0x1000>;
186 reg = <0x53000 0x1000>;
[all …]
/OK3568_Linux_fs/u-boot/include/configs/
H A Dexynos5420-common.h24 #define CONFIG_SPL_TEXT_BASE 0x02024410
26 #define CONFIG_SPL_TEXT_BASE 0x02024400
28 #define CONFIG_IRAM_TOP 0x02074000
35 #define CONFIG_PHY_IRAM_BASE 0x02020000
38 #define CONFIG_EXYNOS_RELOCATE_CODE_BASE (CONFIG_IRAM_TOP - 0x1000)
43 #define CONFIG_LOWPOWER_FLAG 0x02020028
44 #define CONFIG_LOWPOWER_ADDR 0x0202002C
49 #define CONFIG_CORE_COUNT 0x8
H A Darndale.h13 "fdtfile=exynos5250-arndale.dtb\0"
28 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
32 #define CONFIG_IRAM_STACK 0x02050000
42 #define CONFIG_S5P_PA_SYSRAM 0x02020000
46 #define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/cavium/
H A Dthunder2-99xx.dtsi21 #address-cells = <0x2>;
22 #size-cells = <0x0>;
24 cpu@0 {
27 reg = <0x0 0x0>;
34 reg = <0x0 0x1>;
41 reg = <0x0 0x2>;
48 reg = <0x0 0x3>;
66 reg = <0x04 0x00080000 0x0 0x20000>, /* GICD */
67 <0x04 0x01000000 0x0 0x1000000>; /* GICR */
73 reg = <0x04 0x00100000 0x0 0x20000>; /* GIC ITS */
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/
H A Dsec_boot.S15 ldr r2, =0x02073000 @ r2: target address
29 * This workaround code is relocated to the address 0x02073000
31 * (Base Address - 0x02020000, Limit Address - 0x020740000).
44 * Resume address - 0x2073008
45 * Resume flag - 0x207300C
48 * Switch address - 0x2073018
51 * Hotplug address - 0x207301C
54 * C2 address - 0x2073024
57 * CPU0 state - 0x2073028
58 * CPU1 state - 0x207302C
[all …]
/OK3568_Linux_fs/kernel/lib/crypto/
H A Ddes.c31 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14,
32 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54,
33 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16,
34 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56,
35 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c,
36 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c,
37 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e,
38 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e,
39 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34,
40 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74,
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/cpu/arm926ejs/mxs/
H A Dspl_mem_init.c24 0x00000000, 0x00000000, 0x00000000, 0x00000000,
25 0x00000000, 0x00000000, 0x00000000, 0x00000000,
26 0x00000000, 0x00000000, 0x00000000, 0x00000000,
27 0x00000000, 0x00000000, 0x00000000, 0x00000000,
28 0x00000000, 0x00000100, 0x00000000, 0x00000000,
29 0x00000000, 0x00000000, 0x00000000, 0x00000000,
30 0x00000000, 0x00000000, 0x00010101, 0x01010101,
31 0x000f0f01, 0x0f02020a, 0x00000000, 0x00010101,
32 0x00000100, 0x00000100, 0x00000000, 0x00000002,
33 0x01010000, 0x07080403, 0x06005003, 0x0a0000c8,
[all …]
/OK3568_Linux_fs/kernel/net/smc/
H A Dsmc_clc.h20 #define SMC_CLC_PROPOSAL 0x01
21 #define SMC_CLC_ACCEPT 0x02
22 #define SMC_CLC_CONFIRM 0x03
23 #define SMC_CLC_DECLINE 0x04
25 #define SMC_TYPE_R 0 /* SMC-R only */
31 #define SMC_CLC_DECL_MEM 0x01010000 /* insufficient memory resources */
32 #define SMC_CLC_DECL_TIMEOUT_CL 0x02010000 /* timeout w4 QP confirm link */
33 #define SMC_CLC_DECL_TIMEOUT_AL 0x02020000 /* timeout w4 QP add link */
34 #define SMC_CLC_DECL_CNFERR 0x03000000 /* configuration error */
35 #define SMC_CLC_DECL_PEERNOSMC 0x03010000 /* peer did not indicate SMC */
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dexynos5250-snow.dts47 reg = <0x40000000 0x80000000>;
56 reg = <0x02020000 0x60000>;
60 samsung,bl1-offset = <0x1400>;
61 samsung,bl2-offset = <0x3400>;
63 u-boot-offset = <0x3e00000 0x100000>;
67 reg = <0 0x100000>;
72 reg = <0 0x2000>;
81 reg = <0x2000 0x4000>;
91 reg = <0x6000 0x9a000>;
101 #size-cells = <0>;
[all …]
H A Dimx6sll.dtsi44 #size-cells = <0>;
46 cpu0: cpu@0 {
49 reg = <0>;
85 reg = <0x00a01000 0x1000>,
86 <0x00a00100 0x100>;
92 #size-cells = <0>;
94 ckil: clock@0 {
96 reg = <0>;
97 #clock-cells = <0>;
105 #clock-cells = <0>;
[all …]
H A Dimx6ul.dtsi54 #size-cells = <0>;
56 cpu0: cpu@0 {
59 reg = <0>;
97 reg = <0x00a01000 0x1000>,
98 <0x00a02000 0x1000>,
99 <0x00a04000 0x2000>,
100 <0x00a06000 0x2000>;
105 #clock-cells = <0>;
112 #clock-cells = <0>;
119 #clock-cells = <0>;
[all …]
H A Dimx6sl.dtsi24 memory { device_type = "memory"; reg = <0 0>; };
48 #size-cells = <0>;
50 cpu@0 {
53 reg = <0x0>;
83 reg = <0x00a01000 0x1000>,
84 <0x00a00100 0x100>;
90 #size-cells = <0>;
94 #clock-cells = <0>;
100 #clock-cells = <0>;
114 reg = <0x00900000 0x20000>;
[all …]
H A Dimx6ull.dtsi51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0>;
88 reg = <0x00a01000 0x1000>,
89 <0x00a02000 0x100>;
94 #size-cells = <0>;
96 ckil: clock@0 {
98 reg = <0>;
99 #clock-cells = <0>;
107 #clock-cells = <0>;
[all …]
H A Dimx6qdl.dtsi53 #size-cells = <0>;
57 #clock-cells = <0>;
63 #clock-cells = <0>;
64 clock-frequency = <0>;
69 #clock-cells = <0>;
83 reg = <0x00110000 0x2000>;
84 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
85 <0 13 IRQ_TYPE_LEVEL_HIGH>,
86 <0 13 IRQ_TYPE_LEVEL_HIGH>,
87 <0 13 IRQ_TYPE_LEVEL_HIGH>;
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/
H A Ddhd_macdbg.c55 {0x20000, 256}, in dhd_macdbg_attach()
56 {0x21e10, 16}, in dhd_macdbg_attach()
57 {0x20300, 16}, in dhd_macdbg_attach()
58 {0x20700, 16}, in dhd_macdbg_attach()
59 {0x20b00, 16}, in dhd_macdbg_attach()
60 {0x20be0, 16}, in dhd_macdbg_attach()
61 {0x20bff, 16}, in dhd_macdbg_attach()
62 {0xc000, 32}, in dhd_macdbg_attach()
63 {0xe000, 32}, in dhd_macdbg_attach()
64 {0x10000, 0x8000}, in dhd_macdbg_attach()
[all …]

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