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/OK3568_Linux_fs/u-boot/arch/arm/mach-davinci/include/mach/
H A Dhardware.h36 #define DAVINCI_DMA_3PCC_BASE (0x01c00000)
37 #define DAVINCI_DMA_3PTC0_BASE (0x01c10000)
38 #define DAVINCI_DMA_3PTC1_BASE (0x01c10400)
39 #define DAVINCI_UART0_BASE (0x01c20000)
40 #define DAVINCI_UART1_BASE (0x01c20400)
41 #define DAVINCI_TIMER3_BASE (0x01c20800)
42 #define DAVINCI_I2C_BASE (0x01c21000)
43 #define DAVINCI_TIMER0_BASE (0x01c21400)
44 #define DAVINCI_TIMER1_BASE (0x01c21800)
45 #define DAVINCI_WDOG_BASE (0x01c21c00)
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/gpu/
H A Darm,mali-utgard.yaml73 - pp0 # Pixel Processor X interrupt (X from 0 to 7)
74 - ppmmu0 # Pixel Processor X MMU interrupt (X from 0 to 7)
158 reg = <0x01c40000 0x10000>;
/OK3568_Linux_fs/kernel/arch/arm/mach-davinci/
H A Ddavinci.h38 #define DAVINCI_PLL1_BASE 0x01c40800
39 #define DAVINCI_PLL2_BASE 0x01c40c00
40 #define DAVINCI_PWR_SLEEP_CNTRL_BASE 0x01c41000
42 #define DAVINCI_SYSTEM_MODULE_BASE 0x01c40000
43 #define SYSMOD_VDAC_CONFIG 0x2c
44 #define SYSMOD_VIDCLKCTL 0x38
45 #define SYSMOD_VPSS_CLKCTL 0x44
46 #define SYSMOD_VDD3P3VPWDN 0x48
47 #define SYSMOD_VSCLKDIS 0x6c
48 #define SYSMOD_PUPDCTL1 0x7c
[all …]
H A Ddevices-da8xx.c30 #define DA8XX_TPCC_BASE 0x01c00000
31 #define DA8XX_TPTC0_BASE 0x01c08000
32 #define DA8XX_TPTC1_BASE 0x01c08400
33 #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */
34 #define DA8XX_I2C0_BASE 0x01c22000
35 #define DA8XX_RTC_BASE 0x01c23000
36 #define DA8XX_PRUSS_MEM_BASE 0x01c30000
37 #define DA8XX_MMCSD0_BASE 0x01c40000
38 #define DA8XX_SPI0_BASE 0x01c41000
39 #define DA830_SPI1_BASE 0x01e12000
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dcpu_sun4i.h12 #define SUNXI_SRAM_A1_BASE 0x00000000
15 #define SUNXI_SRAM_A2_BASE 0x00004000 /* 16 kiB */
16 #define SUNXI_SRAM_A3_BASE 0x00008000 /* 13 kiB */
17 #define SUNXI_SRAM_A4_BASE 0x0000b400 /* 3 kiB */
18 #define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */
19 #define SUNXI_SRAM_B_BASE 0x00020000 /* 64 kiB (secure) */
21 #define SUNXI_DE2_BASE 0x01000000
24 #define SUNXI_CPUCFG_BASE 0x01700000
27 #define SUNXI_SRAMC_BASE 0x01c00000
28 #define SUNXI_DRAMC_BASE 0x01c01000
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dsun8i-h3.dtsi72 #size-cells = <0>;
74 cpu0: cpu@0 {
77 reg = <0>;
155 reg = <0x01400000 0x20000>;
168 reg = <0x01c00000 0x1000>;
175 reg = <0x01d00000 0x80000>;
178 ranges = <0 0x01d00000 0x80000>;
180 ve_sram: sram-section@0 {
183 reg = <0x000000 0x80000>;
190 reg = <0x01c0e000 0x1000>;
[all …]
H A Dsun8i-a23-a33.dtsi90 #size-cells = <0>;
92 cpu0: cpu@0 {
95 reg = <0>;
111 #clock-cells = <0>;
119 #clock-cells = <0>;
135 reg = <0x01c00000 0x30>;
142 reg = <0x01d00000 0x80000>;
145 ranges = <0 0x01d00000 0x80000>;
147 ve_sram: sram-section@0 {
150 reg = <0x000000 0x80000>;
[all …]
H A Dsun8i-r40.dtsi63 #clock-cells = <0>;
71 #clock-cells = <0>;
81 #size-cells = <0>;
83 cpu0: cpu@0 {
86 reg = <0>;
117 polling-delay-passive = <0>;
118 polling-delay = <0>;
119 thermal-sensors = <&ths 0>;
124 polling-delay-passive = <0>;
125 polling-delay = <0>;
[all …]
H A Dsun4i-a10.dtsi111 #size-cells = <0>;
112 cpu0: cpu@0 {
115 reg = <0x0>;
167 #clock-cells = <0>;
174 #clock-cells = <0>;
200 size = <0x6000000>;
201 alloc-ranges = <0x40000000 0x10000000>;
215 reg = <0x01c00000 0x30>;
220 sram_a: sram@0 {
222 reg = <0x00000000 0xc000>;
[all …]
H A Dsun7i-a20.dtsi101 #size-cells = <0>;
103 cpu0: cpu@0 {
106 reg = <0>;
183 size = <0x6000000>;
184 alloc-ranges = <0x40000000 0x10000000>;
210 #clock-cells = <0>;
217 #clock-cells = <0>;
233 #clock-cells = <0>;
240 #clock-cells = <0>;
247 #clock-cells = <0>;
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-davinci/
H A Dlowlevel_init.S29 #define MDSTAT_STATE 0x3f
38 mov r1, $0
58 orr r7, r7, $0x02
65 ands r7, r7, $0x02
72 ands r7, r7, $0x100
78 mov r10, $0
85 mov r10, $0x01
93 mov r10, $0
101 mov r10, $0
121 mov r10, $0x20
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/allwinner/
H A Dsun50i-a64.dtsi46 #size-cells = <0>;
48 cpu0: cpu@0 {
51 reg = <0>;
106 #clock-cells = <0>;
113 #clock-cells = <0>;
174 polling-delay-passive = <0>;
175 polling-delay = <0>;
176 thermal-sensors = <&ths 0>;
221 polling-delay-passive = <0>;
222 polling-delay = <0>;
[all …]