| /OK3568_Linux_fs/u-boot/cmd/ddr_tool/ |
| H A D | ddr_tool_common.c | 20 for (i = 0, j = 0; i < length / sizeof(p[0]); i++) { in write_buf_to_ddr() 33 ulong reread = 0; in cmp_buf_data() 34 ulong wr_val = 0; in cmp_buf_data() 35 ulong val = 0; in cmp_buf_data() 36 ulong err_adr = 0; in cmp_buf_data() 39 err_adr = 0; in cmp_buf_data() 40 for (i = 0, j = 0; i < length / sizeof(p[0]); i++) { in cmp_buf_data() 54 printf("test fail:address:0x%lx,read:0x%lx," in cmp_buf_data() 55 "reread:0x%lx,expect:0x%lx\n", in cmp_buf_data() 66 for (i = 0; i < size / 4; i += 4) { in print_memory() [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/mach-orion5x/ |
| H A D | ts209-setup.c | 29 #define QNAP_TS209_NOR_BOOT_BASE 0xf4000000 38 * [2] 0x00000000-0x00200000 : "Kernel" 39 * [3] 0x00200000-0x00600000 : "RootFS1" 40 * [4] 0x00600000-0x00700000 : "RootFS2" 41 * [6] 0x00700000-0x00760000 : "NAS Config" (read-only) 42 * [5] 0x00760000-0x00780000 : "U-Boot Config" 43 * [1] 0x00780000-0x00800000 : "U-Boot" (read-only) 48 .size = 0x00080000, 49 .offset = 0x00780000, 53 .size = 0x00200000, [all …]
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| H A D | ts409-setup.c | 40 * - RTC S35390A (@0x30) on I2C bus 49 #define QNAP_TS409_NOR_BOOT_BASE 0xff800000 58 * [2] 0x00000000-0x00200000 : "Kernel" 59 * [3] 0x00200000-0x00600000 : "RootFS1" 60 * [4] 0x00600000-0x00700000 : "RootFS2" 61 * [6] 0x00700000-0x00760000 : "NAS Config" (read-only) 62 * [5] 0x00760000-0x00780000 : "U-Boot Config" 63 * [1] 0x00780000-0x00800000 : "U-Boot" (read-only) 68 .size = 0x00080000, 69 .offset = 0x00780000, [all …]
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| H A D | rd88f6183ap-ge-setup.c | 35 .port_names[0] = "lan1", 46 .offset = 0x00000000, 47 .size = 0x00200000, 50 .offset = 0x00200000, 51 .size = 0x00500000, 54 .offset = 0x00700000, 55 .size = 0x00080000, 70 .bus_num = 0, 71 .chip_select = 0, 108 return 0; in rd88f6183ap_ge_pci_init() [all …]
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| /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/ |
| H A D | p1024rdb.dtsi | 36 nor@0,0 { 40 reg = <0x0 0x0 0x1000000>; 44 partition@0 { 47 reg = <0x0 0x00040000>; 54 reg = <0x00040000 0x00040000>; 60 reg = <0x00080000 0x00380000>; 66 reg = <0x00400000 0x00b00000>; 74 reg = <0x00f00000 0x00100000>; 80 nand@1,0 { 85 reg = <0x1 0x0 0x40000>; [all …]
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| H A D | p2020rdb-pc.dtsi | 36 nor@0,0 { 40 reg = <0x0 0x0 0x1000000>; 44 partition@0 { 47 reg = <0x0 0x00040000>; 54 reg = <0x00040000 0x00040000>; 60 reg = <0x00080000 0x00380000>; 66 reg = <0x00400000 0x00b00000>; 74 reg = <0x00f00000 0x00100000>; 80 nand@1,0 { 85 reg = <0x1 0x0 0x40000>; [all …]
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| H A D | p1020rdb-pc.dtsi | 36 nor@0,0 { 40 reg = <0x0 0x0 0x1000000>; 44 partition@0 { 47 reg = <0x0 0x00040000>; 54 reg = <0x00040000 0x00040000>; 60 reg = <0x00080000 0x00380000>; 66 reg = <0x00400000 0x00b00000>; 74 reg = <0x00f00000 0x00100000>; 80 nand@1,0 { 85 reg = <0x1 0x0 0x40000>; [all …]
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| H A D | p1020rdb.dtsi | 36 nor@0,0 { 40 reg = <0x0 0x0 0x1000000>; 44 partition@0 { 47 reg = <0x0 0x00040000>; 54 reg = <0x00040000 0x00040000>; 61 reg = <0x00080000 0x00380000>; 68 reg = <0x00400000 0x00b00000>; 76 reg = <0x00f00000 0x00100000>; 82 nand@1,0 { 87 reg = <0x1 0x0 0x40000>; [all …]
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| H A D | p2020rdb.dts | 29 reg = <0 0xffe05000 0 0x1000>; 32 ranges = <0x0 0x0 0x0 0xef000000 0x01000000 33 0x1 0x0 0x0 0xffa00000 0x00040000 34 0x2 0x0 0x0 0xffb00000 0x00020000>; 36 nor@0,0 { 40 reg = <0x0 0x0 0x1000000>; 44 partition@0 { 47 reg = <0x0 0x00040000>; 54 reg = <0x00040000 0x00040000>; 61 reg = <0x00080000 0x00380000>; [all …]
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| H A D | p1021rdb-pc.dtsi | 36 nor@0,0 { 40 reg = <0x0 0x0 0x1000000>; 44 partition@0 { 47 reg = <0x0 0x00040000>; 54 reg = <0x00040000 0x00040000>; 60 reg = <0x00080000 0x00380000>; 66 reg = <0x00400000 0x00ac0000>; 73 reg = <0x00ec0000 0x00040000>; 82 reg = <0x00f00000 0x00100000>; 87 nand@1,0 { [all …]
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| H A D | p1010rdb-pa.dtsi | 36 partition@0 { 39 reg = <0x0 0x00100000>; 46 reg = <0x00100000 0x00100000>; 52 reg = <0x00200000 0x00400000>; 58 reg = <0x00600000 0x00400000>; 64 reg = <0x00a00000 0x00f00000>; 70 reg = <0x01900000 0x00700000>; 76 interrupts = <1 1 0 0>; 80 interrupts = <2 1 0 0>; 84 interrupts = <4 1 0 0>;
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| H A D | p1025rdb.dtsi | 36 nor@0,0 { 40 reg = <0x0 0x0 0x1000000>; 44 partition@0 { 47 reg = <0x0 0x00040000>; 54 reg = <0x00040000 0x00040000>; 60 reg = <0x00080000 0x00380000>; 66 reg = <0x00400000 0x00b00000>; 74 reg = <0x00f00000 0x00100000>; 80 nand@1,0 { 85 reg = <0x1 0x0 0x40000>; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/mach-s3c/ |
| H A D | osiris.h | 16 #define OSIRIS_CTRL0_NANDSEL (0x3) 23 #define OSIRIS_CTRL1_FIX8 (1<<0) 25 #define OSIRIS_ID_REVMASK (0x7) 29 #define OSIRIS_IOADDR(x) (S3C2410_ADDR((x) + 0x04000000)) 35 #define OSIRIS_VA_CTRL0 OSIRIS_IOADDR(0x00000000) 38 #define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00100000) 41 #define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00200000) 44 #define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00300000) 47 #define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000)
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| H A D | vr1000.h | 14 #define VR1000_CPLD_CTRL2_RAMWEN (0x04) /* SRAM Write Enable */ 28 #define VR1000_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000)) 32 #define VR1000_VA_CTRL1 VR1000_IOADDR(0x00000000) /* 0x01300000 */ 33 #define VR1000_PA_CTRL1 (S3C2410_CS5 | 0x7800000) 35 #define VR1000_VA_CTRL2 VR1000_IOADDR(0x00100000) /* 0x01400000 */ 36 #define VR1000_PA_CTRL2 (S3C2410_CS1 | 0x6000000) 38 #define VR1000_VA_CTRL3 VR1000_IOADDR(0x00200000) /* 0x01500000 */ 39 #define VR1000_PA_CTRL3 (S3C2410_CS1 | 0x6800000) 41 #define VR1000_VA_CTRL4 VR1000_IOADDR(0x00300000) /* 0x01600000 */ 42 #define VR1000_PA_CTRL4 (S3C2410_CS1 | 0x7000000) [all …]
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| /OK3568_Linux_fs/kernel/drivers/misc/habanalabs/include/goya/ |
| H A D | goya_packets.h | 14 #define PACKET_HEADER_PACKET_ID_MASK 0x1F00000000000000ull 17 PACKET_WREG_32 = 0x1, 18 PACKET_WREG_BULK = 0x2, 19 PACKET_MSG_LONG = 0x3, 20 PACKET_MSG_SHORT = 0x4, 21 PACKET_CP_DMA = 0x5, 22 PACKET_MSG_PROT = 0x7, 23 PACKET_FENCE = 0x8, 24 PACKET_LIN_DMA = 0x9, 25 PACKET_NOP = 0xA, [all …]
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| /OK3568_Linux_fs/u-boot/drivers/net/ |
| H A D | ns8382x.c | 61 #define DSIZE 0x00000FFF 70 ChipCmd = 0x00, 71 ChipConfig = 0x04, 72 EECtrl = 0x08, 73 IntrMask = 0x14, 74 IntrEnable = 0x18, 75 TxRingPtr = 0x20, 76 TxRingPtrHi = 0x24, 77 TxConfig = 0x28, 78 RxRingPtr = 0x30, [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/mcde/ |
| H A D | mcde_display_regs.h | 6 #define MCDE_IMSCPP 0x00000104 7 #define MCDE_RISPP 0x00000114 8 #define MCDE_MISPP 0x00000124 9 #define MCDE_SISPP 0x00000134 11 #define MCDE_PP_VCMPA BIT(0) 21 #define MCDE_IMSCOVL 0x00000108 22 #define MCDE_RISOVL 0x00000118 23 #define MCDE_MISOVL 0x00000128 24 #define MCDE_SISOVL 0x00000138 27 #define MCDE_IMSCCHNL 0x0000010C [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/nvmem/ |
| H A D | nvmem.yaml | 24 pattern: "^(eeprom|efuse|nvram)(@.*|-[0-9a-f])*$" 42 when it's driven low (logical '0') to allow writing. 46 "^.*@[0-9a-f]+$": 59 - minimum: 0 79 reg = <0x00700000 0x100000>; 87 reg = <0x404 0x10>; 91 reg = <0x504 0x11>; 96 reg = <0x6 0x2>; 101 reg = <0xc 0x1>;
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-ls102xa/ |
| H A D | config.h | 10 #define OCRAM_BASE_ADDR 0x10000000 11 #define OCRAM_SIZE 0x00010000 12 #define OCRAM_BASE_S_ADDR 0x10010000 13 #define OCRAM_S_SIZE 0x00010000 15 #define CONFIG_SYS_IMMR 0x01000000 16 #define CONFIG_SYS_DCSRBAR 0x20000000 18 #define CONFIG_SYS_DCSR_DCFG_ADDR (CONFIG_SYS_DCSRBAR + 0x00220000) 19 #define SYS_FSL_DCSR_RCPM_ADDR (CONFIG_SYS_DCSRBAR + 0x00222000) 21 #define SYS_FSL_GIC_ADDR (CONFIG_SYS_IMMR + 0x00400000) 22 #define CONFIG_SYS_FSL_DDR_ADDR (CONFIG_SYS_IMMR + 0x00080000) [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | bcm953012hr.dts | 50 reg = <0x80000000 0x10000000>; 55 partition@0 { 57 reg = <0x00000000 0x00200000>; 62 reg = <0x00200000 0x00400000>; 66 reg = <0x00600000 0x00a00000>; 70 reg = <0x01000000 0x07000000>; 82 partition@0 { 84 reg = <0x00000000 0x000d0000>; 88 reg = <0x000d0000 0x00030000>; 92 reg = <0x00100000 0x00600000>; [all …]
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| H A D | bcm953012k.dts | 48 reg = <0x80000000 0x10000000>; 53 nandcs@0 { 55 reg = <0>; 64 partition@0 { 66 reg = <0x00000000 0x00200000>; 71 reg = <0x00200000 0x00400000>; 75 reg = <0x00600000 0x00a00000>; 79 reg = <0x01000000 0x07000000>; 92 partition@0 { 94 reg = <0x00000000 0x000d0000>; [all …]
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| /OK3568_Linux_fs/u-boot/include/configs/ |
| H A D | pm9g45.h | 33 #define CONFIG_SYS_TEXT_BASE 0x73f00000 56 #define CONFIG_GREEN_LED GPIO_PIN_PD(0) /* this is the user2 led */ 70 #define CONFIG_JFFS2_PART_OFFSET 0 /* start of jffs2 partition */ 75 #define PHYS_SDRAM 0x70000000 76 #define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */ 81 #define CONFIG_SYS_NAND_BASE 0x40000000 103 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* _UHP_OHCI_BASE */ 108 #define CONFIG_AT91SAM9G45_LCD_BASE PHYS_SDRAM + 0xE00000 110 #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM + 0x2000000 /* load addr */ 116 #define CONFIG_ENV_OFFSET 0x60000 [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/ |
| H A D | atmel,lcdc.txt | 32 reg = <0x00500000 0x1000>; 33 interrupts = <23 3 0>; 35 pinctrl-0 = <&pinctrl_fb>; 46 reg = <0x00700000 0x1000 0x70000000 0x200000>; 69 atmel,dmacon = <0x1>; 70 atmel,lcdcon2 = <0x80008002>;
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| /OK3568_Linux_fs/kernel/drivers/video/fbdev/geode/ |
| H A D | display_gx1.h | 21 #define CONFIG_CCR3 0xc3 22 # define CONFIG_CCR3_MAPEN 0x10 23 #define CONFIG_GCR 0xb8 27 #define MC_BANK_CFG 0x08 28 # define MC_BCFG_DIMM0_SZ_MASK 0x00000700 29 # define MC_BCFG_DIMM0_PG_SZ_MASK 0x00000070 30 # define MC_BCFG_DIMM0_PG_SZ_NO_DIMM 0x00000070 32 #define MC_GBASE_ADD 0x14 33 # define MC_GADD_GBADD_MASK 0x000003ff 37 #define DC_PAL_ADDRESS 0x70 [all …]
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| /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/ |
| H A D | uc101.dts | 75 phy0: ethernet-phy@0 { 77 reg = <0>; 91 reg = <0x2c>; 95 reg = <0x51>; 105 ranges = <0 0 0xff800000 0x00800000 106 1 0 0x80000000 0x00800000 107 3 0 0x80000000 0x00800000>; 109 flash@0,0 { 111 reg = <0 0 0x00800000>; 117 partition@0 { [all …]
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