Home
last modified time | relevance | path

Searched +full:0 +full:x001fffff (Results 1 – 25 of 51) sorted by relevance

123

/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dtegra124-nyan-blaze-emc.dtsi78 nvidia,emc-auto-cal-config = <0xa1430000>;
79 nvidia,emc-auto-cal-config2 = <0x00000000>;
80 nvidia,emc-auto-cal-config3 = <0x00000000>;
81 nvidia,emc-auto-cal-interval = <0x001fffff>;
82 nvidia,emc-bgbias-ctl0 = <0x00000008>;
83 nvidia,emc-cfg = <0x73240000>;
84 nvidia,emc-cfg-2 = <0x000008c5>;
85 nvidia,emc-ctt-term-ctrl = <0x00000802>;
86 nvidia,emc-mode-1 = <0x80100003>;
87 nvidia,emc-mode-2 = <0x80200008>;
[all …]
H A Dtegra124-apalis-emc.dtsi94 nvidia,emc-auto-cal-config = <0xa1430000>;
95 nvidia,emc-auto-cal-config2 = <0x00000000>;
96 nvidia,emc-auto-cal-config3 = <0x00000000>;
97 nvidia,emc-auto-cal-interval = <0x001fffff>;
98 nvidia,emc-bgbias-ctl0 = <0x00000008>;
99 nvidia,emc-cfg = <0x73240000>;
100 nvidia,emc-cfg-2 = <0x000008c5>;
101 nvidia,emc-ctt-term-ctrl = <0x00000802>;
102 nvidia,emc-mode-1 = <0x80100003>;
103 nvidia,emc-mode-2 = <0x80200008>;
[all …]
H A Dtegra124-jetson-tk1-emc.dtsi89 nvidia,emc-auto-cal-config = <0xa1430000>;
90 nvidia,emc-auto-cal-config2 = <0x00000000>;
91 nvidia,emc-auto-cal-config3 = <0x00000000>;
92 nvidia,emc-auto-cal-interval = <0x001fffff>;
93 nvidia,emc-bgbias-ctl0 = <0x00000008>;
94 nvidia,emc-cfg = <0x73240000>;
95 nvidia,emc-cfg-2 = <0x000008c5>;
96 nvidia,emc-ctt-term-ctrl = <0x00000802>;
97 nvidia,emc-mode-1 = <0x80100003>;
98 nvidia,emc-mode-2 = <0x80200008>;
[all …]
H A Dtegra30-asus-nexus7-grouper-memory-timings.dtsi5 emc-timings-0 {
6 nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */
12 0x00020001 /* MC_EMEM_ARB_CFG */
13 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */
14 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
15 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
16 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
17 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
18 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
19 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
[all …]
H A Dtegra30-asus-nexus7-tilapia-memory-timings.dtsi13 emc-timings-0 {
17 nvidia,emc-auto-cal-interval = <0x001fffff>;
18 nvidia,emc-mode-1 = <0x80100002>;
19 nvidia,emc-mode-2 = <0x80200018>;
20 nvidia,emc-mode-reset = <0x80000b71>;
21 nvidia,emc-zcal-cnt-long = <0x00000040>;
25 0x0000001f /* EMC_RC */
26 0x00000069 /* EMC_RFC */
27 0x00000017 /* EMC_RAS */
28 0x00000007 /* EMC_RP */
[all …]
H A Dtegra124-nyan-big-emc.dtsi229 nvidia,emc-auto-cal-config = <0xa1430000>;
230 nvidia,emc-auto-cal-config2 = <0x00000000>;
231 nvidia,emc-auto-cal-config3 = <0x00000000>;
232 nvidia,emc-auto-cal-interval = <0x001fffff>;
233 nvidia,emc-bgbias-ctl0 = <0x00000008>;
234 nvidia,emc-cfg = <0x73240000>;
235 nvidia,emc-cfg-2 = <0x000008c5>;
236 nvidia,emc-ctt-term-ctrl = <0x00000802>;
237 nvidia,emc-mode-1 = <0x80100003>;
238 nvidia,emc-mode-2 = <0x80200008>;
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/watchdog/
H A Dsnps,dw-wdt.yaml52 default: [0x0001000 0x0002000 0x0004000 0x0008000
53 0x0010000 0x0020000 0x0040000 0x0080000
54 0x0100000 0x0200000 0x0400000 0x0800000
55 0x1000000 0x2000000 0x4000000 0x8000000]
70 reg = <0xffd02000 0x1000>;
71 interrupts = <0 171 4>;
79 reg = <0xffd02000 0x1000>;
80 interrupts = <0 171 4>;
83 snps,watchdog-tops = <0x000000FF 0x000001FF 0x000003FF
84 0x000007FF 0x0000FFFF 0x0001FFFF
[all …]
/OK3568_Linux_fs/u-boot/board/esd/vme8349/
H A Dcaddy.c29 memset((void *)answer, 0, sizeof(struct caddy_answer)); in generate_answer()
33 memcpy(answer->par, result, 5 * sizeof(result[0])); in generate_answer()
60 memset((void *)caddy_interface, 0, sizeof(struct caddy_interface)); in do_caddy()
61 memcpy((void *)&caddy_interface->magic[0], &CADDY_MAGIC, 16); in do_caddy()
63 while (ctrlc() == 0) { in do_caddy()
65 memset(result, 0, 5 * sizeof(result[0])); in do_caddy()
66 status = 0; in do_caddy()
69 (caddy_cmd->addr & 0x001fffff); in do_caddy()
73 result[0] = in_8(pci_ptr); in do_caddy()
77 result[0] = in_be16(pci_ptr); in do_caddy()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Dmxgpu_vi.c47 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
48 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
49 mmCB_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100,
50 mmCGTT_BCI_CLK_CTRL, 0xffffffff, 0x00000100,
51 mmCGTT_CP_CLK_CTRL, 0xffffffff, 0x00000100,
52 mmCGTT_CPC_CLK_CTRL, 0xffffffff, 0x00000100,
53 mmCGTT_CPF_CLK_CTRL, 0xffffffff, 0x40000100,
54 mmCGTT_DRM_CLK_CTRL0, 0xffffffff, 0x00600100,
55 mmCGTT_GDS_CLK_CTRL, 0xffffffff, 0x00000100,
56 mmCGTT_IA_CLK_CTRL, 0xffffffff, 0x06000100,
[all …]
/OK3568_Linux_fs/kernel/drivers/irqchip/
H A Dirq-st.c18 #define STIH415_SYSCFG_642 0x0a8
19 #define STIH416_SYSCFG_7543 0x87c
20 #define STIH407_SYSCFG_5102 0x198
21 #define STID127_SYSCFG_734 0x088
23 #define ST_A9_IRQ_MASK 0x001FFFFF
26 #define ST_A9_IRQ_EN_CTI_0 BIT(0)
98 return 0; in st_irq_xlate()
109 return 0; in st_irq_xlate()
131 for (i = 0; i < ST_A9_IRQ_MAX_CHANS; i++) { in st_irq_syscfg_enable()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dvolt.c32 u32 volt = 0; in nvbios_volt_table()
36 volt = nvbios_rd32(bios, bit_P.offset + 0x0c); in nvbios_volt_table()
39 volt = nvbios_rd32(bios, bit_P.offset + 0x10); in nvbios_volt_table()
42 *ver = nvbios_rd08(bios, volt + 0); in nvbios_volt_table()
44 case 0x12: in nvbios_volt_table()
49 case 0x20: in nvbios_volt_table()
54 case 0x30: in nvbios_volt_table()
55 case 0x40: in nvbios_volt_table()
56 case 0x50: in nvbios_volt_table()
65 return 0; in nvbios_volt_table()
[all …]
/OK3568_Linux_fs/kernel/fs/xfs/libxfs/
H A Dxfs_types.h62 #define MAXEXTLEN ((xfs_extlen_t)0x001fffff) /* 21 bits */
63 #define MAXEXTNUM ((xfs_extnum_t)0x7fffffff) /* signed int */
64 #define MAXAEXTNUM ((xfs_aextnum_t)0x7fff) /* signed short */
86 #define XFS_DATA_FORK 0
173 XFS_AG_RESV_NONE = 0,
/OK3568_Linux_fs/app/forlinx/flapp/src/plugins/allwinner/camera/CameraUI/
H A Dunicodeandutf8.cpp6 if(c< 0x80) return 0; in enc_get_utf8_size()
7 if(c>=0x80 && c<0xC0) return -1; in enc_get_utf8_size()
8 if(c>=0xC0 && c<0xE0) return 2; in enc_get_utf8_size()
9 if(c>=0xE0 && c<0xF0) return 3; in enc_get_utf8_size()
10 if(c>=0xF0 && c<0xF8) return 4; in enc_get_utf8_size()
11 if(c>=0xF8 && c<0xFC) return 5; in enc_get_utf8_size()
12 if(c>=0xFC) return 6; in enc_get_utf8_size()
18 *Unic = 0x0; in enc_utf8_to_unicode_one()
23 case 0: in enc_utf8_to_unicode_one()
30 if ( (b2 & 0xE0) != 0x80 ) in enc_utf8_to_unicode_one()
[all …]
/OK3568_Linux_fs/u-boot/arch/m68k/include/asm/coldfire/
H A Dflexcan.h16 u8 tmstamp; /* 0x00 Timestamp */
17 u8 ctrl; /* 0x01 Control */
18 u16 idh; /* 0x02 ID High */
19 u16 idl; /* 0x04 ID High */
20 u8 data[8]; /* 0x06 8 Byte Data Field */
21 u16 res; /* 0x0E */
23 u16 ctrl; /* 0x00 Control/Status */
24 u16 tmstamp; /* 0x02 Timestamp */
25 u32 id; /* 0x04 Identifier */
26 u8 data[8]; /* 0x08 8 Byte Data Field */
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra30-emc.yaml40 "^emc-timings-[0-9]+$":
49 "^timing-[0-9]+$":
62 minimum: 0
78 Mode Register 0.
85 minimum: 0
224 reg = <0x7000f400 0x400>;
225 interrupts = <0 78 4>;
236 nvidia,emc-auto-cal-interval = <0x001fffff>;
237 nvidia,emc-mode-1 = <0x80100002>;
238 nvidia,emc-mode-2 = <0x80200018>;
[all …]
H A Dnvidia,tegra124-emc.yaml38 "^emc-timings-[0-9]+$":
48 "^timing-[0-9]+$":
79 minimum: 0
142 minimum: 0
340 reg = <0x70019000 0x1000>;
352 reg = <0x7001b000 0x1000>;
358 emc-timings-0 {
361 timing-0 {
364 nvidia,emc-auto-cal-config = <0xa1430000>;
365 nvidia,emc-auto-cal-config2 = <0x00000000>;
[all …]
/OK3568_Linux_fs/u-boot/doc/
H A DREADME.at9114 0x20000000 - 23FFFFFF SDRAM (64 MB)
15 0xC0000000 - Cxxxxxxx Atmel Dataflash card (J13)
16 0xD0000000 - D07FFFFF Soldered Atmel Dataflash (AT45DB642)
22 - Dataflash on SPI chip select 0 (dataflash card)
36 0x20000000 - 23FFFFFF SDRAM (64 MB)
37 0xC0000000 - C07FFFFF Soldered Atmel Dataflash (AT45DB642)
38 0xD0000000 - Dxxxxxxx Atmel Dataflash card (J22)
43 - Dataflash on SPI chip select 0 (default)
58 0x20000000 - 23FFFFFF SDRAM (64 MB)
59 0xC0000000 - Cxxxxxxx Atmel Dataflash card (J9)
[all …]
/OK3568_Linux_fs/kernel/fs/unicode/
H A Dutf8-norm.c23 while (i >= 0 && utf8agetab[i] != 0) { in utf8version_is_supported()
28 return 0; in utf8version_is_supported()
45 * 0x00000000 0x0000007F: 0xxxxxxx
46 * 0x00000000 0x000007FF: 110xxxxx 10xxxxxx
47 * 0x00000000 0x0000FFFF: 1110xxxx 10xxxxxx 10xxxxxx
48 * 0x00000000 0x001FFFFF: 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx
49 * 0x00000000 0x03FFFFFF: 111110xx 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx
50 * 0x00000000 0x7FFFFFFF: 1111110x 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx
57 * 0x00000000 0x0000007F: 0xxxxxxx
58 * 0x00000080 0x000007FF: 110xxxxx 10xxxxxx
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/ath/ath6kl/
H A Dtarget.h26 #define AR6004_BOARD_EXT_DATA_SZ 0
28 #define RESET_CONTROL_ADDRESS 0x00004000
29 #define RESET_CONTROL_COLD_RST 0x00000100
30 #define RESET_CONTROL_MBOX_RST 0x00000004
32 #define CPU_CLOCK_STANDARD_S 0
33 #define CPU_CLOCK_STANDARD 0x00000003
34 #define CPU_CLOCK_ADDRESS 0x00000020
36 #define CLOCK_CONTROL_ADDRESS 0x00000028
38 #define CLOCK_CONTROL_LF_CLK32 0x00000004
40 #define SYSTEM_SLEEP_ADDRESS 0x000000c4
[all …]
/OK3568_Linux_fs/external/mpp/mpp/hal/vpu/h264e/
H A Dhal_h264e_vepu1_reg_tbl.h25 #define VEPU_REG_INTERRUPT 0x004
33 #define VEPU_REG_INTERRUPT_BIT BIT(0)
35 #define VEPU_REG_AXI_CTRL 0x008
36 #define VEPU_REG_AXI_CTRL_WRITE_ID(x) (((x) & 0xff) << 24)
37 #define VEPU_REG_AXI_CTRL_READ_ID(x) (((x) & 0xff) << 16)
41 #define VEPU_REG_AXI_CTRL_BURST_LEN(x) (((x) & 0x3f) << 8)
50 #define VEPU_REG_INPUT_SWAP8 BIT(0)
53 #define VEPU_REG_ADDR_OUTPUT_STREAM 0x014
54 #define VEPU_REG_ADDR_OUTPUT_CTRL 0x018
55 #define VEPU_REG_ADDR_REF_LUMA 0x01c
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/savage/
H A Dsavage_drv.h101 S3_UNKNOWN = 0,
227 #define SAVAGE_FB_SIZE_S3 0x01000000 /* 16MB */
228 #define SAVAGE_FB_SIZE_S4 0x02000000 /* 32MB */
229 #define SAVAGE_MMIO_SIZE 0x00080000 /* 512kB */
230 #define SAVAGE_APERTURE_OFFSET 0x02000000 /* 32MB */
231 #define SAVAGE_APERTURE_SIZE 0x05000000 /* 5 tiled surfaces, 16MB each */
233 #define SAVAGE_BCI_OFFSET 0x00010000 /* offset of the BCI region
241 #define SAVAGE_STATUS_WORD0 0x48C00
242 #define SAVAGE_STATUS_WORD1 0x48C04
243 #define SAVAGE_ALT_STATUS_WORD0 0x48C60
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/
H A Dradeon_irq_kms.c130 for (i = 0; i < RADEON_NUM_RINGS; i++) in radeon_driver_irq_preinstall_kms()
131 atomic_set(&rdev->irq.ring_int[i], 0); in radeon_driver_irq_preinstall_kms()
133 for (i = 0; i < RADEON_MAX_HPD_PINS; i++) in radeon_driver_irq_preinstall_kms()
135 for (i = 0; i < RADEON_MAX_CRTCS; i++) { in radeon_driver_irq_preinstall_kms()
137 atomic_set(&rdev->irq.pflip[i], 0); in radeon_driver_irq_preinstall_kms()
152 * Returns 0 on success.
159 dev->max_vblank_count = 0x00ffffff; in radeon_driver_irq_postinstall_kms()
161 dev->max_vblank_count = 0x001fffff; in radeon_driver_irq_postinstall_kms()
163 return 0; in radeon_driver_irq_postinstall_kms()
184 for (i = 0; i < RADEON_NUM_RINGS; i++) in radeon_driver_irq_uninstall_kms()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/phy/rf/halrf_8852b/
H A Dhalrf_txgapk_8852b.c37 for (i = 0; i < reg_num; i++) { in _txgapk_backup_bb_registers_8852b()
40 RF_DBG(rf, DBG_RF_TXGAPK, "[TXGAPK] Backup BB 0x%x = 0x%x\n", in _txgapk_backup_bb_registers_8852b()
55 for (i = 0; i < reg_num; i++) { in _txgapk_reload_bb_registers_8852b()
58 RF_DBG(rf, DBG_RF_TXGAPK, "[TXGAPK] Reload BB 0x%x = 0x%x\n", in _txgapk_reload_bb_registers_8852b()
71 for (i = 0; i < TXGAPK_RF_REG_NUM_8852B; i++) { in _halrf_txgapk_bkup_rf_8852b()
74 RF_DBG(rf, DBG_RF_TXGAPK, "[TXGAPK] Backup RF S%d 0x%x = %x\n", in _halrf_txgapk_bkup_rf_8852b()
87 for (i = 0; i < TXGAPK_RF_REG_NUM_8852B; i++) { in _halrf_txgapk_reload_rf_8852b()
90 RF_DBG(rf, DBG_RF_TXGAPK, "[TXGAPK] Reload RF S%d 0x%x = %x\n", in _halrf_txgapk_reload_rf_8852b()
103 halrf_wreg(rf, 0x20fc, 0xffff0000, 0x0303); in _halrf_txgapk_bb_afe_by_mode_8852b()
104 halrf_wreg(rf, 0x5864, 0x18000000, 0x3); in _halrf_txgapk_bb_afe_by_mode_8852b()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/phy/rf/halrf_8852b/
H A Dhalrf_txgapk_8852b.c37 for (i = 0; i < reg_num; i++) { in _txgapk_backup_bb_registers_8852b()
40 RF_DBG(rf, DBG_RF_TXGAPK, "[TXGAPK] Backup BB 0x%x = 0x%x\n", in _txgapk_backup_bb_registers_8852b()
55 for (i = 0; i < reg_num; i++) { in _txgapk_reload_bb_registers_8852b()
58 RF_DBG(rf, DBG_RF_TXGAPK, "[TXGAPK] Reload BB 0x%x = 0x%x\n", in _txgapk_reload_bb_registers_8852b()
71 for (i = 0; i < TXGAPK_RF_REG_NUM_8852B; i++) { in _halrf_txgapk_bkup_rf_8852b()
74 RF_DBG(rf, DBG_RF_TXGAPK, "[TXGAPK] Backup RF S%d 0x%x = %x\n", in _halrf_txgapk_bkup_rf_8852b()
87 for (i = 0; i < TXGAPK_RF_REG_NUM_8852B; i++) { in _halrf_txgapk_reload_rf_8852b()
90 RF_DBG(rf, DBG_RF_TXGAPK, "[TXGAPK] Reload RF S%d 0x%x = %x\n", in _halrf_txgapk_reload_rf_8852b()
103 halrf_wreg(rf, 0x20fc, 0xffff0000, 0x0303); in _halrf_txgapk_bb_afe_by_mode_8852b()
104 halrf_wreg(rf, 0x5864, 0x18000000, 0x3); in _halrf_txgapk_bb_afe_by_mode_8852b()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/intel/fm10k/
H A Dfm10k_type.h16 #define FM10K_DEV_ID_PF 0x15A4
17 #define FM10K_DEV_ID_VF 0x15A5
18 #define FM10K_DEV_ID_SDI_FM10420_QDA2 0x15D0
19 #define FM10K_DEV_ID_SDI_FM10420_DA2 0x15D5
25 #define FM10K_48_BIT_MASK 0x0000FFFFFFFFFFFFull
26 #define FM10K_STAT_VALID 0x80000000
29 #define FM10K_PCIE_LINK_CAP 0x7C
30 #define FM10K_PCIE_LINK_STATUS 0x82
31 #define FM10K_PCIE_LINK_WIDTH 0x3F0
32 #define FM10K_PCIE_LINK_WIDTH_1 0x10
[all …]

123