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/OK3568_Linux_fs/kernel/drivers/staging/media/rkisp1/
H A Drkisp1-regs.h12 #define RKISP1_CIF_ISP_CTRL_ISP_ENABLE BIT(0)
13 #define RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT (0 << 1)
32 #define RKISP1_CIF_ISP_ACQ_PROP_POS_EDGE BIT(0)
35 #define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT_RGGB (0 << 3)
40 #define RKISP1_CIF_ISP_ACQ_PROP_YCBYCR (0 << 7)
44 #define RKISP1_CIF_ISP_ACQ_PROP_FIELD_SEL_ALL (0 << 9)
47 #define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_12B (0 << 12)
54 #define RKISP1_CIF_VI_DPCL_DMA_JPEG (0 << 0)
55 #define RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_MI BIT(0)
56 #define RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_JPEG (2 << 0)
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/hdmi/
H A Dhdmi.xml.h50 HDCP_KEYS_STATE_NO_KEYS = 0,
61 DDC_WRITE = 0,
66 ACR_NONE = 0,
72 #define REG_HDMI_CTRL 0x00000000
73 #define HDMI_CTRL_ENABLE 0x00000001
74 #define HDMI_CTRL_HDMI 0x00000002
75 #define HDMI_CTRL_ENCRYPTED 0x00000004
77 #define REG_HDMI_AUDIO_PKT_CTRL1 0x00000020
78 #define HDMI_AUDIO_PKT_CTRL1_AUDIO_SAMPLE_SEND 0x00000001
80 #define REG_HDMI_ACR_PKT_CTRL 0x00000024
[all …]
/OK3568_Linux_fs/kernel/drivers/media/platform/rockchip/isp1/
H A Dregs.h40 (((a) & 0xFF) << 0 | ((b) & 0xFF) << 8 | \
41 ((c) & 0xFF) << 16 | ((d) & 0xFF) << 24)
44 (((a) & 0xFFFF) << 0 | ((b) & 0xFFFF) << 16)
47 #define GRF_VI_CON0 0x430
48 #define ISP_CIF_DATA_WIDTH_MASK 0x60006000
49 #define ISP_CIF_DATA_WIDTH_8B (0 << 13 | 3 << 29)
54 #define CIF_ISP_CTRL_ISP_ENABLE BIT(0)
55 #define CIF_ISP_CTRL_ISP_MODE_RAW_PICT (0 << 1)
74 #define CIF_ISP_ACQ_PROP_POS_EDGE BIT(0)
77 #define CIF_ISP_ACQ_PROP_BAYER_PAT_RGGB (0 << 3)
[all …]
/OK3568_Linux_fs/kernel/drivers/media/platform/rockchip/isp/
H A Dregs.h42 (((a) & 0xFF) << 0 | ((b) & 0xFF) << 8 | \
43 ((c) & 0xFF) << 16 | ((d) & 0xFF) << 24)
46 (((a) & 0xFFFF) << 0 | ((b) & 0xFFFF) << 16)
49 #define GRF_VI_CON0 0x430
50 #define ISP_CIF_DATA_WIDTH_MASK 0x60006000
51 #define ISP_CIF_DATA_WIDTH_8B (0 << 13 | 3 << 29)
56 #define CIF_ISP_CTRL_ISP_ENABLE BIT(0)
57 #define CIF_ISP_CTRL_ISP_MODE_RAW_PICT (0 << 1)
76 #define CIF_ISP_ACQ_PROP_POS_EDGE BIT(0)
79 #define CIF_ISP_ACQ_PROP_BAYER_PAT_RGGB (0 << 3)
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/dsi/
H A Ddsi.xml.h50 NON_BURST_SYNCH_PULSE = 0,
56 VID_DST_FORMAT_RGB565 = 0,
63 SWAP_RGB = 0,
72 TRIGGER_NONE = 0,
81 CMD_DST_FORMAT_RGB111 = 0,
90 LANE_SWAP_0123 = 0,
100 #define DSI_IRQ_CMD_DMA_DONE 0x00000001
101 #define DSI_IRQ_MASK_CMD_DMA_DONE 0x00000002
102 #define DSI_IRQ_CMD_MDP_DONE 0x00000100
103 #define DSI_IRQ_MASK_CMD_MDP_DONE 0x00000200
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dsocfpga_arria10_socdk_sdmmc_handoff.dtsi58 0 /* Field: vco0.psrc */
61 0 /* Field: mpuclk */
62 0 /* Field: mpuclk.cnt */
63 0 /* Field: mpuclk.src */
64 0 /* Field: nocclk */
65 0 /* Field: nocclk.cnt */
66 0 /* Field: nocclk.src */
73 0 /* Field: cntr7clk.src */
76 0 /* Field: cntr9clk.src */
78 0 /* Field: nocdiv.l4mainclk */
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/mach-imx/
H A Dregs-usbphy.h11 #define USBPHY_CTRL 0x00000030
12 #define USBPHY_CTRL_SET 0x00000034
13 #define USBPHY_CTRL_CLR 0x00000038
14 #define USBPHY_CTRL_TOG 0x0000003C
15 #define USBPHY_PWD 0x00000000
16 #define USBPHY_TX 0x00000010
17 #define USBPHY_RX 0x00000020
18 #define USBPHY_DEBUG 0x00000050
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/dp/
H A Ddp_reg.h10 #define REG_DP_HW_VERSION (0x00000000)
12 #define REG_DP_SW_RESET (0x00000010)
13 #define DP_SW_RESET (0x00000001)
15 #define REG_DP_PHY_CTRL (0x00000014)
16 #define DP_PHY_CTRL_SW_RESET_PLL (0x00000001)
17 #define DP_PHY_CTRL_SW_RESET (0x00000004)
19 #define REG_DP_CLK_CTRL (0x00000018)
20 #define REG_DP_CLK_ACTIVE (0x0000001C)
21 #define REG_DP_INTR_STATUS (0x00000020)
22 #define REG_DP_INTR_STATUS2 (0x00000024)
[all …]
/OK3568_Linux_fs/kernel/tools/include/uapi/linux/
H A Dethtool.h21 #define ETHTOOL_GCHANNELS 0x0000003c /* Get no of channels */
/OK3568_Linux_fs/u-boot/board/micronas/vct/vcth/
H A Dreg_scc.h12 #define SCC0_BASE 0x00110000
13 #define SCC1_BASE 0x00110080
14 #define SCC2_BASE 0x00110100
15 #define SCC3_BASE 0x00110180
16 #define SCC4_BASE 0x00110200
17 #define SCC5_BASE 0x00110280
18 #define SCC6_BASE 0x00110300
19 #define SCC7_BASE 0x00110380
20 #define SCC8_BASE 0x00110400
21 #define SCC9_BASE 0x00110480
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-uniphier/dram/
H A Dumc-regs.h14 #define UMC_CPURST 0x00000700
15 #define UMC_IDSRST 0x0000070C
16 #define UMC_IXMRST 0x00000714
17 #define UMC_HDMRST 0x00000718
18 #define UMC_MDMRST 0x0000071C
19 #define UMC_HDDRST 0x00000720
20 #define UMC_MDDRST 0x00000724
21 #define UMC_SIORST 0x00000728
22 #define UMC_GIORST 0x0000072C
23 #define UMC_HD2RST 0x00000734
[all …]
/OK3568_Linux_fs/kernel/drivers/crypto/
H A Dpicoxcell_crypto_regs.h8 #define SPA_STATUS_OK 0
16 #define SPA_FIFO_STAT_STAT_CNT_MASK (0x3F << SPA_FIFO_STAT_STAT_OFFSET)
18 #define SPA_STATUS_RES_CODE_MASK (0x3 << SPA_STATUS_RES_CODE_OFFSET)
22 #define SPA_IRQ_EN_REG_OFFSET 0x00000000
23 #define SPA_IRQ_STAT_REG_OFFSET 0x00000004
24 #define SPA_IRQ_CTRL_REG_OFFSET 0x00000008
25 #define SPA_FIFO_STAT_REG_OFFSET 0x0000000C
26 #define SPA_SDMA_BRST_SZ_REG_OFFSET 0x00000010
27 #define SPA_SRC_PTR_REG_OFFSET 0x00000020
28 #define SPA_DST_PTR_REG_OFFSET 0x00000024
[all …]
/OK3568_Linux_fs/kernel/arch/mips/include/asm/
H A Dinst.h25 #define I_JTARGET_SFT 0
26 #define MIPSInst_JTARGET(x) (MIPSInst(x) & 0x03ffffff)
29 #define MIPSInst_RS(x) ((MIPSInst(x) & 0x03e00000) >> I_RS_SFT)
32 #define MIPSInst_RT(x) ((MIPSInst(x) & 0x001f0000) >> I_RT_SFT)
34 #define I_IMM_SFT 0
35 #define MIPSInst_SIMM(x) ((int)((short)(MIPSInst(x) & 0xffff)))
36 #define MIPSInst_UIMM(x) (MIPSInst(x) & 0xffff)
39 #define MIPSInst_CACHEOP(x) ((MIPSInst(x) & 0x001c0000) >> I_CACHEOP_SFT)
42 #define MIPSInst_CACHESEL(x) ((MIPSInst(x) & 0x00030000) >> I_CACHESEL_SFT)
45 #define MIPSInst_RD(x) ((MIPSInst(x) & 0x0000f800) >> I_RD_SFT)
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dramcfg.c32 return (nvkm_rd32(subdev->device, 0x101000) & 0x0000003c) >> 2; in nvbios_ramcfg_strap()
44 return nvbios_rd08(bios, bit_M.offset + 0); in nvbios_ramcfg_count()
47 return 0x00; in nvbios_ramcfg_count()
55 u32 xlat = 0x00000000; in nvbios_ramcfg_index()
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/thermal/
H A Dqoriq-thermal.yaml16 Register (IPBRR0) at offset 0x0BF8.
20 0x01900102 T1040
78 reg = <0xf0000 0x1000>;
79 interrupts = <18 2 0 0>;
80 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
81 fsl,tmu-calibration = <0x00000000 0x00000025>,
82 <0x00000001 0x00000028>,
83 <0x00000002 0x0000002d>,
84 <0x00000003 0x00000031>,
85 <0x00000004 0x00000036>,
[all …]
/OK3568_Linux_fs/kernel/drivers/crypto/qat/qat_common/
H A Dadf_pf2vf_msg.h14 * bit of this register (bit 0) gets set an interrupt will be triggered
35 * 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
48 * by this driver; these had a Msg Origin of 0 and are ignored by this driver.
55 #define ADF_PFVF_COMPATIBILITY_VERSION 0x1 /* PF<->VF compat */
58 #define ADF_PF2VF_INT BIT(0)
60 #define ADF_PF2VF_MSGTYPE_MASK 0x0000003C
62 #define ADF_PF2VF_MSGTYPE_RESTARTING 0x01
63 #define ADF_PF2VF_MSGTYPE_VERSION_RESP 0x02
64 #define ADF_PF2VF_IN_USE_BY_PF 0x6AC20000
65 #define ADF_PF2VF_IN_USE_BY_PF_MASK 0xFFFE0000
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
H A Dnv05.c38 { 0x24, 0x00 }, in nv05_devinit_meminit()
39 { 0x28, 0x00 }, in nv05_devinit_meminit()
40 { 0x24, 0x01 }, in nv05_devinit_meminit()
41 { 0x1f, 0x00 }, in nv05_devinit_meminit()
42 { 0x0f, 0x00 }, in nv05_devinit_meminit()
43 { 0x17, 0x00 }, in nv05_devinit_meminit()
44 { 0x06, 0x00 }, in nv05_devinit_meminit()
45 { 0x00, 0x00 } in nv05_devinit_meminit()
51 u32 patt = 0xdeadbeef; in nv05_devinit_meminit()
63 strap = (nvkm_rd32(device, 0x101000) & 0x0000003c) >> 2; in nv05_devinit_meminit()
[all …]
/OK3568_Linux_fs/u-boot/board/armltd/integrator/
H A Dpci_v3.h24 #define V3_PCI_VENDOR 0x00000000
25 #define V3_PCI_DEVICE 0x00000002
26 #define V3_PCI_CMD 0x00000004
27 #define V3_PCI_STAT 0x00000006
28 #define V3_PCI_CC_REV 0x00000008
29 #define V3_PCI_HDR_CFG 0x0000000C
30 #define V3_PCI_IO_BASE 0x00000010
31 #define V3_PCI_BASE0 0x00000014
32 #define V3_PCI_BASE1 0x00000018
33 #define V3_PCI_SUB_VENDOR 0x0000002C
[all …]
/OK3568_Linux_fs/kernel/include/linux/
H A Datmel-ssc.h33 #define SSC_CR 0x00000000
37 #define SSC_CR_RXEN_OFFSET 0
46 #define SSC_CMR 0x00000004
48 #define SSC_CMR_DIV_OFFSET 0
51 #define SSC_RCMR 0x00000010
59 #define SSC_RCMR_CKS_OFFSET 0
70 #define SSC_RFMR 0x00000014
72 #define SSC_RFMR_DATLEN_OFFSET 0
93 #define SSC_TCMR 0x00000018
101 #define SSC_TCMR_CKS_OFFSET 0
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/adreno/
H A Da3xx_gpu.c37 for (i = 0; i < submit->nr_cmds; i++) { in a3xx_submit()
68 OUT_RING(ring, 0x00000000); in a3xx_submit()
76 #if 0 in a3xx_submit()
80 OUT_RING(ring, 0x00000000); in a3xx_submit()
88 struct msm_ringbuffer *ring = gpu->rb[0]; in a3xx_me_init()
91 OUT_RING(ring, 0x000003f7); in a3xx_me_init()
92 OUT_RING(ring, 0x00000000); in a3xx_me_init()
93 OUT_RING(ring, 0x00000000); in a3xx_me_init()
94 OUT_RING(ring, 0x00000000); in a3xx_me_init()
95 OUT_RING(ring, 0x00000080); in a3xx_me_init()
[all …]
/OK3568_Linux_fs/kernel/arch/openrisc/include/asm/
H A Dspr_defs.h24 #define MAX_SPRS (0x10000)
27 #define SPRGROUP_SYS (0 << MAX_SPRS_PER_GRP_BITS)
41 #define SPR_VR (SPRGROUP_SYS + 0)
70 #define SPR_DMMUCR (SPRGROUP_DMMU + 0)
72 #define SPR_DTLBMR_BASE(WAY) (SPRGROUP_DMMU + 0x200 + (WAY) * 0x100)
73 #define SPR_DTLBMR_LAST(WAY) (SPRGROUP_DMMU + 0x27f + (WAY) * 0x100)
74 #define SPR_DTLBTR_BASE(WAY) (SPRGROUP_DMMU + 0x280 + (WAY) * 0x100)
75 #define SPR_DTLBTR_LAST(WAY) (SPRGROUP_DMMU + 0x2ff + (WAY) * 0x100)
78 #define SPR_IMMUCR (SPRGROUP_IMMU + 0)
80 #define SPR_ITLBMR_BASE(WAY) (SPRGROUP_IMMU + 0x200 + (WAY) * 0x100)
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dbase.c65 const u8 ramcfg = (nvkm_rd32(device, 0x101000) & 0x0000003c) >> 2; in nvkm_fb_bios_memtype()
100 u32 tags = 0; in nvkm_fb_oneinit()
125 return nvkm_mm_init(&fb->tags, 0, 0, tags, 1); in nvkm_fb_oneinit()
138 return 0; in nvkm_fb_init_scrub_vpr()
153 return 0; in nvkm_fb_init_scrub_vpr()
168 for (i = 0; i < fb->tile.regions; i++) in nvkm_fb_init()
193 return 0; in nvkm_fb_init()
205 for (i = 0; i < fb->tile.regions; i++) in nvkm_fb_dtor()
244 return 0; in nvkm_fb_new_()
/OK3568_Linux_fs/kernel/net/core/
H A Dptp_classifier.c16 * jneq #0x800, test_ipv6 ; ETH_P_IP ?
20 * jset #0x1fff, drop_ipv4 ; don't allow fragments
21 * ldxb 4*([14]&0xf) ; load IP header len
25 * and #0xf ; mask PTP_CLASS_VMASK
26 * or #0x10 ; PTP_CLASS_IPV4
28 * drop_ipv4: ret #0x0 ; PTP_CLASS_NONE
32 * jneq #0x86dd, test_8021q ; ETH_P_IPV6 ?
38 * and #0xf ; mask PTP_CLASS_VMASK
39 * or #0x20 ; PTP_CLASS_IPV6
41 * drop_ipv6: ret #0x0 ; PTP_CLASS_NONE
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/toshiba/
H A Dspider_net.h57 #define SPIDER_NET_GHIINT0STS 0x00000000
58 #define SPIDER_NET_GHIINT1STS 0x00000004
59 #define SPIDER_NET_GHIINT2STS 0x00000008
60 #define SPIDER_NET_GHIINT0MSK 0x00000010
61 #define SPIDER_NET_GHIINT1MSK 0x00000014
62 #define SPIDER_NET_GHIINT2MSK 0x00000018
64 #define SPIDER_NET_GRESUMINTNUM 0x00000020
65 #define SPIDER_NET_GREINTNUM 0x00000024
67 #define SPIDER_NET_GFFRMNUM 0x00000028
68 #define SPIDER_NET_GFAFRMNUM 0x0000002c
[all …]
/OK3568_Linux_fs/kernel/drivers/dma/
H A Dfsl_raid.h47 #define FSL_RE_GFM_POLY 0x1d000000
50 #define FSL_RE_CFG1_CBSI 0x08000000
51 #define FSL_RE_CFG1_CBS0 0x00080000
56 #define FSL_RE_PQ_OPCODE 0x1B
57 #define FSL_RE_XOR_OPCODE 0x1A
58 #define FSL_RE_MOVE_OPCODE 0x8
60 #define FSL_RE_BLOCK_SIZE 0x3 /* 4096 bytes */
61 #define FSL_RE_CACHEABLE_IO 0x0
62 #define FSL_RE_BUFFER_OUTPUT 0x0
63 #define FSL_RE_INTR_ON_ERROR 0x1
[all …]

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