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/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk3399-sdram-ddr3-4G-1600.dtsi9 0x2
10 0xa
11 0x3
12 0x2
13 0x1
14 0x0
15 0xf
16 0xf
17 0
18 0
[all …]
H A Drk3399-sdram-ddr3-1866.dtsi9 0x1
10 0xa
11 0x3
12 0x2
13 0x1
14 0x0
15 0xf
16 0xf
17 0
18 0
[all …]
H A Drk3399-sdram-ddr3-1600.dtsi9 0x1
10 0xa
11 0x3
12 0x2
13 0x1
14 0x0
15 0xf
16 0xf
17 0
18 0
[all …]
H A Drk3399-sdram-lpddr4-100.dtsi6 0x2
7 0xa
8 0x3
9 0x2
10 0x1
11 0x0
12 0xf
13 0xf
14 0
15 0
[all …]
H A Drk3399-sdram-ddr3-1333.dtsi9 0x1
10 0xa
11 0x3
12 0x2
13 0x1
14 0x0
15 0xf
16 0xf
17 0
18 0
[all …]
H A D.rk3399-puma-ddr1600.dtb.dts.tmp
H A D.rk3399-puma-ddr1866.dtb.dts.tmp
H A D.rk3399-puma-ddr1333.dtb.dts.tmp
H A D.rk3399-firefly.dtb.dts.tmp
/OK3568_Linux_fs/u-boot/board/freescale/mx35pdk/
H A Dmx35pdk.h14 #define DBG_CSCR_U_CONFIG 0x0000D843
15 #define DBG_CSCR_L_CONFIG 0x22252521
16 #define DBG_CSCR_A_CONFIG 0x22220A00
18 #define CCM_CCMR_CONFIG 0x003F4208
19 #define CCM_PDR0_CONFIG 0x00801000
22 #define ESDCTL_0x92220000 0x92220000
23 #define ESDCTL_0xA2220000 0xA2220000
24 #define ESDCTL_0xB2220000 0xB2220000
25 #define ESDCTL_0x82228080 0x82228080
27 #define ESDCTL_PRECHARGE 0x00000400
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/mx31pdk/
H A Dlowlevel_init.S15 mcr p15, 0, r0, c15, c2, 4
20 wait_timer 0x40000
32 write32 IOMUXC_SW_PAD_CTL_SDCKE1_SDCLK_SDCLK_B, 0
33 write32 IOMUXC_SW_PAD_CTL_CAS_SDWE_SDCKE0, 0
34 write32 IOMUXC_SW_PAD_CTL_BCLK_RW_RAS, 0
35 write32 IOMUXC_SW_PAD_CTL_CS2_CS3_CS4, 0x1000
36 write32 IOMUXC_SW_PAD_CTL_DQM3_EB0_EB1, 0
37 write32 IOMUXC_SW_PAD_CTL_DQM0_DQM1_DQM2, 0
38 write32 IOMUXC_SW_PAD_CTL_SD29_SD30_SD31, 0
39 write32 IOMUXC_SW_PAD_CTL_SD26_SD27_SD28, 0
[all …]
/OK3568_Linux_fs/kernel/drivers/soc/atmel/
H A Dsoc.h35 #define AT91RM9200_CIDR_MATCH 0x09290780
37 #define AT91SAM9260_CIDR_MATCH 0x019803a0
38 #define AT91SAM9261_CIDR_MATCH 0x019703a0
39 #define AT91SAM9263_CIDR_MATCH 0x019607a0
40 #define AT91SAM9G20_CIDR_MATCH 0x019905a0
41 #define AT91SAM9RL64_CIDR_MATCH 0x019b03a0
42 #define AT91SAM9G45_CIDR_MATCH 0x019b05a0
43 #define AT91SAM9X5_CIDR_MATCH 0x019a05a0
44 #define AT91SAM9N12_CIDR_MATCH 0x019a07a0
45 #define SAM9X60_CIDR_MATCH 0x019b35a0
[all …]
/OK3568_Linux_fs/u-boot/board/dbau1x00/
H A Dlowlevel_init.S8 #define AU1500_SYS_ADDR 0xB1900000
9 #define sys_endian 0x0038
24 * Switch S1.1 On (bit7 reads 0) is Big Endian
28 li t1, 0x00000040
29 sw t1, 0(t0)
32 li t1, 0x22080a20
33 sw t1, 0(t0)
36 li t1, 0x10c03f00
37 sw t1, 0(t0)
40 li t1, 0x00000080
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/thermal/
H A Dqoriq-thermal.yaml16 Register (IPBRR0) at offset 0x0BF8.
20 0x01900102 T1040
78 reg = <0xf0000 0x1000>;
79 interrupts = <18 2 0 0>;
80 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
81 fsl,tmu-calibration = <0x00000000 0x00000025>,
82 <0x00000001 0x00000028>,
83 <0x00000002 0x0000002d>,
84 <0x00000003 0x00000031>,
85 <0x00000004 0x00000036>,
[all …]
/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A Dsdram-rk3399-lpddr4-400.inc5 .rank = 0x2,
6 .col = 0xA,
7 .bk = 0x3,
8 .bw = 0x2,
9 .dbw = 0x1,
10 .row_3_4 = 0x0,
11 .cs0_row = 0xF,
12 .cs1_row = 0xF,
13 .cs0_high16bit_row = 0xF,
14 .cs1_high16bit_row = 0xF,
[all …]
H A Dsdram-rk3399-lpddr4-800.inc5 .rank = 0x2,
6 .col = 0xA,
7 .bk = 0x3,
8 .bw = 0x2,
9 .dbw = 0x1,
10 .row_3_4 = 0x0,
11 .cs0_row = 0xF,
12 .cs1_row = 0xF,
13 .cs0_high16bit_row = 0xF,
14 .cs1_high16bit_row = 0xF,
[all …]
/OK3568_Linux_fs/u-boot/board/keymile/km_arm/
H A Dkwbimage.cfg14 DATA 0xFFD10000 0x01112222 # MPP Control 0 Register
15 # bit 3-0: MPPSel0 2, NF_IO[2]
22 # bit 31-28: MPPSel7 0, GPO[7]
24 DATA 0xFFD10004 0x03303300
26 DATA 0xFFD10008 0x00001100 # MPP Control 2 Register
27 # bit 3-0: MPPSel16 0, GPIO[16]
28 # bit 7-4: MPPSel17 0, GPIO[17]
29 # bit 12-8: MPPSel18 1, NF_IO[0]
31 # bit 19-16: MPPSel20 0, GPIO[20]
32 # bit 23-20: MPPSel21 0, GPIO[21]
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/
H A Dvega10_enum.h51 GDS_PERF_SEL_DS_ADDR_CONFL = 0,
184 NO_FORCE_REQUEST = 0x00000000,
185 FORCE_LIGHT_SLEEP_REQUEST = 0x00000001,
186 FORCE_DEEP_SLEEP_REQUEST = 0x00000002,
187 FORCE_SHUT_DOWN_REQUEST = 0x00000003,
195 NO_FORCE_REQ = 0x00000000,
196 FORCE_LIGHT_SLEEP_REQ = 0x00000001,
204 ENABLE_MEM_PWR_CTRL = 0x00000000,
205 DISABLE_MEM_PWR_CTRL = 0x00000001,
213 DYNAMIC_SHUT_DOWN_ENABLE = 0x00000000,
[all …]
H A Dnavi10_enum.h51 GDS_PERF_SEL_DS_ADDR_CONFL = 0,
184 GATCL1_TYPE_NORMAL = 0x00000000,
185 GATCL1_TYPE_SHOOTDOWN = 0x00000001,
186 GATCL1_TYPE_BYPASS = 0x00000002,
194 UTCL1_TYPE_NORMAL = 0x00000000,
195 UTCL1_TYPE_SHOOTDOWN = 0x00000001,
196 UTCL1_TYPE_BYPASS = 0x00000002,
204 UTCL1_XNACK_SUCCESS = 0x00000000,
205 UTCL1_XNACK_RETRY = 0x00000001,
206 UTCL1_XNACK_PRT = 0x00000002,
[all …]
/OK3568_Linux_fs/kernel/drivers/ata/
H A Dahci_sunxi.c26 module_param(enable_pmp, bool, 0);
30 #define AHCI_BISTAFR 0x00a0
31 #define AHCI_BISTCR 0x00a4
32 #define AHCI_BISTFCTR 0x00a8
33 #define AHCI_BISTSR 0x00ac
34 #define AHCI_BISTDECR 0x00b0
35 #define AHCI_DIAGNR0 0x00b4
36 #define AHCI_DIAGNR1 0x00b8
37 #define AHCI_OOBR 0x00bc
38 #define AHCI_PHYCS0R 0x00c0
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/ath/ath9k/
H A Dar9462_2p0_initvals.h33 {0x00001030, 0x00000268, 0x000004d0},
34 {0x00001070, 0x0000018c, 0x00000318},
35 {0x000010b0, 0x00000fd0, 0x00001fa0},
36 {0x00008014, 0x044c044c, 0x08980898},
37 {0x0000801c, 0x148ec02b, 0x148ec057},
38 {0x00008318, 0x000044c0, 0x00008980},
39 {0x00009e00, 0x0372131c, 0x0372131c},
40 {0x0000a230, 0x0000400b, 0x00004016},
41 {0x0000a254, 0x00000898, 0x00001130},
46 {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a800d},
[all …]
/OK3568_Linux_fs/u-boot/board/theadorable/
H A Dtheadorable.c26 #define MV_USB_PHY_BASE (MVEBU_AXP_USB_BASE + 0x800)
28 (MV_USB_PHY_BASE + ((port) << 12) + ((chan) << 6) + 0x8)
30 #define THEADORABLE_GPP_OUT_ENA_LOW 0x00336780
31 #define THEADORABLE_GPP_OUT_ENA_MID 0x00003cf0
32 #define THEADORABLE_GPP_OUT_ENA_HIGH (~(0x0))
34 #define THEADORABLE_GPP_OUT_VAL_LOW 0x2c0c983f
35 #define THEADORABLE_GPP_OUT_VAL_MID 0x0007000c
36 #define THEADORABLE_GPP_OUT_VAL_HIGH 0x00000000
44 #define STM_I2C_ADDR 0x27
49 {0x00001400, 0x7301ca28}, /* DDR SDRAM Configuration Register */
[all …]
/OK3568_Linux_fs/kernel/drivers/s390/scsi/
H A Dzfcp_fsf.h17 #define FSF_QTCB_CURRENT_VERSION 0x00000001
20 #define FSF_QTCB_FCP_CMND 0x00000001
21 #define FSF_QTCB_ABORT_FCP_CMND 0x00000002
22 #define FSF_QTCB_OPEN_PORT_WITH_DID 0x00000005
23 #define FSF_QTCB_OPEN_LUN 0x00000006
24 #define FSF_QTCB_CLOSE_LUN 0x00000007
25 #define FSF_QTCB_CLOSE_PORT 0x00000008
26 #define FSF_QTCB_CLOSE_PHYSICAL_PORT 0x00000009
27 #define FSF_QTCB_SEND_ELS 0x0000000B
28 #define FSF_QTCB_SEND_GENERIC 0x0000000C
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/ath/carl9170/
H A Dphy.c48 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE_MAX, 0x7f); in carl9170_init_power_cal()
49 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE1, 0x3f3f3f3f); in carl9170_init_power_cal()
50 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE2, 0x3f3f3f3f); in carl9170_init_power_cal()
51 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE3, 0x3f3f3f3f); in carl9170_init_power_cal()
52 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE4, 0x3f3f3f3f); in carl9170_init_power_cal()
53 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE5, 0x3f3f3f3f); in carl9170_init_power_cal()
54 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE6, 0x3f3f3f3f); in carl9170_init_power_cal()
55 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE7, 0x3f3f3f3f); in carl9170_init_power_cal()
56 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE8, 0x3f3f3f3f); in carl9170_init_power_cal()
57 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE9, 0x3f3f3f3f); in carl9170_init_power_cal()
[all …]
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Drk3528-cru.h431 #define SCMI_PCLK_KEYREADER 0
465 // CRU_SOFTRST_CON03(Offset:0xA0C)
466 #define SRST_NCOREPORESET0 0x00000030
467 #define SRST_NCOREPORESET1 0x00000031
468 #define SRST_NCOREPORESET2 0x00000032
469 #define SRST_NCOREPORESET3 0x00000033
470 #define SRST_NCORESET0 0x00000034
471 #define SRST_NCORESET1 0x00000035
472 #define SRST_NCORESET2 0x00000036
473 #define SRST_NCORESET3 0x00000037
[all …]

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