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/OK3568_Linux_fs/u-boot/board/aristainetos/
H A Dddr-setup2.cfg18 DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000
19 DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000
21 DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00000030
22 DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00000030
24 DATA 4, MX6_IOM_DRAM_CAS, 0x00000030
25 DATA 4, MX6_IOM_DRAM_RAS, 0x00000030
26 DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030
28 DATA 4, MX6_IOM_DRAM_RESET, 0x00000030
29 DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000
30 DATA 4, MX6_IOM_DRAM_SDODT0, 0x00000030
[all …]
/OK3568_Linux_fs/u-boot/board/seco/mx6quq7/
H A Dmx6quq7-2g.cfg28 DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000
29 DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000
32 DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000
33 DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000028
34 DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000028
35 DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000028
36 DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000028
37 DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000028
38 DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000028
39 DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000028
[all …]
/OK3568_Linux_fs/u-boot/board/bachmann/ot1200/
H A Dot1200_spl.c15 /* SDCLK[0:1], CAS, RAS, Reset: Differential input, 48ohm */
16 .dram_sdclk_0 = 0x00000028,
17 .dram_sdclk_1 = 0x00000028,
18 .dram_cas = 0x00000028,
19 .dram_ras = 0x00000028,
20 .dram_reset = 0x00000028,
21 /* SDCKE[0:1]: 100k pull-up */
22 .dram_sdcke0 = 0x00003000,
23 .dram_sdcke1 = 0x00003000,
25 .dram_sdba2 = 0x00000000,
[all …]
/OK3568_Linux_fs/u-boot/board/samtec/vining_2000/
H A Dimximage.cfg34 DATA 4 0x020c4068 0xffffffff
35 DATA 4 0x020c406c 0xffffffff
36 DATA 4 0x020c4070 0xffffffff
37 DATA 4 0x020c4074 0xffffffff
38 DATA 4 0x020c4078 0xffffffff
39 DATA 4 0x020c407c 0xffffffff
40 DATA 4 0x020c4080 0xffffffff
41 DATA 4 0x020c4084 0xffffffff
44 DATA 4 0x020e0618 0x000c0000
45 DATA 4 0x020e05fc 0x00000000
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/mx6sxsabresd/
H A Dimximage.cfg34 DATA 4 0x020c4068 0xffffffff
35 DATA 4 0x020c406c 0xffffffff
36 DATA 4 0x020c4070 0xffffffff
37 DATA 4 0x020c4074 0xffffffff
38 DATA 4 0x020c4078 0xffffffff
39 DATA 4 0x020c407c 0xffffffff
40 DATA 4 0x020c4080 0xffffffff
41 DATA 4 0x020c4084 0xffffffff
44 DATA 4 0x020e0618 0x000c0000
45 DATA 4 0x020e05fc 0x00000000
[all …]
H A Dmx6sxsabresd.c69 return 0; in dram_init()
159 clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, 0); in setup_fec()
161 ret = enable_fec_anatop_clock(0, ENET_125MHZ); in setup_fec()
169 gpio_direction_output(IMX_GPIO_NR(2, 6) , 0); in setup_fec()
172 gpio_direction_output(IMX_GPIO_NR(2, 7) , 0); in setup_fec()
180 return 0; in setup_fec()
197 .gp = IMX_GPIO_NR(1, 0),
217 if (ret < 0) in power_init_board()
226 return 0; in power_init_board()
230 #define USB_OTHERREGS_OFFSET 0x800
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/mx6sabreauto/
H A Dmx6sabreauto.c69 return 0; in dram_init()
162 /*Define for building port exp gpio, pin starts from 0*/
172 (gpio_nr & 0x1f)
197 return 0; in port_exp_direction_output()
251 writel(0x00020181, &weim_regs->cs0gcr1); in eimnor_cs_setup()
252 writel(0x00000001, &weim_regs->cs0gcr2); in eimnor_cs_setup()
253 writel(0x0a020000, &weim_regs->cs0rcr1); in eimnor_cs_setup()
254 writel(0x0000c000, &weim_regs->cs0rcr2); in eimnor_cs_setup()
255 writel(0x0804a240, &weim_regs->cs0wcr1); in eimnor_cs_setup()
256 writel(0x00000120, &weim_regs->wcr); in eimnor_cs_setup()
[all …]
/OK3568_Linux_fs/u-boot/board/solidrun/mx6cuboxi/
H A Dmx6cuboxi.c59 #define USB_H1_VBUS IMX_GPIO_NR(1, 0)
64 return 0; in dram_init()
108 usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR; in board_mmc_init()
109 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
110 gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; in board_mmc_init()
112 return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); in board_mmc_init()
146 gpio_direction_output(ETH_PHY_RESET, 0); in setup_iomux_enet()
157 return 0; in board_phy_config()
160 /* On Cuboxi Ethernet PHY can be located at addresses 0x0 or 0x4 */
161 #define ETH_PHY_MASK ((1 << 0x0) | (1 << 0x4))
[all …]
/OK3568_Linux_fs/u-boot/board/phytec/pfla02/
H A Dpfla02.c62 #define IMX6Q_DRIVE_STRENGTH 0x30
67 return 0; in dram_init()
194 int ret = 0; in board_mmc_getcd()
215 for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { in board_mmc_init()
217 case 0: in board_mmc_init()
219 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
238 return 0; in board_mmc_init()
251 gpio_direction_output(ENET_PHY_RESET_GPIO, 0); in setup_iomux_enet()
288 MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) | in setup_gpmi_nand()
316 for (i = 0, rev = 0; i < 4; i++) in get_board_rev()
[all …]
/OK3568_Linux_fs/u-boot/board/udoo/neo/
H A Dneo.c79 return 0; in dram_init()
89 .gp = IMX_GPIO_NR(1, 0),
117 printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id); in power_init_board()
121 reg |= 0x1; in power_init_board()
126 ret = pmic_reg_write(p, PFUZE3000_SW1AMODE, 0xc); in power_init_board()
130 ret = pmic_reg_write(p, PFUZE3000_SW1BMODE, 0xc); in power_init_board()
134 ret = pmic_reg_write(p, PFUZE3000_SW2MODE, 0xc); in power_init_board()
138 ret = pmic_reg_write(p, PFUZE3000_SW3MODE, 0xc); in power_init_board()
144 reg &= ~0x3f; in power_init_board()
152 reg &= ~0x3f; in power_init_board()
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/media/rkisp1/
H A Drkisp1-regs.h12 #define RKISP1_CIF_ISP_CTRL_ISP_ENABLE BIT(0)
13 #define RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT (0 << 1)
32 #define RKISP1_CIF_ISP_ACQ_PROP_POS_EDGE BIT(0)
35 #define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT_RGGB (0 << 3)
40 #define RKISP1_CIF_ISP_ACQ_PROP_YCBYCR (0 << 7)
44 #define RKISP1_CIF_ISP_ACQ_PROP_FIELD_SEL_ALL (0 << 9)
47 #define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_12B (0 << 12)
54 #define RKISP1_CIF_VI_DPCL_DMA_JPEG (0 << 0)
55 #define RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_MI BIT(0)
56 #define RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_JPEG (2 << 0)
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dregsnv04.h5 #define NV04_PFB_BOOT_0 0x00100000
6 # define NV04_PFB_BOOT_0_RAM_AMOUNT 0x00000003
7 # define NV04_PFB_BOOT_0_RAM_AMOUNT_32MB 0x00000000
8 # define NV04_PFB_BOOT_0_RAM_AMOUNT_4MB 0x00000001
9 # define NV04_PFB_BOOT_0_RAM_AMOUNT_8MB 0x00000002
10 # define NV04_PFB_BOOT_0_RAM_AMOUNT_16MB 0x00000003
11 # define NV04_PFB_BOOT_0_RAM_WIDTH_128 0x00000004
12 # define NV04_PFB_BOOT_0_RAM_TYPE 0x00000028
13 # define NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_8MBIT 0x00000000
14 # define NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_16MBIT 0x00000008
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/hdmi/
H A Dhdmi.xml.h50 HDCP_KEYS_STATE_NO_KEYS = 0,
61 DDC_WRITE = 0,
66 ACR_NONE = 0,
72 #define REG_HDMI_CTRL 0x00000000
73 #define HDMI_CTRL_ENABLE 0x00000001
74 #define HDMI_CTRL_HDMI 0x00000002
75 #define HDMI_CTRL_ENCRYPTED 0x00000004
77 #define REG_HDMI_AUDIO_PKT_CTRL1 0x00000020
78 #define HDMI_AUDIO_PKT_CTRL1_AUDIO_SAMPLE_SEND 0x00000001
80 #define REG_HDMI_ACR_PKT_CTRL 0x00000024
[all …]
/OK3568_Linux_fs/kernel/drivers/media/platform/rockchip/isp1/
H A Dregs.h40 (((a) & 0xFF) << 0 | ((b) & 0xFF) << 8 | \
41 ((c) & 0xFF) << 16 | ((d) & 0xFF) << 24)
44 (((a) & 0xFFFF) << 0 | ((b) & 0xFFFF) << 16)
47 #define GRF_VI_CON0 0x430
48 #define ISP_CIF_DATA_WIDTH_MASK 0x60006000
49 #define ISP_CIF_DATA_WIDTH_8B (0 << 13 | 3 << 29)
54 #define CIF_ISP_CTRL_ISP_ENABLE BIT(0)
55 #define CIF_ISP_CTRL_ISP_MODE_RAW_PICT (0 << 1)
74 #define CIF_ISP_ACQ_PROP_POS_EDGE BIT(0)
77 #define CIF_ISP_ACQ_PROP_BAYER_PAT_RGGB (0 << 3)
[all …]
/OK3568_Linux_fs/kernel/include/linux/amba/
H A Dclcd-regs.h17 #define CLCD_TIM0 0x00000000
18 #define CLCD_TIM1 0x00000004
19 #define CLCD_TIM2 0x00000008
20 #define CLCD_TIM3 0x0000000c
21 #define CLCD_UBAS 0x00000010
22 #define CLCD_LBAS 0x00000014
24 #define CLCD_PL110_IENB 0x00000018
25 #define CLCD_PL110_CNTL 0x0000001c
26 #define CLCD_PL110_STAT 0x00000020
27 #define CLCD_PL110_INTR 0x00000024
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphytbl_lcn.c10 0x00000000,
11 0x00000000,
12 0x00000000,
13 0x00000000,
14 0x00000000,
15 0x00000000,
16 0x00000000,
17 0x00000000,
18 0x00000004,
19 0x00000000,
[all …]
/OK3568_Linux_fs/kernel/drivers/media/platform/rockchip/isp/
H A Dregs.h42 (((a) & 0xFF) << 0 | ((b) & 0xFF) << 8 | \
43 ((c) & 0xFF) << 16 | ((d) & 0xFF) << 24)
46 (((a) & 0xFFFF) << 0 | ((b) & 0xFFFF) << 16)
49 #define GRF_VI_CON0 0x430
50 #define ISP_CIF_DATA_WIDTH_MASK 0x60006000
51 #define ISP_CIF_DATA_WIDTH_8B (0 << 13 | 3 << 29)
56 #define CIF_ISP_CTRL_ISP_ENABLE BIT(0)
57 #define CIF_ISP_CTRL_ISP_MODE_RAW_PICT (0 << 1)
76 #define CIF_ISP_ACQ_PROP_POS_EDGE BIT(0)
79 #define CIF_ISP_ACQ_PROP_BAYER_PAT_RGGB (0 << 3)
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/gt/
H A Divb_clear_kernel.c9 0x00000001, 0x26020128, 0x00000024, 0x00000000,
10 0x00000040, 0x20280c21, 0x00000028, 0x00000001,
11 0x01000010, 0x20000c20, 0x0000002c, 0x00000000,
12 0x00010220, 0x34001c00, 0x00001400, 0x0000002c,
13 0x00600001, 0x20600061, 0x00000000, 0x00000000,
14 0x00000008, 0x20601c85, 0x00000e00, 0x0000000c,
15 0x00000005, 0x20601ca5, 0x00000060, 0x00000001,
16 0x00000008, 0x20641c85, 0x00000e00, 0x0000000d,
17 0x00000005, 0x20641ca5, 0x00000064, 0x00000003,
18 0x00000041, 0x207424a5, 0x00000064, 0x00000034,
[all …]
H A Dhsw_clear_kernel.c9 0x00000001, 0x26020128, 0x00000024, 0x00000000,
10 0x00000040, 0x20280c21, 0x00000028, 0x00000001,
11 0x01000010, 0x20000c20, 0x0000002c, 0x00000000,
12 0x00010220, 0x34001c00, 0x00001400, 0x00000160,
13 0x00600001, 0x20600061, 0x00000000, 0x00000000,
14 0x00000008, 0x20601c85, 0x00000e00, 0x0000000c,
15 0x00000005, 0x20601ca5, 0x00000060, 0x00000001,
16 0x00000008, 0x20641c85, 0x00000e00, 0x0000000d,
17 0x00000005, 0x20641ca5, 0x00000064, 0x00000003,
18 0x00000041, 0x207424a5, 0x00000064, 0x00000034,
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/dsi/
H A Ddsi.xml.h50 NON_BURST_SYNCH_PULSE = 0,
56 VID_DST_FORMAT_RGB565 = 0,
63 SWAP_RGB = 0,
72 TRIGGER_NONE = 0,
81 CMD_DST_FORMAT_RGB111 = 0,
90 LANE_SWAP_0123 = 0,
100 #define DSI_IRQ_CMD_DMA_DONE 0x00000001
101 #define DSI_IRQ_MASK_CMD_DMA_DONE 0x00000002
102 #define DSI_IRQ_CMD_MDP_DONE 0x00000100
103 #define DSI_IRQ_MASK_CMD_MDP_DONE 0x00000200
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/dp/
H A Ddp_reg.h10 #define REG_DP_HW_VERSION (0x00000000)
12 #define REG_DP_SW_RESET (0x00000010)
13 #define DP_SW_RESET (0x00000001)
15 #define REG_DP_PHY_CTRL (0x00000014)
16 #define DP_PHY_CTRL_SW_RESET_PLL (0x00000001)
17 #define DP_PHY_CTRL_SW_RESET (0x00000004)
19 #define REG_DP_CLK_CTRL (0x00000018)
20 #define REG_DP_CLK_ACTIVE (0x0000001C)
21 #define REG_DP_INTR_STATUS (0x00000020)
22 #define REG_DP_INTR_STATUS2 (0x00000024)
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/pl111/
H A Dpl111_drm.h29 #define CLCD_TIM0 0x00000000
30 #define CLCD_TIM1 0x00000004
31 #define CLCD_TIM2 0x00000008
32 #define CLCD_TIM3 0x0000000c
33 #define CLCD_UBAS 0x00000010
34 #define CLCD_LBAS 0x00000014
36 #define CLCD_PL110_IENB 0x00000018
37 #define CLCD_PL110_CNTL 0x0000001c
38 #define CLCD_PL110_STAT 0x00000020
39 #define CLCD_PL110_INTR 0x00000024
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8723ds/hal/phydm/rtl8723d/
H A Dhalhwimg8723d_mac.c30 u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ in check_positive()
41 u8 pkg_type_for_para = (dm->package_type == 0) ? 15 : dm->package_type; in check_positive()
44 (dm->support_interface & 0xF0) << 16 | in check_positive()
47 (dm->support_interface & 0x0F) << 8 | in check_positive()
50 u32 driver2 = (dm->type_glna & 0xFF) << 0 | in check_positive()
51 (dm->type_gpa & 0xFF) << 8 | in check_positive()
52 (dm->type_alna & 0xFF) << 16 | in check_positive()
53 (dm->type_apa & 0xFF) << 24; in check_positive()
55 u32 driver3 = 0; in check_positive()
57 u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | in check_positive()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723ds/hal/phydm/rtl8723d/
H A Dhalhwimg8723d_mac.c31 u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ in check_positive()
42 u8 pkg_type_for_para = (dm->package_type == 0) ? 15 : dm->package_type; in check_positive()
45 (dm->support_interface & 0xF0) << 16 | in check_positive()
48 (dm->support_interface & 0x0F) << 8 | in check_positive()
51 u32 driver2 = (dm->type_glna & 0xFF) << 0 | in check_positive()
52 (dm->type_gpa & 0xFF) << 8 | in check_positive()
53 (dm->type_alna & 0xFF) << 16 | in check_positive()
54 (dm->type_apa & 0xFF) << 24; in check_positive()
56 u32 driver3 = 0; in check_positive()
58 u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | in check_positive()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8189fs/hal/phydm/rtl8188f/
H A Dhalhwimg8188f_mac.c30 u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ in check_positive()
41 u8 pkg_type_for_para = (dm->package_type == 0) ? 15 : dm->package_type; in check_positive()
44 (dm->support_interface & 0xF0) << 16 | in check_positive()
47 (dm->support_interface & 0x0F) << 8 | in check_positive()
50 u32 driver2 = (dm->type_glna & 0xFF) << 0 | in check_positive()
51 (dm->type_gpa & 0xFF) << 8 | in check_positive()
52 (dm->type_alna & 0xFF) << 16 | in check_positive()
53 (dm->type_apa & 0xFF) << 24; in check_positive()
55 u32 driver3 = 0; in check_positive()
57 u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | in check_positive()
[all …]

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