| /OK3568_Linux_fs/kernel/drivers/media/usb/pwc/ |
| H A D | pwc-timon.c | 17 number. An alternate of 0 means that the mode is unavailable. 39 {1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}}, 40 {1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}}, 41 {1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}}, 42 {1, 140, 0, {0x05, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x8C, 0xFC, 0x80, 0x02}}, 46 {2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}}, 47 {2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}}, 48 {2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}}, 49 {2, 280, 0, {0x04, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x18, 0xA9, 0x80, 0x02}}, 53 {3, 410, 0, {0x03, 0xF4, 0x04, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x9A, 0x71, 0x80, 0x02}}, [all …]
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| H A D | pwc-kiara.c | 17 number. An alternate of 0 means that the mode is unavailable. 40 {0, }, 41 {0, }, 42 {0, }, 43 {0, }, 47 {0, }, 48 {0, }, 49 {0, }, 50 {0, }, 54 {0, }, [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/bif/ |
| H A D | bif_3_0_sh_mask.h | 26 #define BACO_CNTL__BACO_ANA_ISO_DIS_MASK 0x00000080L 27 #define BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT 0x00000007 28 #define BACO_CNTL__BACO_BCLK_OFF_MASK 0x00000002L 29 #define BACO_CNTL__BACO_BCLK_OFF__SHIFT 0x00000001 30 #define BACO_CNTL__BACO_EN_MASK 0x00000001L 31 #define BACO_CNTL__BACO_EN__SHIFT 0x00000000 32 #define BACO_CNTL__BACO_HANG_PROTECTION_EN_MASK 0x00000020L 33 #define BACO_CNTL__BACO_HANG_PROTECTION_EN__SHIFT 0x00000005 34 #define BACO_CNTL__BACO_ISO_DIS_MASK 0x00000004L 35 #define BACO_CNTL__BACO_ISO_DIS__SHIFT 0x00000002 [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | tegra20-acer-a500-picasso.dts | 36 memory@0 { 37 reg = <0x00000000 0x40000000>; 47 reg = <0x2ffe0000 0x10000>; /* 64kB */ 48 console-size = <0x8000>; /* 32kB */ 49 record-size = <0x400>; /* 1kB */ 55 alloc-ranges = <0x30000000 0x10000000>; 56 size = <0x10000000>; /* 256MiB */ 67 port@0 { 91 pinctrl-0 = <&state_default>; 406 shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>; [all …]
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| H A D | tegra124-nyan-blaze-emc.dtsi | 78 nvidia,emc-auto-cal-config = <0xa1430000>; 79 nvidia,emc-auto-cal-config2 = <0x00000000>; 80 nvidia,emc-auto-cal-config3 = <0x00000000>; 81 nvidia,emc-auto-cal-interval = <0x001fffff>; 82 nvidia,emc-bgbias-ctl0 = <0x00000008>; 83 nvidia,emc-cfg = <0x73240000>; 84 nvidia,emc-cfg-2 = <0x000008c5>; 85 nvidia,emc-ctt-term-ctrl = <0x00000802>; 86 nvidia,emc-mode-1 = <0x80100003>; 87 nvidia,emc-mode-2 = <0x80200008>; [all …]
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| H A D | tegra124-apalis-emc.dtsi | 94 nvidia,emc-auto-cal-config = <0xa1430000>; 95 nvidia,emc-auto-cal-config2 = <0x00000000>; 96 nvidia,emc-auto-cal-config3 = <0x00000000>; 97 nvidia,emc-auto-cal-interval = <0x001fffff>; 98 nvidia,emc-bgbias-ctl0 = <0x00000008>; 99 nvidia,emc-cfg = <0x73240000>; 100 nvidia,emc-cfg-2 = <0x000008c5>; 101 nvidia,emc-ctt-term-ctrl = <0x00000802>; 102 nvidia,emc-mode-1 = <0x80100003>; 103 nvidia,emc-mode-2 = <0x80200008>; [all …]
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| H A D | tegra124-jetson-tk1-emc.dtsi | 89 nvidia,emc-auto-cal-config = <0xa1430000>; 90 nvidia,emc-auto-cal-config2 = <0x00000000>; 91 nvidia,emc-auto-cal-config3 = <0x00000000>; 92 nvidia,emc-auto-cal-interval = <0x001fffff>; 93 nvidia,emc-bgbias-ctl0 = <0x00000008>; 94 nvidia,emc-cfg = <0x73240000>; 95 nvidia,emc-cfg-2 = <0x000008c5>; 96 nvidia,emc-ctt-term-ctrl = <0x00000802>; 97 nvidia,emc-mode-1 = <0x80100003>; 98 nvidia,emc-mode-2 = <0x80200008>; [all …]
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| H A D | tegra124-nyan-big-emc.dtsi | 229 nvidia,emc-auto-cal-config = <0xa1430000>; 230 nvidia,emc-auto-cal-config2 = <0x00000000>; 231 nvidia,emc-auto-cal-config3 = <0x00000000>; 232 nvidia,emc-auto-cal-interval = <0x001fffff>; 233 nvidia,emc-bgbias-ctl0 = <0x00000008>; 234 nvidia,emc-cfg = <0x73240000>; 235 nvidia,emc-cfg-2 = <0x000008c5>; 236 nvidia,emc-ctt-term-ctrl = <0x00000802>; 237 nvidia,emc-mode-1 = <0x80100003>; 238 nvidia,emc-mode-2 = <0x80200008>; [all …]
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| H A D | tegra20-colibri.dtsi | 11 memory@0 { 17 reg = <0x00000000 0x10000000>; 32 pinctrl-0 = <&state_default>; 424 <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_HIGH>; 426 <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>; 440 nand@0 { 441 reg = <0>; 449 wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>; 477 reg = <0x34>; 506 regulator-name = "VDD_CPU_1.0V"; [all …]
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| H A D | tegra30-asus-nexus7-tilapia-memory-timings.dtsi | 13 emc-timings-0 { 17 nvidia,emc-auto-cal-interval = <0x001fffff>; 18 nvidia,emc-mode-1 = <0x80100002>; 19 nvidia,emc-mode-2 = <0x80200018>; 20 nvidia,emc-mode-reset = <0x80000b71>; 21 nvidia,emc-zcal-cnt-long = <0x00000040>; 25 0x0000001f /* EMC_RC */ 26 0x00000069 /* EMC_RFC */ 27 0x00000017 /* EMC_RAS */ 28 0x00000007 /* EMC_RP */ [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_4_0_sh_mask.h | 26 #define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN_MASK 0x00000001L 27 #define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN__SHIFT 0x00000000 28 #define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN_MASK 0x00000002L 29 #define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN__SHIFT 0x00000001 30 #define UVD_CGC_CTRL2__GATER_DIV_ID_MASK 0x0000001cL 31 #define UVD_CGC_CTRL2__GATER_DIV_ID__SHIFT 0x00000002 32 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER_MASK 0x0000003cL 33 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x00000002 34 #define UVD_CGC_CTRL__CLK_OFF_DELAY_MASK 0x000007c0L 35 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT 0x00000006 [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/dce/ |
| H A D | dce_6_0_sh_mask.h | 26 #define ABM_TEST_DEBUG_DATA__ABM_TEST_DEBUG_DATA_MASK 0xffffffffL 27 #define ABM_TEST_DEBUG_DATA__ABM_TEST_DEBUG_DATA__SHIFT 0x00000000 28 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_INDEX_MASK 0x000000ffL 29 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_INDEX__SHIFT 0x00000000 30 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_WRITE_EN_MASK 0x00000100L 31 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_WRITE_EN__SHIFT 0x00000008 32 #define AFMT_60958_0__AFMT_60958_CS_A_MASK 0x00000001L 33 #define AFMT_60958_0__AFMT_60958_CS_A__SHIFT 0x00000000 34 #define AFMT_60958_0__AFMT_60958_CS_B_MASK 0x00000002L 35 #define AFMT_60958_0__AFMT_60958_CS_B__SHIFT 0x00000001 [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_6_0_sh_mask.h | 26 #define BCI_DEBUG_READ__DATA_MASK 0x00ffffffL 27 #define BCI_DEBUG_READ__DATA__SHIFT 0x00000000 28 #define CB_BLEND0_CONTROL__ALPHA_COMB_FCN_MASK 0x00e00000L 29 #define CB_BLEND0_CONTROL__ALPHA_COMB_FCN__SHIFT 0x00000015 30 #define CB_BLEND0_CONTROL__ALPHA_DESTBLEND_MASK 0x1f000000L 31 #define CB_BLEND0_CONTROL__ALPHA_DESTBLEND__SHIFT 0x00000018 32 #define CB_BLEND0_CONTROL__ALPHA_SRCBLEND_MASK 0x001f0000L 33 #define CB_BLEND0_CONTROL__ALPHA_SRCBLEND__SHIFT 0x00000010 34 #define CB_BLEND0_CONTROL__COLOR_COMB_FCN_MASK 0x000000e0L 35 #define CB_BLEND0_CONTROL__COLOR_COMB_FCN__SHIFT 0x00000005 [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| H A D | oss_1_0_sh_mask.h | 26 #define CC_DRM_ID_STRAPS__ATI_REV_ID_MASK 0xf0000000L 27 #define CC_DRM_ID_STRAPS__ATI_REV_ID__SHIFT 0x0000001c 28 #define CC_DRM_ID_STRAPS__DEVICE_ID_MASK 0x000ffff0L 29 #define CC_DRM_ID_STRAPS__DEVICE_ID__SHIFT 0x00000004 30 #define CC_DRM_ID_STRAPS__MAJOR_REV_ID_MASK 0x00f00000L 31 #define CC_DRM_ID_STRAPS__MAJOR_REV_ID__SHIFT 0x00000014 32 #define CC_DRM_ID_STRAPS__MINOR_REV_ID_MASK 0x0f000000L 33 #define CC_DRM_ID_STRAPS__MINOR_REV_ID__SHIFT 0x00000018 34 #define CC_SYS_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 0x00ff0000L 35 #define CC_SYS_RB_BACKEND_DISABLE__BACKEND_DISABLE__SHIFT 0x00000010 [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gmc/ |
| H A D | gmc_6_0_sh_mask.h | 26 #define ATC_ATS_CNTL__CREDITS_ATS_RPB_MASK 0x00003f00L 27 #define ATC_ATS_CNTL__CREDITS_ATS_RPB__SHIFT 0x00000008 28 #define ATC_ATS_CNTL__DEBUG_ECO_MASK 0x000f0000L 29 #define ATC_ATS_CNTL__DEBUG_ECO__SHIFT 0x00000010 30 #define ATC_ATS_CNTL__DISABLE_ATC_MASK 0x00000001L 31 #define ATC_ATS_CNTL__DISABLE_ATC__SHIFT 0x00000000 32 #define ATC_ATS_CNTL__DISABLE_PASID_MASK 0x00000004L 33 #define ATC_ATS_CNTL__DISABLE_PASID__SHIFT 0x00000002 34 #define ATC_ATS_CNTL__DISABLE_PRI_MASK 0x00000002L 35 #define ATC_ATS_CNTL__DISABLE_PRI__SHIFT 0x00000001 [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/ |
| H A D | vega10_enum.h | 51 GDS_PERF_SEL_DS_ADDR_CONFL = 0, 184 NO_FORCE_REQUEST = 0x00000000, 185 FORCE_LIGHT_SLEEP_REQUEST = 0x00000001, 186 FORCE_DEEP_SLEEP_REQUEST = 0x00000002, 187 FORCE_SHUT_DOWN_REQUEST = 0x00000003, 195 NO_FORCE_REQ = 0x00000000, 196 FORCE_LIGHT_SLEEP_REQ = 0x00000001, 204 ENABLE_MEM_PWR_CTRL = 0x00000000, 205 DISABLE_MEM_PWR_CTRL = 0x00000001, 213 DYNAMIC_SHUT_DOWN_ENABLE = 0x00000000, [all …]
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| H A D | navi10_enum.h | 51 GDS_PERF_SEL_DS_ADDR_CONFL = 0, 184 GATCL1_TYPE_NORMAL = 0x00000000, 185 GATCL1_TYPE_SHOOTDOWN = 0x00000001, 186 GATCL1_TYPE_BYPASS = 0x00000002, 194 UTCL1_TYPE_NORMAL = 0x00000000, 195 UTCL1_TYPE_SHOOTDOWN = 0x00000001, 196 UTCL1_TYPE_BYPASS = 0x00000002, 204 UTCL1_XNACK_SUCCESS = 0x00000000, 205 UTCL1_XNACK_RETRY = 0x00000001, 206 UTCL1_XNACK_PRT = 0x00000002, [all …]
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| /OK3568_Linux_fs/kernel/drivers/s390/scsi/ |
| H A D | zfcp_fsf.h | 17 #define FSF_QTCB_CURRENT_VERSION 0x00000001 20 #define FSF_QTCB_FCP_CMND 0x00000001 21 #define FSF_QTCB_ABORT_FCP_CMND 0x00000002 22 #define FSF_QTCB_OPEN_PORT_WITH_DID 0x00000005 23 #define FSF_QTCB_OPEN_LUN 0x00000006 24 #define FSF_QTCB_CLOSE_LUN 0x00000007 25 #define FSF_QTCB_CLOSE_PORT 0x00000008 26 #define FSF_QTCB_CLOSE_PHYSICAL_PORT 0x00000009 27 #define FSF_QTCB_SEND_ELS 0x0000000B 28 #define FSF_QTCB_SEND_GENERIC 0x0000000C [all …]
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| /OK3568_Linux_fs/kernel/tools/testing/selftests/powerpc/vphn/ |
| H A D | test-vphn.c | 29 0xffffffffffffffff, 30 0xffffffffffffffff, 31 0xffffffffffffffff, 32 0xffffffffffffffff, 33 0xffffffffffffffff, 34 0xffffffffffffffff, 37 0x00000000 43 0x8001ffffffffffff, 44 0xffffffffffffffff, 45 0xffffffffffffffff, [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/include/nvhw/class/ |
| H A D | cl887d.h | 27 #define NV887D_SOR_SET_CONTROL(a) (0x00000600 + (a)*0… 28 #define NV887D_SOR_SET_CONTROL_OWNER 3:0 29 #define NV887D_SOR_SET_CONTROL_OWNER_NONE (0x00000000) 30 #define NV887D_SOR_SET_CONTROL_OWNER_HEAD0 (0x00000001) 31 #define NV887D_SOR_SET_CONTROL_OWNER_HEAD1 (0x00000002) 33 #define NV887D_SOR_SET_CONTROL_SUB_OWNER_NONE (0x00000000) 34 #define NV887D_SOR_SET_CONTROL_SUB_OWNER_SUBHEAD0 (0x00000001) 35 #define NV887D_SOR_SET_CONTROL_SUB_OWNER_SUBHEAD1 (0x00000002) 36 #define NV887D_SOR_SET_CONTROL_SUB_OWNER_BOTH (0x00000003) 38 #define NV887D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM (0x00000000) [all …]
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| H A D | cl837d.h | 28 #define NV837D_SOR_SET_CONTROL(a) (0x00000600 + (a)*0… 29 #define NV837D_SOR_SET_CONTROL_OWNER 3:0 30 #define NV837D_SOR_SET_CONTROL_OWNER_NONE (0x00000000) 31 #define NV837D_SOR_SET_CONTROL_OWNER_HEAD0 (0x00000001) 32 #define NV837D_SOR_SET_CONTROL_OWNER_HEAD1 (0x00000002) 34 #define NV837D_SOR_SET_CONTROL_SUB_OWNER_NONE (0x00000000) 35 #define NV837D_SOR_SET_CONTROL_SUB_OWNER_SUBHEAD0 (0x00000001) 36 #define NV837D_SOR_SET_CONTROL_SUB_OWNER_SUBHEAD1 (0x00000002) 37 #define NV837D_SOR_SET_CONTROL_SUB_OWNER_BOTH (0x00000003) 39 #define NV837D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM (0x00000000) [all …]
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| /OK3568_Linux_fs/u-boot/board/freescale/ls2080ardb/ |
| H A D | ddr.h | 27 * memory controller 0 31 {2, 1350, 0, 8, 6, 0x0708090B, 0x0C0D0E09,}, 32 {2, 1666, 0, 10, 9, 0x090A0B0E, 0x0F11110C,}, 33 {2, 1900, 0, 12, 0xA, 0x0B0C0E11, 0x1214140F,}, 34 {2, 2300, 0, 12, 0xB, 0x0C0D0F12, 0x14161610,}, 45 {2, 1350, 0, 8, 0xd, 0x0C0A0A00, 0x00000009,}, 46 {2, 1666, 0, 8, 0xd, 0x0C0A0A00, 0x00000009,}, 47 {2, 1900, 0, 8, 0xe, 0x0D0C0B00, 0x0000000A,}, 48 {2, 2200, 0, 8, 0xe, 0x0D0C0B00, 0x0000000A,}, 54 * memory controller 0 [all …]
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| /OK3568_Linux_fs/u-boot/board/freescale/ls2080aqds/ |
| H A D | ddr.h | 27 * memory controller 0 31 {2, 1350, 0, 8, 6, 0x0708090B, 0x0C0D0E09,}, 32 {2, 1666, 0, 8, 7, 0x08090A0C, 0x0D0F100B,}, 33 {2, 1900, 0, 8, 7, 0x09090B0D, 0x0E10120B,}, 34 {2, 2300, 0, 8, 8, 0x090A0C0F, 0x1012130C,}, 45 {2, 1350, 0, 8, 0xd, 0x0C0A0A00, 0x00000009,}, 46 {2, 1666, 0, 8, 0xd, 0x0C0A0A00, 0x00000009,}, 47 {2, 1900, 0, 8, 0xe, 0x0D0C0B00, 0x0000000A,}, 48 {2, 2200, 0, 8, 0xe, 0x0D0C0B00, 0x0000000A,}, 54 * memory controller 0 [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| H A D | nv50.c | 39 { 0x00000000, "GRCTX" }, 40 { 0x00000001, "NOTIFY" }, 41 { 0x00000002, "QUERY" }, 42 { 0x00000003, "COND" }, 43 { 0x00000004, "M2M_IN" }, 44 { 0x00000005, "M2M_OUT" }, 45 { 0x00000006, "M2M_NOTIFY" }, 50 { 0x00000000, "CB" }, 51 { 0x00000001, "TIC" }, 52 { 0x00000002, "TSC" }, [all …]
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| /OK3568_Linux_fs/u-boot/board/Synology/ds414/ |
| H A D | ds414.c | 25 #define DS414_GPP_OUT_VAL_HIGH (0) 27 #define DS414_GPP_OUT_POL_LOW (0) 28 #define DS414_GPP_OUT_POL_MID (0) 29 #define DS414_GPP_OUT_POL_HIGH (0) 34 #define DS414_GPP_OUT_ENA_HIGH (~0) 37 0x11111111, 38 0x22221111, 39 0x22222222, 40 0x00000000, 41 0x11110000, [all …]
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