1 /*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Andy Fleming <afleming@gmail.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 *
7 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
8 */
9
10 #ifndef _PHY_H
11 #define _PHY_H
12
13 #include <dm.h>
14 #include <linux/list.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/mdio.h>
18 #include <phy_interface.h>
19
20 #define PHY_FIXED_ID 0xa5a55a5a
21
22 #define PHY_MAX_ADDR 32
23
24 #define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
25
26 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
27 SUPPORTED_TP | \
28 SUPPORTED_MII)
29
30 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
31 SUPPORTED_10baseT_Full)
32
33 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
34 SUPPORTED_100baseT_Full)
35
36 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
37 SUPPORTED_1000baseT_Full)
38
39 #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
40 PHY_100BT_FEATURES | \
41 PHY_DEFAULT_FEATURES)
42
43 #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
44 PHY_1000BT_FEATURES)
45
46 #define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
47 SUPPORTED_10000baseT_Full)
48
49 #ifndef PHY_ANEG_TIMEOUT
50 #define PHY_ANEG_TIMEOUT 4000
51 #endif
52
53
54 struct phy_device;
55
56 #define MDIO_NAME_LEN 32
57
58 struct mii_dev {
59 struct list_head link;
60 char name[MDIO_NAME_LEN];
61 void *priv;
62 int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
63 int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
64 u16 val);
65 int (*reset)(struct mii_dev *bus);
66 struct phy_device *phymap[PHY_MAX_ADDR];
67 u32 phy_mask;
68 };
69
70 /* struct phy_driver: a structure which defines PHY behavior
71 *
72 * uid will contain a number which represents the PHY. During
73 * startup, the driver will poll the PHY to find out what its
74 * UID--as defined by registers 2 and 3--is. The 32-bit result
75 * gotten from the PHY will be masked to
76 * discard any bits which may change based on revision numbers
77 * unimportant to functionality
78 *
79 */
80 struct phy_driver {
81 char *name;
82 unsigned int uid;
83 unsigned int mask;
84 unsigned int mmds;
85
86 u32 features;
87
88 /* Called to do any driver startup necessities */
89 /* Will be called during phy_connect */
90 int (*probe)(struct phy_device *phydev);
91
92 /* Called to configure the PHY, and modify the controller
93 * based on the results. Should be called after phy_connect */
94 int (*config)(struct phy_device *phydev);
95
96 /* Called when starting up the controller */
97 int (*startup)(struct phy_device *phydev);
98
99 /* Called when bringing down the controller */
100 int (*shutdown)(struct phy_device *phydev);
101
102 int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
103 int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
104 u16 val);
105
106 /* Phy specific driver override for reading a MMD register */
107 int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
108
109 /* Phy specific driver override for writing a MMD register */
110 int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
111 u16 val);
112
113 struct list_head list;
114 };
115
116 struct phy_device {
117 /* Information about the PHY type */
118 /* And management functions */
119 struct mii_dev *bus;
120 struct phy_driver *drv;
121 void *priv;
122
123 #ifdef CONFIG_DM_ETH
124 struct udevice *dev;
125 ofnode node;
126 #else
127 struct eth_device *dev;
128 #endif
129
130 /* forced speed & duplex (no autoneg)
131 * partner speed & duplex & pause (autoneg)
132 */
133 int speed;
134 int duplex;
135
136 /* The most recently read link state */
137 int link;
138 int port;
139 phy_interface_t interface;
140
141 u32 advertising;
142 u32 supported;
143 u32 mmds;
144
145 int autoneg;
146 int addr;
147 int pause;
148 int asym_pause;
149 u32 phy_id;
150 bool is_c45;
151 u32 flags;
152 };
153
154 struct fixed_link {
155 int phy_id;
156 int duplex;
157 int link_speed;
158 int pause;
159 int asym_pause;
160 };
161
phy_read(struct phy_device * phydev,int devad,int regnum)162 static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
163 {
164 struct mii_dev *bus = phydev->bus;
165
166 return bus->read(bus, phydev->addr, devad, regnum);
167 }
168
phy_write(struct phy_device * phydev,int devad,int regnum,u16 val)169 static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
170 u16 val)
171 {
172 struct mii_dev *bus = phydev->bus;
173
174 return bus->write(bus, phydev->addr, devad, regnum, val);
175 }
176
phy_mmd_start_indirect(struct phy_device * phydev,int devad,int regnum)177 static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
178 int regnum)
179 {
180 /* Write the desired MMD Devad */
181 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
182
183 /* Write the desired MMD register address */
184 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
185
186 /* Select the Function : DATA with no post increment */
187 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
188 (devad | MII_MMD_CTRL_NOINCR));
189 }
190
phy_read_mmd(struct phy_device * phydev,int devad,int regnum)191 static inline int phy_read_mmd(struct phy_device *phydev, int devad,
192 int regnum)
193 {
194 struct phy_driver *drv = phydev->drv;
195
196 if (regnum > (u16)~0 || devad > 32)
197 return -EINVAL;
198
199 /* driver-specific access */
200 if (drv->read_mmd)
201 return drv->read_mmd(phydev, devad, regnum);
202
203 /* direct C45 / C22 access */
204 if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
205 devad == MDIO_DEVAD_NONE || !devad)
206 return phy_read(phydev, devad, regnum);
207
208 /* indirect C22 access */
209 phy_mmd_start_indirect(phydev, devad, regnum);
210
211 /* Read the content of the MMD's selected register */
212 return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
213 }
214
phy_write_mmd(struct phy_device * phydev,int devad,int regnum,u16 val)215 static inline int phy_write_mmd(struct phy_device *phydev, int devad,
216 int regnum, u16 val)
217 {
218 struct phy_driver *drv = phydev->drv;
219
220 if (regnum > (u16)~0 || devad > 32)
221 return -EINVAL;
222
223 /* driver-specific access */
224 if (drv->write_mmd)
225 return drv->write_mmd(phydev, devad, regnum, val);
226
227 /* direct C45 / C22 access */
228 if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
229 devad == MDIO_DEVAD_NONE || !devad)
230 return phy_write(phydev, devad, regnum, val);
231
232 /* indirect C22 access */
233 phy_mmd_start_indirect(phydev, devad, regnum);
234
235 /* Write the data into MMD's selected register */
236 return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
237 }
238
239 #ifdef CONFIG_PHYLIB_10G
240 extern struct phy_driver gen10g_driver;
241
242 /* For now, XGMII is the only 10G interface */
is_10g_interface(phy_interface_t interface)243 static inline int is_10g_interface(phy_interface_t interface)
244 {
245 return interface == PHY_INTERFACE_MODE_XGMII;
246 }
247
248 #endif
249
250 /**
251 * phy_init() - Initializes the PHY drivers
252 *
253 * This function registers all available PHY drivers
254 *
255 * @return 0 if OK, -ve on error
256 */
257 int phy_init(void);
258
259 /**
260 * phy_reset() - Resets the specified PHY
261 *
262 * Issues a reset of the PHY and waits for it to complete
263 *
264 * @phydev: PHY to reset
265 * @return 0 if OK, -ve on error
266 */
267 int phy_reset(struct phy_device *phydev);
268
269 /**
270 * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
271 *
272 * The function checks the PHY addresses flagged in phy_mask and returns a
273 * phy_device pointer if it detects a PHY.
274 * This function should only be called if just one PHY is expected to be present
275 * in the set of addresses flagged in phy_mask. If multiple PHYs are present,
276 * it is undefined which of these PHYs is returned.
277 *
278 * @bus: MII/MDIO bus to scan
279 * @phy_mask: bitmap of PYH addresses to scan
280 * @interface: type of MAC-PHY interface
281 * @return pointer to phy_device if a PHY is found, or NULL otherwise
282 */
283 struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
284 phy_interface_t interface);
285
286 #ifdef CONFIG_DM_ETH
287
288 /**
289 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
290 * @phydev: PHY device
291 * @dev: Ethernet device
292 */
293 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
294
295 /**
296 * phy_connect() - Creates a PHY device for the Ethernet interface
297 *
298 * Creates a PHY device for the PHY at the given address, if one doesn't exist
299 * already, and associates it with the Ethernet device.
300 * The function may be called with addr <= 0, in this case addr value is ignored
301 * and the bus is scanned to detect a PHY. Scanning should only be used if only
302 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
303 * which PHY is returned.
304 *
305 * @bus: MII/MDIO bus that hosts the PHY
306 * @addr: PHY address on MDIO bus
307 * @dev: Ethernet device to associate to the PHY
308 * @interface: type of MAC-PHY interface
309 * @return pointer to phy_device if a PHY is found, or NULL otherwise
310 */
311 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
312 struct udevice *dev,
313 phy_interface_t interface);
314
phy_get_ofnode(struct phy_device * phydev)315 static inline ofnode phy_get_ofnode(struct phy_device *phydev)
316 {
317 if (ofnode_valid(phydev->node))
318 return phydev->node;
319 else
320 return dev_ofnode(phydev->dev);
321 }
322 #else
323
324 /**
325 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
326 * @phydev: PHY device
327 * @dev: Ethernet device
328 */
329 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
330
331 /**
332 * phy_connect() - Creates a PHY device for the Ethernet interface
333 *
334 * Creates a PHY device for the PHY at the given address, if one doesn't exist
335 * already, and associates it with the Ethernet device.
336 * The function may be called with addr <= 0, in this case addr value is ignored
337 * and the bus is scanned to detect a PHY. Scanning should only be used if only
338 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
339 * which PHY is returned.
340 *
341 * @bus: MII/MDIO bus that hosts the PHY
342 * @addr: PHY address on MDIO bus
343 * @dev: Ethernet device to associate to the PHY
344 * @interface: type of MAC-PHY interface
345 * @return pointer to phy_device if a PHY is found, or NULL otherwise
346 */
347 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
348 struct eth_device *dev,
349 phy_interface_t interface);
350
phy_get_ofnode(struct phy_device * phydev)351 static inline ofnode phy_get_ofnode(struct phy_device *phydev)
352 {
353 return ofnode_null();
354 }
355 #endif
356 int phy_startup(struct phy_device *phydev);
357 int phy_config(struct phy_device *phydev);
358 int phy_shutdown(struct phy_device *phydev);
359 int phy_register(struct phy_driver *drv);
360 int phy_set_supported(struct phy_device *phydev, u32 max_speed);
361 int genphy_config_aneg(struct phy_device *phydev);
362 int genphy_restart_aneg(struct phy_device *phydev);
363 int genphy_update_link(struct phy_device *phydev);
364 int genphy_parse_link(struct phy_device *phydev);
365 int genphy_config(struct phy_device *phydev);
366 int genphy_startup(struct phy_device *phydev);
367 int genphy_shutdown(struct phy_device *phydev);
368 int gen10g_config(struct phy_device *phydev);
369 int gen10g_startup(struct phy_device *phydev);
370 int gen10g_shutdown(struct phy_device *phydev);
371 int gen10g_discover_mmds(struct phy_device *phydev);
372
373 int phy_mv88e61xx_init(void);
374 int phy_aquantia_init(void);
375 int phy_atheros_init(void);
376 int phy_broadcom_init(void);
377 int phy_cortina_init(void);
378 int phy_davicom_init(void);
379 int phy_et1011c_init(void);
380 int phy_lxt_init(void);
381 int phy_marvell_init(void);
382 int phy_micrel_ksz8xxx_init(void);
383 int phy_micrel_ksz90x1_init(void);
384 int phy_natsemi_init(void);
385 int phy_realtek_init(void);
386 int phy_rk630_init(void);
387 int phy_smsc_init(void);
388 int phy_teranetics_init(void);
389 int phy_ti_init(void);
390 int phy_vitesse_init(void);
391 int phy_xilinx_init(void);
392 int phy_mscc_init(void);
393 int phy_fixed_init(void);
394
395 int board_phy_config(struct phy_device *phydev);
396 int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
397
398 /**
399 * phy_get_interface_by_name() - Look up a PHY interface name
400 *
401 * @str: PHY interface name, e.g. "mii"
402 * @return PHY_INTERFACE_MODE_... value, or -1 if not found
403 */
404 int phy_get_interface_by_name(const char *str);
405
406 /**
407 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
408 * is RGMII (all variants)
409 * @phydev: the phy_device struct
410 */
phy_interface_is_rgmii(struct phy_device * phydev)411 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
412 {
413 return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
414 phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
415 }
416
417 /**
418 * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
419 * is SGMII (all variants)
420 * @phydev: the phy_device struct
421 */
phy_interface_is_sgmii(struct phy_device * phydev)422 static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
423 {
424 return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
425 phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
426 }
427
428 /* PHY UIDs for various PHYs that are referenced in external code */
429 #define PHY_UID_CS4340 0x13e51002
430 #define PHY_UID_CS4223 0x03e57003
431 #define PHY_UID_TN2020 0x00a19410
432 #define PHY_UID_IN112525_S03 0x02107440
433
434 #endif
435