1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 /* 3 * 4 * (C) COPYRIGHT 2022 ARM Limited. All rights reserved. 5 * 6 * This program is free software and is provided to you under the terms of the 7 * GNU General Public License version 2 as published by the Free Software 8 * Foundation, and any use by you of this program is subject to the terms 9 * of such GNU license. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, you can access it online at 18 * http://www.gnu.org/licenses/gpl-2.0.html. 19 * 20 */ 21 22 #ifndef _KBASE_DEBUG_CORESIGHT_CSF_ 23 #define _KBASE_DEBUG_CORESIGHT_CSF_ 24 25 #include <linux/types.h> 26 #include <linux/list.h> 27 28 #define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_NOP 0U 29 #define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_WRITE_IMM 1U 30 #define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_WRITE_IMM_RANGE 2U 31 #define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_WRITE 3U 32 #define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_READ 4U 33 #define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_POLL 5U 34 #define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_BIT_OR 6U 35 #define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_BIT_XOR 7U 36 #define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_BIT_AND 8U 37 #define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_BIT_NOT 9U 38 39 /** 40 * struct kbase_debug_coresight_csf_write_imm_op - Coresight immediate write operation structure 41 * 42 * @reg_addr: Register address to write to. 43 * @val: Value to write at @reg_addr. 44 */ 45 struct kbase_debug_coresight_csf_write_imm_op { 46 __u32 reg_addr; 47 __u32 val; 48 }; 49 50 /** 51 * struct kbase_debug_coresight_csf_write_imm_range_op - Coresight immediate write range 52 * operation structure 53 * 54 * @reg_start: Register address to start writing from. 55 * @reg_end: Register address to stop writing from. End address included in the write range. 56 * @val: Value to write at @reg_addr. 57 */ 58 struct kbase_debug_coresight_csf_write_imm_range_op { 59 __u32 reg_start; 60 __u32 reg_end; 61 __u32 val; 62 }; 63 64 /** 65 * struct kbase_debug_coresight_csf_write_op - Coresight write operation structure 66 * 67 * @reg_addr: Register address to write to. 68 * @ptr: Pointer to the value to write at @reg_addr. 69 */ 70 struct kbase_debug_coresight_csf_write_op { 71 __u32 reg_addr; 72 __u32 *ptr; 73 }; 74 75 /** 76 * struct kbase_debug_coresight_csf_read_op - Coresight read operation structure 77 * 78 * @reg_addr: Register address to read. 79 * @ptr: Pointer where to store the read value. 80 */ 81 struct kbase_debug_coresight_csf_read_op { 82 __u32 reg_addr; 83 __u32 *ptr; 84 }; 85 86 /** 87 * struct kbase_debug_coresight_csf_poll_op - Coresight poll operation structure 88 * 89 * @reg_addr: Register address to poll. 90 * @val: Expected value after poll. 91 * @mask: Mask to apply on the read value from @reg_addr when comparing against @val. 92 */ 93 struct kbase_debug_coresight_csf_poll_op { 94 __u32 reg_addr; 95 __u32 val; 96 __u32 mask; 97 }; 98 99 /** 100 * struct kbase_debug_coresight_csf_bitw_op - Coresight bitwise operation structure 101 * 102 * @ptr: Pointer to the variable on which to execute the bit operation. 103 * @val: Value with which the operation should be executed against @ptr value. 104 */ 105 struct kbase_debug_coresight_csf_bitw_op { 106 __u32 *ptr; 107 __u32 val; 108 }; 109 110 /** 111 * struct kbase_debug_coresight_csf_op - Coresight supported operations 112 * 113 * @type: Operation type. 114 * @padding: Padding for 64bit alignment. 115 * @op: Operation union. 116 * @op.write_imm: Parameters for immediate write operation. 117 * @op.write_imm_range: Parameters for immediate range write operation. 118 * @op.write: Parameters for write operation. 119 * @op.read: Parameters for read operation. 120 * @op.poll: Parameters for poll operation. 121 * @op.bitw: Parameters for bitwise operation. 122 * @op.padding: Padding for 64bit alignment. 123 * 124 * All operation structures should include padding to ensure they are the same size. 125 */ 126 struct kbase_debug_coresight_csf_op { 127 __u8 type; 128 __u8 padding[7]; 129 union { 130 struct kbase_debug_coresight_csf_write_imm_op write_imm; 131 struct kbase_debug_coresight_csf_write_imm_range_op write_imm_range; 132 struct kbase_debug_coresight_csf_write_op write; 133 struct kbase_debug_coresight_csf_read_op read; 134 struct kbase_debug_coresight_csf_poll_op poll; 135 struct kbase_debug_coresight_csf_bitw_op bitw; 136 u32 padding[3]; 137 } op; 138 }; 139 140 /** 141 * struct kbase_debug_coresight_csf_sequence - Coresight sequence of operations 142 * 143 * @ops: Arrays containing Coresight operations. 144 * @nr_ops: Size of @ops. 145 */ 146 struct kbase_debug_coresight_csf_sequence { 147 struct kbase_debug_coresight_csf_op *ops; 148 int nr_ops; 149 }; 150 151 /** 152 * struct kbase_debug_coresight_csf_address_range - Coresight client address range 153 * 154 * @start: Start offset of the address range. 155 * @end: End offset of the address range. 156 */ 157 struct kbase_debug_coresight_csf_address_range { 158 __u32 start; 159 __u32 end; 160 }; 161 162 /** 163 * kbase_debug_coresight_csf_register - Register as a client for set ranges of MCU memory. 164 * 165 * @drv_data: Pointer to driver device data. 166 * @ranges: Pointer to an array of struct kbase_debug_coresight_csf_address_range 167 * that contains start and end addresses that the client will manage. 168 * @nr_ranges: Size of @ranges array. 169 * 170 * This function checks @ranges against current client claimed ranges. If there 171 * are no overlaps, a new client is created and added to the list. 172 * 173 * Return: A pointer of the registered client instance on success. NULL on failure. 174 */ 175 void *kbase_debug_coresight_csf_register(void *drv_data, 176 struct kbase_debug_coresight_csf_address_range *ranges, 177 int nr_ranges); 178 179 /** 180 * kbase_debug_coresight_csf_unregister - Removes a coresight client. 181 * 182 * @client_data: A pointer to a coresight client. 183 * 184 * This function removes a client from the client list and frees the client struct. 185 */ 186 void kbase_debug_coresight_csf_unregister(void *client_data); 187 188 /** 189 * kbase_debug_coresight_csf_config_create - Creates a configuration containing 190 * enable and disable sequence. 191 * 192 * @client_data: Pointer to a coresight client. 193 * @enable_seq: Pointer to a struct containing the ops needed to enable coresight blocks. 194 * It's optional so could be NULL. 195 * @disable_seq: Pointer to a struct containing ops to run to disable coresight blocks. 196 * It's optional so could be NULL. 197 * 198 * Return: Valid pointer on success. NULL on failure. 199 */ 200 void * 201 kbase_debug_coresight_csf_config_create(void *client_data, 202 struct kbase_debug_coresight_csf_sequence *enable_seq, 203 struct kbase_debug_coresight_csf_sequence *disable_seq); 204 /** 205 * kbase_debug_coresight_csf_config_free - Frees a configuration containing 206 * enable and disable sequence. 207 * 208 * @config_data: Pointer to a coresight configuration. 209 */ 210 void kbase_debug_coresight_csf_config_free(void *config_data); 211 212 /** 213 * kbase_debug_coresight_csf_config_enable - Enables a coresight configuration 214 * 215 * @config_data: Pointer to coresight configuration. 216 * 217 * If GPU is turned on, the configuration is immediately applied the CoreSight blocks. 218 * If the GPU is turned off, the configuration is scheduled to be applied on the next 219 * time the GPU is turned on. 220 * 221 * A configuration is enabled by executing read/write/poll ops defined in config->enable_seq. 222 * 223 * Return: 0 if success. Error code on failure. 224 */ 225 int kbase_debug_coresight_csf_config_enable(void *config_data); 226 /** 227 * kbase_debug_coresight_csf_config_disable - Disables a coresight configuration 228 * 229 * @config_data: Pointer to coresight configuration. 230 * 231 * If the GPU is turned off, this is effective a NOP as kbase should have disabled 232 * the configuration when GPU is off. 233 * If the GPU is on, the configuration will be disabled. 234 * 235 * A configuration is disabled by executing read/write/poll ops defined in config->disable_seq. 236 * 237 * Return: 0 if success. Error code on failure. 238 */ 239 int kbase_debug_coresight_csf_config_disable(void *config_data); 240 241 #endif /* _KBASE_DEBUG_CORESIGHT_CSF_ */ 242