1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __HALBTC_OUT_SRC_H__ 3 #define __HALBTC_OUT_SRC_H__ 4 5 6 #define BTC_COEX_OFFLOAD 0 7 #define BTC_TMP_BUF_SHORT 20 8 9 extern u1Byte gl_btc_trace_buf[]; 10 #define BTC_SPRINTF rsprintf 11 #define BTC_TRACE(_MSG_)\ 12 do {\ 13 if (GLBtcDbgType[COMP_COEX] & BIT(DBG_LOUD)) {\ 14 RTW_INFO("%s", _MSG_);\ 15 } \ 16 } while (0) 17 #define BT_PrintData(adapter, _MSG_, len, data) RTW_DBG_DUMP((_MSG_), data, len) 18 19 20 #define NORMAL_EXEC FALSE 21 #define FORCE_EXEC TRUE 22 23 #define BTC_RF_OFF 0x0 24 #define BTC_RF_ON 0x1 25 26 #define BTC_RF_A 0x0 27 #define BTC_RF_B 0x1 28 #define BTC_RF_C 0x2 29 #define BTC_RF_D 0x3 30 31 #define BTC_SMSP SINGLEMAC_SINGLEPHY 32 #define BTC_DMDP DUALMAC_DUALPHY 33 #define BTC_DMSP DUALMAC_SINGLEPHY 34 #define BTC_MP_UNKNOWN 0xff 35 36 #define BT_COEX_ANT_TYPE_PG 0 37 #define BT_COEX_ANT_TYPE_ANTDIV 1 38 #define BT_COEX_ANT_TYPE_DETECTED 2 39 40 #define BTC_MIMO_PS_STATIC 0 /* 1ss */ 41 #define BTC_MIMO_PS_DYNAMIC 1 /* 2ss */ 42 43 #define BTC_RATE_DISABLE 0 44 #define BTC_RATE_ENABLE 1 45 46 /* single Antenna definition */ 47 #define BTC_ANT_PATH_WIFI 0 48 #define BTC_ANT_PATH_BT 1 49 #define BTC_ANT_PATH_PTA 2 50 #define BTC_ANT_PATH_WIFI5G 3 51 #define BTC_ANT_PATH_AUTO 4 52 /* dual Antenna definition */ 53 #define BTC_ANT_WIFI_AT_MAIN 0 54 #define BTC_ANT_WIFI_AT_AUX 1 55 #define BTC_ANT_WIFI_AT_DIVERSITY 2 56 /* coupler Antenna definition */ 57 #define BTC_ANT_WIFI_AT_CPL_MAIN 0 58 #define BTC_ANT_WIFI_AT_CPL_AUX 1 59 60 typedef enum _BTC_POWERSAVE_TYPE { 61 BTC_PS_WIFI_NATIVE = 0, /* wifi original power save behavior */ 62 BTC_PS_LPS_ON = 1, 63 BTC_PS_LPS_OFF = 2, 64 BTC_PS_MAX 65 } BTC_POWERSAVE_TYPE, *PBTC_POWERSAVE_TYPE; 66 67 typedef enum _BTC_BT_REG_TYPE { 68 BTC_BT_REG_RF = 0, 69 BTC_BT_REG_MODEM = 1, 70 BTC_BT_REG_BLUEWIZE = 2, 71 BTC_BT_REG_VENDOR = 3, 72 BTC_BT_REG_LE = 4, 73 BTC_BT_REG_MAX 74 } BTC_BT_REG_TYPE, *PBTC_BT_REG_TYPE; 75 76 typedef enum _BTC_CHIP_INTERFACE { 77 BTC_INTF_UNKNOWN = 0, 78 BTC_INTF_PCI = 1, 79 BTC_INTF_USB = 2, 80 BTC_INTF_SDIO = 3, 81 BTC_INTF_MAX 82 } BTC_CHIP_INTERFACE, *PBTC_CHIP_INTERFACE; 83 84 typedef enum _BTC_CHIP_TYPE { 85 BTC_CHIP_UNDEF = 0, 86 BTC_CHIP_CSR_BC4 = 1, 87 BTC_CHIP_CSR_BC8 = 2, 88 BTC_CHIP_RTL8723A = 3, 89 BTC_CHIP_RTL8821 = 4, 90 BTC_CHIP_RTL8723B = 5, 91 BTC_CHIP_MAX 92 } BTC_CHIP_TYPE, *PBTC_CHIP_TYPE; 93 94 /* following is for wifi link status */ 95 #define WIFI_STA_CONNECTED BIT0 96 #define WIFI_AP_CONNECTED BIT1 97 #define WIFI_HS_CONNECTED BIT2 98 #define WIFI_P2P_GO_CONNECTED BIT3 99 #define WIFI_P2P_GC_CONNECTED BIT4 100 101 /* following is for command line utility */ 102 #define CL_SPRINTF rsprintf 103 #define CL_PRINTF DCMD_Printf 104 105 struct btc_board_info { 106 /* The following is some board information */ 107 u8 bt_chip_type; 108 u8 pg_ant_num; /* pg ant number */ 109 u8 btdm_ant_num; /* ant number for btdm */ 110 u8 btdm_ant_num_by_ant_det; /* ant number for btdm after antenna detection */ 111 u8 btdm_ant_pos; /* Bryant Add to indicate Antenna Position for (pg_ant_num = 2) && (btdm_ant_num =1) (DPDT+1Ant case) */ 112 u8 single_ant_path; /* current used for 8723b only, 1=>s0, 0=>s1 */ 113 boolean tfbga_package; /* for Antenna detect threshold */ 114 boolean btdm_ant_det_finish; 115 boolean btdm_ant_det_already_init_phydm; 116 u8 ant_type; 117 u8 rfe_type; 118 u8 ant_div_cfg; 119 boolean btdm_ant_det_complete_fail; 120 u8 ant_det_result; 121 boolean ant_det_result_five_complete; 122 u32 antdetval; 123 }; 124 125 typedef enum _BTC_DBG_OPCODE { 126 BTC_DBG_SET_COEX_NORMAL = 0x0, 127 BTC_DBG_SET_COEX_WIFI_ONLY = 0x1, 128 BTC_DBG_SET_COEX_BT_ONLY = 0x2, 129 BTC_DBG_SET_COEX_DEC_BT_PWR = 0x3, 130 BTC_DBG_SET_COEX_BT_AFH_MAP = 0x4, 131 BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT = 0x5, 132 BTC_DBG_SET_COEX_MANUAL_CTRL = 0x6, 133 BTC_DBG_MAX 134 } BTC_DBG_OPCODE, *PBTC_DBG_OPCODE; 135 136 typedef enum _BTC_RSSI_STATE { 137 BTC_RSSI_STATE_HIGH = 0x0, 138 BTC_RSSI_STATE_MEDIUM = 0x1, 139 BTC_RSSI_STATE_LOW = 0x2, 140 BTC_RSSI_STATE_STAY_HIGH = 0x3, 141 BTC_RSSI_STATE_STAY_MEDIUM = 0x4, 142 BTC_RSSI_STATE_STAY_LOW = 0x5, 143 BTC_RSSI_MAX 144 } BTC_RSSI_STATE, *PBTC_RSSI_STATE; 145 #define BTC_RSSI_HIGH(_rssi_) ((_rssi_ == BTC_RSSI_STATE_HIGH || _rssi_ == BTC_RSSI_STATE_STAY_HIGH) ? TRUE:FALSE) 146 #define BTC_RSSI_MEDIUM(_rssi_) ((_rssi_ == BTC_RSSI_STATE_MEDIUM || _rssi_ == BTC_RSSI_STATE_STAY_MEDIUM) ? TRUE:FALSE) 147 #define BTC_RSSI_LOW(_rssi_) ((_rssi_ == BTC_RSSI_STATE_LOW || _rssi_ == BTC_RSSI_STATE_STAY_LOW) ? TRUE:FALSE) 148 149 typedef enum _BTC_WIFI_ROLE { 150 BTC_ROLE_STATION = 0x0, 151 BTC_ROLE_AP = 0x1, 152 BTC_ROLE_IBSS = 0x2, 153 BTC_ROLE_HS_MODE = 0x3, 154 BTC_ROLE_MAX 155 } BTC_WIFI_ROLE, *PBTC_WIFI_ROLE; 156 157 typedef enum _BTC_WIRELESS_FREQ { 158 BTC_FREQ_2_4G = 0x0, 159 BTC_FREQ_5G = 0x1, 160 BTC_FREQ_MAX 161 } BTC_WIRELESS_FREQ, *PBTC_WIRELESS_FREQ; 162 163 typedef enum _BTC_WIFI_BW_MODE { 164 BTC_WIFI_BW_LEGACY = 0x0, 165 BTC_WIFI_BW_HT20 = 0x1, 166 BTC_WIFI_BW_HT40 = 0x2, 167 BTC_WIFI_BW_HT80 = 0x3, 168 BTC_WIFI_BW_HT160 = 0x4, 169 BTC_WIFI_BW_MAX 170 } BTC_WIFI_BW_MODE, *PBTC_WIFI_BW_MODE; 171 172 typedef enum _BTC_WIFI_TRAFFIC_DIR { 173 BTC_WIFI_TRAFFIC_TX = 0x0, 174 BTC_WIFI_TRAFFIC_RX = 0x1, 175 BTC_WIFI_TRAFFIC_MAX 176 } BTC_WIFI_TRAFFIC_DIR, *PBTC_WIFI_TRAFFIC_DIR; 177 178 typedef enum _BTC_WIFI_PNP { 179 BTC_WIFI_PNP_WAKE_UP = 0x0, 180 BTC_WIFI_PNP_SLEEP = 0x1, 181 BTC_WIFI_PNP_SLEEP_KEEP_ANT = 0x2, 182 BTC_WIFI_PNP_MAX 183 } BTC_WIFI_PNP, *PBTC_WIFI_PNP; 184 185 typedef enum _BTC_IOT_PEER { 186 BTC_IOT_PEER_UNKNOWN = 0, 187 BTC_IOT_PEER_REALTEK = 1, 188 BTC_IOT_PEER_REALTEK_92SE = 2, 189 BTC_IOT_PEER_BROADCOM = 3, 190 BTC_IOT_PEER_RALINK = 4, 191 BTC_IOT_PEER_ATHEROS = 5, 192 BTC_IOT_PEER_CISCO = 6, 193 BTC_IOT_PEER_MERU = 7, 194 BTC_IOT_PEER_MARVELL = 8, 195 BTC_IOT_PEER_REALTEK_SOFTAP = 9, /* peer is RealTek SOFT_AP, by Bohn, 2009.12.17 */ 196 BTC_IOT_PEER_SELF_SOFTAP = 10, /* Self is SoftAP */ 197 BTC_IOT_PEER_AIRGO = 11, 198 BTC_IOT_PEER_INTEL = 12, 199 BTC_IOT_PEER_RTK_APCLIENT = 13, 200 BTC_IOT_PEER_REALTEK_81XX = 14, 201 BTC_IOT_PEER_REALTEK_WOW = 15, 202 BTC_IOT_PEER_REALTEK_JAGUAR_BCUTAP = 16, 203 BTC_IOT_PEER_REALTEK_JAGUAR_CCUTAP = 17, 204 BTC_IOT_PEER_MAX, 205 } BTC_IOT_PEER, *PBTC_IOT_PEER; 206 207 /* for 8723b-d cut large current issue */ 208 typedef enum _BTC_WIFI_COEX_STATE { 209 BTC_WIFI_STAT_INIT, 210 BTC_WIFI_STAT_IQK, 211 BTC_WIFI_STAT_NORMAL_OFF, 212 BTC_WIFI_STAT_MP_OFF, 213 BTC_WIFI_STAT_NORMAL, 214 BTC_WIFI_STAT_ANT_DIV, 215 BTC_WIFI_STAT_MAX 216 } BTC_WIFI_COEX_STATE, *PBTC_WIFI_COEX_STATE; 217 218 typedef enum _BTC_ANT_TYPE { 219 BTC_ANT_TYPE_0, 220 BTC_ANT_TYPE_1, 221 BTC_ANT_TYPE_2, 222 BTC_ANT_TYPE_3, 223 BTC_ANT_TYPE_4, 224 BTC_ANT_TYPE_MAX 225 } BTC_ANT_TYPE, *PBTC_ANT_TYPE; 226 227 typedef enum _BTC_VENDOR { 228 BTC_VENDOR_LENOVO, 229 BTC_VENDOR_ASUS, 230 BTC_VENDOR_OTHER 231 } BTC_VENDOR, *PBTC_VENDOR; 232 233 234 /* defined for BFP_BTC_GET */ 235 typedef enum _BTC_GET_TYPE { 236 /* type BOOLEAN */ 237 BTC_GET_BL_HS_OPERATION, 238 BTC_GET_BL_HS_CONNECTING, 239 BTC_GET_BL_WIFI_FW_READY, 240 BTC_GET_BL_WIFI_CONNECTED, 241 BTC_GET_BL_WIFI_BUSY, 242 BTC_GET_BL_WIFI_SCAN, 243 BTC_GET_BL_WIFI_LINK, 244 BTC_GET_BL_WIFI_ROAM, 245 BTC_GET_BL_WIFI_4_WAY_PROGRESS, 246 BTC_GET_BL_WIFI_UNDER_5G, 247 BTC_GET_BL_WIFI_AP_MODE_ENABLE, 248 BTC_GET_BL_WIFI_ENABLE_ENCRYPTION, 249 BTC_GET_BL_WIFI_UNDER_B_MODE, 250 BTC_GET_BL_EXT_SWITCH, 251 BTC_GET_BL_WIFI_IS_IN_MP_MODE, 252 BTC_GET_BL_IS_ASUS_8723B, 253 BTC_GET_BL_RF4CE_CONNECTED, 254 255 /* type s4Byte */ 256 BTC_GET_S4_WIFI_RSSI, 257 BTC_GET_S4_HS_RSSI, 258 259 /* type u4Byte */ 260 BTC_GET_U4_WIFI_BW, 261 BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, 262 BTC_GET_U4_WIFI_FW_VER, 263 BTC_GET_U4_WIFI_LINK_STATUS, 264 BTC_GET_U4_BT_PATCH_VER, 265 BTC_GET_U4_VENDOR, 266 BTC_GET_U4_SUPPORTED_VERSION, 267 BTC_GET_U4_SUPPORTED_FEATURE, 268 BTC_GET_U4_WIFI_IQK_TOTAL, 269 BTC_GET_U4_WIFI_IQK_OK, 270 BTC_GET_U4_WIFI_IQK_FAIL, 271 272 /* type u1Byte */ 273 BTC_GET_U1_WIFI_DOT11_CHNL, 274 BTC_GET_U1_WIFI_CENTRAL_CHNL, 275 BTC_GET_U1_WIFI_HS_CHNL, 276 BTC_GET_U1_WIFI_P2P_CHNL, 277 BTC_GET_U1_MAC_PHY_MODE, 278 BTC_GET_U1_AP_NUM, 279 BTC_GET_U1_ANT_TYPE, 280 BTC_GET_U1_IOT_PEER, 281 282 /*===== for 1Ant ======*/ 283 BTC_GET_U1_LPS_MODE, 284 285 BTC_GET_MAX 286 } BTC_GET_TYPE, *PBTC_GET_TYPE; 287 288 /* defined for BFP_BTC_SET */ 289 typedef enum _BTC_SET_TYPE { 290 /* type BOOLEAN */ 291 BTC_SET_BL_BT_DISABLE, 292 BTC_SET_BL_BT_ENABLE_DISABLE_CHANGE, 293 BTC_SET_BL_BT_TRAFFIC_BUSY, 294 BTC_SET_BL_BT_LIMITED_DIG, 295 BTC_SET_BL_FORCE_TO_ROAM, 296 BTC_SET_BL_TO_REJ_AP_AGG_PKT, 297 BTC_SET_BL_BT_CTRL_AGG_SIZE, 298 BTC_SET_BL_INC_SCAN_DEV_NUM, 299 BTC_SET_BL_BT_TX_RX_MASK, 300 BTC_SET_BL_MIRACAST_PLUS_BT, 301 302 /* type u1Byte */ 303 BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, 304 BTC_SET_U1_AGG_BUF_SIZE, 305 306 /* type trigger some action */ 307 BTC_SET_ACT_GET_BT_RSSI, 308 BTC_SET_ACT_AGGREGATE_CTRL, 309 BTC_SET_ACT_ANTPOSREGRISTRY_CTRL, 310 /*===== for 1Ant ======*/ 311 /* type BOOLEAN */ 312 313 /* type u1Byte */ 314 BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, 315 BTC_SET_U1_LPS_VAL, 316 BTC_SET_U1_RPWM_VAL, 317 /* type trigger some action */ 318 BTC_SET_ACT_LEAVE_LPS, 319 BTC_SET_ACT_ENTER_LPS, 320 BTC_SET_ACT_NORMAL_LPS, 321 BTC_SET_ACT_DISABLE_LOW_POWER, 322 BTC_SET_ACT_UPDATE_RAMASK, 323 BTC_SET_ACT_SEND_MIMO_PS, 324 /* BT Coex related */ 325 BTC_SET_ACT_CTRL_BT_INFO, 326 BTC_SET_ACT_CTRL_BT_COEX, 327 BTC_SET_ACT_CTRL_8723B_ANT, 328 /*=================*/ 329 BTC_SET_MAX 330 } BTC_SET_TYPE, *PBTC_SET_TYPE; 331 332 typedef enum _BTC_DBG_DISP_TYPE { 333 BTC_DBG_DISP_COEX_STATISTICS = 0x0, 334 BTC_DBG_DISP_BT_LINK_INFO = 0x1, 335 BTC_DBG_DISP_WIFI_STATUS = 0x2, 336 BTC_DBG_DISP_MAX 337 } BTC_DBG_DISP_TYPE, *PBTC_DBG_DISP_TYPE; 338 339 typedef enum _BTC_NOTIFY_TYPE_IPS { 340 BTC_IPS_LEAVE = 0x0, 341 BTC_IPS_ENTER = 0x1, 342 BTC_IPS_MAX 343 } BTC_NOTIFY_TYPE_IPS, *PBTC_NOTIFY_TYPE_IPS; 344 typedef enum _BTC_NOTIFY_TYPE_LPS { 345 BTC_LPS_DISABLE = 0x0, 346 BTC_LPS_ENABLE = 0x1, 347 BTC_LPS_MAX 348 } BTC_NOTIFY_TYPE_LPS, *PBTC_NOTIFY_TYPE_LPS; 349 typedef enum _BTC_NOTIFY_TYPE_SCAN { 350 BTC_SCAN_FINISH = 0x0, 351 BTC_SCAN_START = 0x1, 352 BTC_SCAN_START_2G = 0x2, 353 BTC_SCAN_MAX 354 } BTC_NOTIFY_TYPE_SCAN, *PBTC_NOTIFY_TYPE_SCAN; 355 typedef enum _BTC_NOTIFY_TYPE_SWITCHBAND { 356 BTC_NOT_SWITCH = 0x0, 357 BTC_SWITCH_TO_24G = 0x1, 358 BTC_SWITCH_TO_5G = 0x2, 359 BTC_SWITCH_TO_24G_NOFORSCAN = 0x3, 360 BTC_SWITCH_MAX 361 } BTC_NOTIFY_TYPE_SWITCHBAND, *PBTC_NOTIFY_TYPE_SWITCHBAND; 362 typedef enum _BTC_NOTIFY_TYPE_ASSOCIATE { 363 BTC_ASSOCIATE_FINISH = 0x0, 364 BTC_ASSOCIATE_START = 0x1, 365 BTC_ASSOCIATE_5G_FINISH = 0x2, 366 BTC_ASSOCIATE_5G_START = 0x3, 367 BTC_ASSOCIATE_MAX 368 } BTC_NOTIFY_TYPE_ASSOCIATE, *PBTC_NOTIFY_TYPE_ASSOCIATE; 369 typedef enum _BTC_NOTIFY_TYPE_MEDIA_STATUS { 370 BTC_MEDIA_DISCONNECT = 0x0, 371 BTC_MEDIA_CONNECT = 0x1, 372 BTC_MEDIA_MAX 373 } BTC_NOTIFY_TYPE_MEDIA_STATUS, *PBTC_NOTIFY_TYPE_MEDIA_STATUS; 374 typedef enum _BTC_NOTIFY_TYPE_SPECIFIC_PACKET { 375 BTC_PACKET_UNKNOWN = 0x0, 376 BTC_PACKET_DHCP = 0x1, 377 BTC_PACKET_ARP = 0x2, 378 BTC_PACKET_EAPOL = 0x3, 379 BTC_PACKET_MAX 380 } BTC_NOTIFY_TYPE_SPECIFIC_PACKET, *PBTC_NOTIFY_TYPE_SPECIFIC_PACKET; 381 typedef enum _BTC_NOTIFY_TYPE_STACK_OPERATION { 382 BTC_STACK_OP_NONE = 0x0, 383 BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1, 384 BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2, 385 BTC_STACK_OP_MAX 386 } BTC_NOTIFY_TYPE_STACK_OPERATION, *PBTC_NOTIFY_TYPE_STACK_OPERATION; 387 388 /* Bryant Add */ 389 typedef enum _BTC_ANTENNA_POS { 390 BTC_ANTENNA_AT_MAIN_PORT = 0x1, 391 BTC_ANTENNA_AT_AUX_PORT = 0x2, 392 } BTC_ANTENNA_POS, *PBTC_ANTENNA_POS; 393 394 /* Bryant Add */ 395 typedef enum _BTC_BT_OFFON { 396 BTC_BT_OFF = 0x0, 397 BTC_BT_ON = 0x1, 398 } BTC_BTOFFON, *PBTC_BT_OFFON; 399 400 /*================================================== 401 For following block is for coex offload 402 ==================================================*/ 403 typedef struct _COL_H2C { 404 u1Byte opcode; 405 u1Byte opcode_ver:4; 406 u1Byte req_num:4; 407 u1Byte buf[1]; 408 } COL_H2C, *PCOL_H2C; 409 410 #define COL_C2H_ACK_HDR_LEN 3 411 typedef struct _COL_C2H_ACK { 412 u1Byte status; 413 u1Byte opcode_ver:4; 414 u1Byte req_num:4; 415 u1Byte ret_len; 416 u1Byte buf[1]; 417 } COL_C2H_ACK, *PCOL_C2H_ACK; 418 419 #define COL_C2H_IND_HDR_LEN 3 420 typedef struct _COL_C2H_IND { 421 u1Byte type; 422 u1Byte version; 423 u1Byte length; 424 u1Byte data[1]; 425 } COL_C2H_IND, *PCOL_C2H_IND; 426 427 /*============================================ 428 NOTE: for debug message, the following define should match 429 the strings in coexH2cResultString. 430 ============================================*/ 431 typedef enum _COL_H2C_STATUS { 432 /* c2h status */ 433 COL_STATUS_C2H_OK = 0x00, /* Wifi received H2C request and check content ok. */ 434 COL_STATUS_C2H_UNKNOWN = 0x01, /* Not handled routine */ 435 COL_STATUS_C2H_UNKNOWN_OPCODE = 0x02, /* Invalid OP code, It means that wifi firmware received an undefiend OP code. */ 436 COL_STATUS_C2H_OPCODE_VER_MISMATCH = 0x03, /* Wifi firmware and wifi driver mismatch, need to update wifi driver or wifi or. */ 437 COL_STATUS_C2H_PARAMETER_ERROR = 0x04, /* Error paraneter.(ex: parameters = NULL but it should have values) */ 438 COL_STATUS_C2H_PARAMETER_OUT_OF_RANGE = 0x05, /* Wifi firmware needs to check the parameters from H2C request and return the status.(ex: ch = 500, it's wrong) */ 439 /* other COL status start from here */ 440 COL_STATUS_C2H_REQ_NUM_MISMATCH , /* c2h req_num mismatch, means this c2h is not we expected. */ 441 COL_STATUS_H2C_HALMAC_FAIL , /* HALMAC return fail. */ 442 COL_STATUS_H2C_TIMTOUT , /* not received the c2h response from fw */ 443 COL_STATUS_INVALID_C2H_LEN , /* invalid coex offload c2h ack length, must >= 3 */ 444 COL_STATUS_COEX_DATA_OVERFLOW , /* coex returned length over the c2h ack length. */ 445 COL_STATUS_MAX 446 } COL_H2C_STATUS, *PCOL_H2C_STATUS; 447 448 #define COL_MAX_H2C_REQ_NUM 16 449 450 #define COL_H2C_BUF_LEN 20 451 typedef enum _COL_OPCODE { 452 COL_OP_WIFI_STATUS_NOTIFY = 0x0, 453 COL_OP_WIFI_PROGRESS_NOTIFY = 0x1, 454 COL_OP_WIFI_INFO_NOTIFY = 0x2, 455 COL_OP_WIFI_POWER_STATE_NOTIFY = 0x3, 456 COL_OP_SET_CONTROL = 0x4, 457 COL_OP_GET_CONTROL = 0x5, 458 COL_OP_WIFI_OPCODE_MAX 459 } COL_OPCODE, *PCOL_OPCODE; 460 461 typedef enum _COL_IND_TYPE { 462 COL_IND_BT_INFO = 0x0, 463 COL_IND_PSTDMA = 0x1, 464 COL_IND_LIMITED_TX_RX = 0x2, 465 COL_IND_COEX_TABLE = 0x3, 466 COL_IND_REQ = 0x4, 467 COL_IND_MAX 468 } COL_IND_TYPE, *PCOL_IND_TYPE; 469 470 typedef struct _COL_SINGLE_H2C_RECORD { 471 u1Byte h2c_buf[COL_H2C_BUF_LEN]; /* the latest sent h2c buffer */ 472 u4Byte h2c_len; 473 u1Byte c2h_ack_buf[COL_H2C_BUF_LEN]; /* the latest received c2h buffer */ 474 u4Byte c2h_ack_len; 475 u4Byte count; /* the total number of the sent h2c command */ 476 u4Byte status[COL_STATUS_MAX]; /* the c2h status for the sent h2c command */ 477 } COL_SINGLE_H2C_RECORD, *PCOL_SINGLE_H2C_RECORD; 478 479 typedef struct _COL_SINGLE_C2H_IND_RECORD { 480 u1Byte ind_buf[COL_H2C_BUF_LEN]; /* the latest received c2h indication buffer */ 481 u4Byte ind_len; 482 u4Byte count; /* the total number of the rcvd c2h indication */ 483 u4Byte status[COL_STATUS_MAX]; /* the c2h indication verified status */ 484 } COL_SINGLE_C2H_IND_RECORD, *PCOL_SINGLE_C2H_IND_RECORD; 485 486 typedef struct _BTC_OFFLOAD { 487 /* H2C command related */ 488 u1Byte h2c_req_num; 489 u4Byte cnt_h2c_sent; 490 COL_SINGLE_H2C_RECORD h2c_record[COL_OP_WIFI_OPCODE_MAX]; 491 492 /* C2H Ack related */ 493 u4Byte cnt_c2h_ack; 494 u4Byte status[COL_STATUS_MAX]; 495 struct completion c2h_event[COL_MAX_H2C_REQ_NUM]; /* for req_num = 1~COL_MAX_H2C_REQ_NUM */ 496 u1Byte c2h_ack_buf[COL_MAX_H2C_REQ_NUM][COL_H2C_BUF_LEN]; 497 u1Byte c2h_ack_len[COL_MAX_H2C_REQ_NUM]; 498 499 /* C2H Indication related */ 500 u4Byte cnt_c2h_ind; 501 COL_SINGLE_C2H_IND_RECORD c2h_ind_record[COL_IND_MAX]; 502 u4Byte c2h_ind_status[COL_STATUS_MAX]; 503 u1Byte c2h_ind_buf[COL_H2C_BUF_LEN]; 504 u1Byte c2h_ind_len; 505 } BTC_OFFLOAD, *PBTC_OFFLOAD; 506 extern BTC_OFFLOAD gl_coex_offload; 507 /*==================================================*/ 508 509 typedef u1Byte 510 (*BFP_BTC_R1)( 511 IN PVOID pBtcContext, 512 IN u4Byte RegAddr 513 ); 514 typedef u2Byte 515 (*BFP_BTC_R2)( 516 IN PVOID pBtcContext, 517 IN u4Byte RegAddr 518 ); 519 typedef u4Byte 520 (*BFP_BTC_R4)( 521 IN PVOID pBtcContext, 522 IN u4Byte RegAddr 523 ); 524 typedef VOID 525 (*BFP_BTC_W1)( 526 IN PVOID pBtcContext, 527 IN u4Byte RegAddr, 528 IN u1Byte Data 529 ); 530 typedef VOID 531 (*BFP_BTC_W1_BIT_MASK)( 532 IN PVOID pBtcContext, 533 IN u4Byte regAddr, 534 IN u1Byte bitMask, 535 IN u1Byte data1b 536 ); 537 typedef VOID 538 (*BFP_BTC_W2)( 539 IN PVOID pBtcContext, 540 IN u4Byte RegAddr, 541 IN u2Byte Data 542 ); 543 typedef VOID 544 (*BFP_BTC_W4)( 545 IN PVOID pBtcContext, 546 IN u4Byte RegAddr, 547 IN u4Byte Data 548 ); 549 typedef VOID 550 (*BFP_BTC_LOCAL_REG_W1)( 551 IN PVOID pBtcContext, 552 IN u4Byte RegAddr, 553 IN u1Byte Data 554 ); 555 typedef VOID 556 (*BFP_BTC_SET_BB_REG)( 557 IN PVOID pBtcContext, 558 IN u4Byte RegAddr, 559 IN u4Byte BitMask, 560 IN u4Byte Data 561 ); 562 typedef u4Byte 563 (*BFP_BTC_GET_BB_REG)( 564 IN PVOID pBtcContext, 565 IN u4Byte RegAddr, 566 IN u4Byte BitMask 567 ); 568 typedef VOID 569 (*BFP_BTC_SET_RF_REG)( 570 IN PVOID pBtcContext, 571 IN u1Byte eRFPath, 572 IN u4Byte RegAddr, 573 IN u4Byte BitMask, 574 IN u4Byte Data 575 ); 576 typedef u4Byte 577 (*BFP_BTC_GET_RF_REG)( 578 IN PVOID pBtcContext, 579 IN u1Byte eRFPath, 580 IN u4Byte RegAddr, 581 IN u4Byte BitMask 582 ); 583 typedef VOID 584 (*BFP_BTC_FILL_H2C)( 585 IN PVOID pBtcContext, 586 IN u1Byte elementId, 587 IN u4Byte cmdLen, 588 IN pu1Byte pCmdBuffer 589 ); 590 591 typedef BOOLEAN 592 (*BFP_BTC_GET)( 593 IN PVOID pBtCoexist, 594 IN u1Byte getType, 595 OUT PVOID pOutBuf 596 ); 597 598 typedef BOOLEAN 599 (*BFP_BTC_SET)( 600 IN PVOID pBtCoexist, 601 IN u1Byte setType, 602 OUT PVOID pInBuf 603 ); 604 typedef u2Byte 605 (*BFP_BTC_SET_BT_REG)( 606 IN PVOID pBtcContext, 607 IN u1Byte regType, 608 IN u4Byte offset, 609 IN u4Byte value 610 ); 611 typedef BOOLEAN 612 (*BFP_BTC_SET_BT_ANT_DETECTION)( 613 IN PVOID pBtcContext, 614 IN u1Byte txTime, 615 IN u1Byte btChnl 616 ); 617 618 typedef BOOLEAN 619 (*BFP_BTC_SET_BT_TRX_MASK)( 620 IN PVOID pBtcContext, 621 IN u1Byte bt_trx_mask 622 ); 623 624 typedef u4Byte 625 (*BFP_BTC_GET_BT_REG)( 626 IN PVOID pBtcContext, 627 IN u1Byte regType, 628 IN u4Byte offset 629 ); 630 typedef VOID 631 (*BFP_BTC_DISP_DBG_MSG)( 632 IN PVOID pBtCoexist, 633 IN u1Byte dispType 634 ); 635 636 typedef COL_H2C_STATUS 637 (*BFP_BTC_COEX_H2C_PROCESS)( 638 IN PVOID pBtCoexist, 639 IN u1Byte opcode, 640 IN u1Byte opcode_ver, 641 IN pu1Byte ph2c_par, 642 IN u1Byte h2c_par_len 643 ); 644 645 typedef u4Byte 646 (*BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE)( 647 IN PVOID pBtcContext 648 ); 649 650 typedef u4Byte 651 (*BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION)( 652 IN PVOID pBtcContext 653 ); 654 655 typedef u4Byte 656 (*BFP_BTC_GET_PHYDM_VERSION)( 657 IN PVOID pBtcContext 658 ); 659 660 typedef VOID 661 (*BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD)( 662 IN PVOID pDM_Odm, 663 IN u1Byte RA_offset_direction, 664 IN u1Byte RA_threshold_offset 665 ); 666 667 typedef u4Byte 668 (*BTC_PHYDM_CMNINFOQUERY)( 669 IN PVOID pDM_Odm, 670 IN u1Byte info_type 671 ); 672 673 typedef u1Byte 674 (*BFP_BTC_GET_ANT_DET_VAL_FROM_BT)( 675 IN PVOID pBtcContext 676 ); 677 678 typedef u1Byte 679 (*BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT)( 680 IN PVOID pBtcContext 681 ); 682 683 typedef u4Byte 684 (*BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT)( 685 IN PVOID pBtcContext, 686 IN u1Byte scanType 687 ); 688 689 struct btc_bt_info { 690 boolean bt_disabled; 691 boolean bt_enable_disable_change; 692 u8 rssi_adjust_for_agc_table_on; 693 u8 rssi_adjust_for_1ant_coex_type; 694 boolean pre_bt_ctrl_agg_buf_size; 695 boolean bt_ctrl_agg_buf_size; 696 boolean pre_reject_agg_pkt; 697 boolean reject_agg_pkt; 698 boolean increase_scan_dev_num; 699 boolean bt_tx_rx_mask; 700 u8 pre_agg_buf_size; 701 u8 agg_buf_size; 702 boolean bt_busy; 703 boolean limited_dig; 704 u16 bt_hci_ver; 705 u16 bt_real_fw_ver; 706 u8 bt_fw_ver; 707 u32 get_bt_fw_ver_cnt; 708 u32 bt_get_fw_ver; 709 boolean miracast_plus_bt; 710 711 boolean bt_disable_low_pwr; 712 713 boolean bt_ctrl_lps; 714 boolean bt_lps_on; 715 boolean force_to_roam; /* for 1Ant solution */ 716 u8 lps_val; 717 u8 rpwm_val; 718 u32 ra_mask; 719 }; 720 721 struct btc_stack_info { 722 boolean profile_notified; 723 u16 hci_version; /* stack hci version */ 724 u8 num_of_link; 725 boolean bt_link_exist; 726 boolean sco_exist; 727 boolean acl_exist; 728 boolean a2dp_exist; 729 boolean hid_exist; 730 u8 num_of_hid; 731 boolean pan_exist; 732 boolean unknown_acl_exist; 733 s8 min_bt_rssi; 734 }; 735 736 struct btc_bt_link_info { 737 boolean bt_link_exist; 738 boolean bt_hi_pri_link_exist; 739 boolean sco_exist; 740 boolean sco_only; 741 boolean a2dp_exist; 742 boolean a2dp_only; 743 boolean hid_exist; 744 boolean hid_only; 745 boolean pan_exist; 746 boolean pan_only; 747 boolean slave_role; 748 boolean acl_busy; 749 }; 750 751 #ifdef CONFIG_RF4CE_COEXIST 752 struct btc_rf4ce_info { 753 u8 link_state; 754 u8 voice_state; 755 }; 756 #endif 757 758 struct btc_statistics { 759 u32 cnt_bind; 760 u32 cnt_power_on; 761 u32 cnt_pre_load_firmware; 762 u32 cnt_init_hw_config; 763 u32 cnt_init_coex_dm; 764 u32 cnt_ips_notify; 765 u32 cnt_lps_notify; 766 u32 cnt_scan_notify; 767 u32 cnt_connect_notify; 768 u32 cnt_media_status_notify; 769 u32 cnt_specific_packet_notify; 770 u32 cnt_bt_info_notify; 771 u32 cnt_rf_status_notify; 772 u32 cnt_periodical; 773 u32 cnt_coex_dm_switch; 774 u32 cnt_stack_operation_notify; 775 u32 cnt_dbg_ctrl; 776 }; 777 778 struct btc_coexist { 779 BOOLEAN bBinded; /*make sure only one adapter can bind the data context*/ 780 PVOID Adapter; /*default adapter*/ 781 struct btc_board_info board_info; 782 struct btc_bt_info bt_info; /*some bt info referenced by non-bt module*/ 783 struct btc_stack_info stack_info; 784 struct btc_bt_link_info bt_link_info; 785 786 #ifdef CONFIG_RF4CE_COEXIST 787 struct btc_rf4ce_info rf4ce_info; 788 #endif 789 790 BTC_CHIP_INTERFACE chip_interface; 791 PVOID odm_priv; 792 793 BOOLEAN initilized; 794 BOOLEAN stop_coex_dm; 795 BOOLEAN manual_control; 796 BOOLEAN bdontenterLPS; 797 pu1Byte cli_buf; 798 struct btc_statistics statistics; 799 u1Byte pwrModeVal[10]; 800 801 /* function pointers */ 802 /* io related */ 803 BFP_BTC_R1 btc_read_1byte; 804 BFP_BTC_W1 btc_write_1byte; 805 BFP_BTC_W1_BIT_MASK btc_write_1byte_bitmask; 806 BFP_BTC_R2 btc_read_2byte; 807 BFP_BTC_W2 btc_write_2byte; 808 BFP_BTC_R4 btc_read_4byte; 809 BFP_BTC_W4 btc_write_4byte; 810 BFP_BTC_LOCAL_REG_W1 btc_write_local_reg_1byte; 811 /* read/write bb related */ 812 BFP_BTC_SET_BB_REG btc_set_bb_reg; 813 BFP_BTC_GET_BB_REG btc_get_bb_reg; 814 815 /* read/write rf related */ 816 BFP_BTC_SET_RF_REG btc_set_rf_reg; 817 BFP_BTC_GET_RF_REG btc_get_rf_reg; 818 819 /* fill h2c related */ 820 BFP_BTC_FILL_H2C btc_fill_h2c; 821 /* other */ 822 BFP_BTC_DISP_DBG_MSG btc_disp_dbg_msg; 823 /* normal get/set related */ 824 BFP_BTC_GET btc_get; 825 BFP_BTC_SET btc_set; 826 827 BFP_BTC_GET_BT_REG btc_get_bt_reg; 828 BFP_BTC_SET_BT_REG btc_set_bt_reg; 829 830 BFP_BTC_SET_BT_ANT_DETECTION btc_set_bt_ant_detection; 831 832 BFP_BTC_COEX_H2C_PROCESS btc_coex_h2c_process; 833 BFP_BTC_SET_BT_TRX_MASK btc_set_bt_trx_mask; 834 BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE btc_get_bt_coex_supported_feature; 835 BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION btc_get_bt_coex_supported_version; 836 BFP_BTC_GET_PHYDM_VERSION btc_get_bt_phydm_version; 837 BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD btc_phydm_modify_RA_PCR_threshold; 838 BTC_PHYDM_CMNINFOQUERY btc_phydm_query_PHY_counter; 839 BFP_BTC_GET_ANT_DET_VAL_FROM_BT btc_get_ant_det_val_from_bt; 840 BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT btc_get_ble_scan_type_from_bt; 841 BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT btc_get_ble_scan_para_from_bt; 842 }; 843 typedef struct btc_coexist *PBTC_COEXIST; 844 845 extern struct btc_coexist GLBtCoexist; 846 847 BOOLEAN 848 EXhalbtcoutsrc_InitlizeVariables( 849 IN PVOID Adapter 850 ); 851 VOID 852 EXhalbtcoutsrc_PowerOnSetting( 853 IN PBTC_COEXIST pBtCoexist 854 ); 855 VOID 856 EXhalbtcoutsrc_PreLoadFirmware( 857 IN PBTC_COEXIST pBtCoexist 858 ); 859 VOID 860 EXhalbtcoutsrc_InitHwConfig( 861 IN PBTC_COEXIST pBtCoexist, 862 IN BOOLEAN bWifiOnly 863 ); 864 VOID 865 EXhalbtcoutsrc_InitCoexDm( 866 IN PBTC_COEXIST pBtCoexist 867 ); 868 VOID 869 EXhalbtcoutsrc_IpsNotify( 870 IN PBTC_COEXIST pBtCoexist, 871 IN u1Byte type 872 ); 873 VOID 874 EXhalbtcoutsrc_LpsNotify( 875 IN PBTC_COEXIST pBtCoexist, 876 IN u1Byte type 877 ); 878 VOID 879 EXhalbtcoutsrc_ScanNotify( 880 IN PBTC_COEXIST pBtCoexist, 881 IN u1Byte type 882 ); 883 VOID 884 EXhalbtcoutsrc_SetAntennaPathNotify( 885 IN PBTC_COEXIST pBtCoexist, 886 IN u1Byte type 887 ); 888 VOID 889 EXhalbtcoutsrc_ConnectNotify( 890 IN PBTC_COEXIST pBtCoexist, 891 IN u1Byte action 892 ); 893 VOID 894 EXhalbtcoutsrc_MediaStatusNotify( 895 IN PBTC_COEXIST pBtCoexist, 896 IN RT_MEDIA_STATUS mediaStatus 897 ); 898 VOID 899 EXhalbtcoutsrc_SpecificPacketNotify( 900 IN PBTC_COEXIST pBtCoexist, 901 IN u1Byte pktType 902 ); 903 VOID 904 EXhalbtcoutsrc_BtInfoNotify( 905 IN PBTC_COEXIST pBtCoexist, 906 IN pu1Byte tmpBuf, 907 IN u1Byte length 908 ); 909 VOID 910 EXhalbtcoutsrc_RfStatusNotify( 911 IN PBTC_COEXIST pBtCoexist, 912 IN u1Byte type 913 ); 914 VOID 915 EXhalbtcoutsrc_StackOperationNotify( 916 IN PBTC_COEXIST pBtCoexist, 917 IN u1Byte type 918 ); 919 VOID 920 EXhalbtcoutsrc_HaltNotify( 921 IN PBTC_COEXIST pBtCoexist 922 ); 923 VOID 924 EXhalbtcoutsrc_PnpNotify( 925 IN PBTC_COEXIST pBtCoexist, 926 IN u1Byte pnpState 927 ); 928 VOID 929 EXhalbtcoutsrc_CoexDmSwitch( 930 IN PBTC_COEXIST pBtCoexist 931 ); 932 VOID 933 EXhalbtcoutsrc_Periodical( 934 IN PBTC_COEXIST pBtCoexist 935 ); 936 VOID 937 EXhalbtcoutsrc_DbgControl( 938 IN PBTC_COEXIST pBtCoexist, 939 IN u1Byte opCode, 940 IN u1Byte opLen, 941 IN pu1Byte pData 942 ); 943 VOID 944 EXhalbtcoutsrc_AntennaDetection( 945 IN PBTC_COEXIST pBtCoexist, 946 IN u4Byte centFreq, 947 IN u4Byte offset, 948 IN u4Byte span, 949 IN u4Byte seconds 950 ); 951 VOID 952 EXhalbtcoutsrc_StackUpdateProfileInfo( 953 VOID 954 ); 955 VOID 956 EXhalbtcoutsrc_SetHciVersion( 957 IN u2Byte hciVersion 958 ); 959 VOID 960 EXhalbtcoutsrc_SetBtPatchVersion( 961 IN u2Byte btHciVersion, 962 IN u2Byte btPatchVersion 963 ); 964 VOID 965 EXhalbtcoutsrc_UpdateMinBtRssi( 966 IN s1Byte btRssi 967 ); 968 #if 0 969 VOID 970 EXhalbtcoutsrc_SetBtExist( 971 IN BOOLEAN bBtExist 972 ); 973 #endif 974 VOID 975 EXhalbtcoutsrc_SetChipType( 976 IN u1Byte chipType 977 ); 978 VOID 979 EXhalbtcoutsrc_SetAntNum( 980 IN u1Byte type, 981 IN u1Byte antNum 982 ); 983 VOID 984 EXhalbtcoutsrc_SetSingleAntPath( 985 IN u1Byte singleAntPath 986 ); 987 VOID 988 EXhalbtcoutsrc_DisplayBtCoexInfo( 989 IN PBTC_COEXIST pBtCoexist 990 ); 991 VOID 992 EXhalbtcoutsrc_DisplayAntDetection( 993 IN PBTC_COEXIST pBtCoexist 994 ); 995 996 #define MASKBYTE0 0xff 997 #define MASKBYTE1 0xff00 998 #define MASKBYTE2 0xff0000 999 #define MASKBYTE3 0xff000000 1000 #define MASKHWORD 0xffff0000 1001 #define MASKLWORD 0x0000ffff 1002 #define MASKDWORD 0xffffffff 1003 #define MASK12BITS 0xfff 1004 #define MASKH4BITS 0xf0000000 1005 #define MASKOFDM_D 0xffc00000 1006 #define MASKCCK 0x3f3f3f3f 1007 1008 #endif 1009