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93 ////////////////////////////////////////////////////////////////////////////////
94
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file drvDAC.c
98 /// @author MStar Semiconductor Inc.
99 /// @brief DAC Driver Interface
100 ///////////////////////////////////////////////////////////////////////////////////////////////////
101
102 #define MDRV_DAC_C
103
104 //-------------------------------------------------------------------------------------------------
105 // Include Files
106 //-------------------------------------------------------------------------------------------------
107 #include "MsCommon.h"
108 #include "MsVersion.h"
109 #include "drvMMIO.h"
110 #include "drvDAC.h"
111 #include "halDAC.h"
112 #include "UFO.h"
113
114 //-------------------------------------------------------------------------------------------------
115 // Driver Compiler Options
116 //-------------------------------------------------------------------------------------------------
117
118
119 //-------------------------------------------------------------------------------------------------
120 // Local Defines
121 //-------------------------------------------------------------------------------------------------
122
MDrv_DAC_SetIOMapBase(MS_VIRT virtNPMBase,MS_VIRT virtPMBase)123 void MDrv_DAC_SetIOMapBase(MS_VIRT virtNPMBase, MS_VIRT virtPMBase)
124 {
125 Hal_DAC_SetIOMapBase(virtNPMBase, virtPMBase);
126 }
127
MDrv_DAC_Init(void)128 void MDrv_DAC_Init(void)
129 {
130 Hal_DAC_Power_Saving(FALSE);
131 Hal_HDMITx_InitSeq();
132 }
133
MDrv_DAC_Exit(void)134 void MDrv_DAC_Exit(void)
135 {
136 Hal_DAC_Power_Saving(TRUE);
137 }
138
MDrv_DAC_Enable(MS_BOOL bEnable,MS_BOOL bIsYPbPr)139 void MDrv_DAC_Enable(MS_BOOL bEnable, MS_BOOL bIsYPbPr)
140 {
141 Hal_DAC_Enable(bEnable, bIsYPbPr);
142 }
143
MDrv_DAC_SetClkInv(MS_BOOL bEnable,MS_BOOL bIsYPbPr)144 void MDrv_DAC_SetClkInv(MS_BOOL bEnable, MS_BOOL bIsYPbPr)
145 {
146 Hal_DAC_SetClkInv(bEnable, bIsYPbPr);
147 }
148
149 //DAC MUX select: YPbPr -> E_DAC_TO_HDGEN; CVBS/S-Video -> E_DAC_TO_VE
MDrv_DAC_SetOutputSource(EN_DAC_OUTPUT_TYPE enOutputType,MS_BOOL bIsYPbPr)150 void MDrv_DAC_SetOutputSource(EN_DAC_OUTPUT_TYPE enOutputType, MS_BOOL bIsYPbPr)
151 {
152 Hal_DAC_SetOutputSource(enOutputType, bIsYPbPr);
153 }
154
155 //by default, YPbPr -> E_DAC_OUTPUT_LEVEL_LOW; CVBS/S-Video -> E_DAC_OUTPUT_LEVEL_HIGH
MDrv_DAC_SetOutputLevel(EN_DAC_MAX_OUTPUT_LEVEL enLevel,MS_BOOL bIsYPbPr)156 void MDrv_DAC_SetOutputLevel(EN_DAC_MAX_OUTPUT_LEVEL enLevel, MS_BOOL bIsYPbPr)
157 {
158 Hal_DAC_SetOutputLevel(enLevel, bIsYPbPr);
159 }
160
MDrv_DAC_SetOutputSwapSel(EN_DAC_SWAP_SEL enSwap,MS_BOOL bIsYPbPr)161 void MDrv_DAC_SetOutputSwapSel(EN_DAC_SWAP_SEL enSwap,MS_BOOL bIsYPbPr)
162 {
163 Hal_DAC_SetOutputSwapSel(enSwap,bIsYPbPr);
164 }
165
MDrv_DAC_SetOutputTiming(EN_OUTPUT_VIDEO_TIMING_TYPE enTiming)166 void MDrv_DAC_SetOutputTiming(EN_OUTPUT_VIDEO_TIMING_TYPE enTiming)
167 {
168 Hal_HDGEN_SetTiming(enTiming);
169 }
170
MDrv_ClkSel_Set(EN_OUTPUT_VIDEO_TIMING_TYPE enTiming,EN_OUTPUT_BIT_TYPE enBits)171 void MDrv_ClkSel_Set(EN_OUTPUT_VIDEO_TIMING_TYPE enTiming, EN_OUTPUT_BIT_TYPE enBits)
172 {
173 //Hal_ClkSel_Set(enTiming, enBits);
174 }
175
MDrv_DAC_OnOffSD(EN_DAC_SD_ENABLE_CTRL enBit)176 void MDrv_DAC_OnOffSD(EN_DAC_SD_ENABLE_CTRL enBit)
177 {
178 Hal_DAC_OnOffSD(enBit);
179 }
MDrv_DAC_GetSDStatus(void)180 EN_DAC_SD_ENABLE_CTRL MDrv_DAC_GetSDStatus(void)
181 {
182 return Hal_DAC_GetSDStatus();
183 }
MDrv_DAC_OnOffHD(EN_DAC_HD_ENABLE_CTRL enBit)184 void MDrv_DAC_OnOffHD(EN_DAC_HD_ENABLE_CTRL enBit)
185 {
186 Hal_DAC_OnOffHD(enBit);
187 }
MDrv_DAC_GetHDStatus(void)188 EN_DAC_HD_ENABLE_CTRL MDrv_DAC_GetHDStatus(void)
189 {
190 return Hal_DAC_GetHDStatus();
191 }
MDrv_DAC_DumpTable(MS_U8 * pDACTable,MS_U8 u8DACtype)192 void MDrv_DAC_DumpTable(MS_U8 *pDACTable, MS_U8 u8DACtype)
193 {
194 Hal_DAC_DumpTable(pDACTable, u8DACtype);
195 }
196 #ifdef UFO_XC_GETOUTPUTINTELACETIMING
197 //----------------------------------------------------------------
198 // MDrv_DAC_GetOutputInterlaceTiming - Get InterlaceTiming
199 // @return: TRUE is InterlaceTiming
200 //----------------------------------------------------------------
MDrv_DAC_GetOutputInterlaceTiming(void)201 MS_BOOL MDrv_DAC_GetOutputInterlaceTiming(void)
202 {
203 return Hal_DAC_GetOutputInterlaceTiming();
204 }
205 #endif
206
MDrv_DAC_SetWSSOnOff(MS_BOOL bEnable)207 void MDrv_DAC_SetWSSOnOff(MS_BOOL bEnable)
208 {
209 Hal_HDGEN_SetWSSOnOff(bEnable);
210 }
211
MDrv_DAC_GetWSSStatus(void)212 MS_BOOL MDrv_DAC_GetWSSStatus(void)
213 {
214 return Hal_HDGEN_GetWSSStatus();
215 }
MDrv_DAC_ResetWSSData(void)216 void MDrv_DAC_ResetWSSData(void)
217 {
218 Hal_HDGEN_ResetWSSData();
219 }
220
MDrv_DAC_WSS_SetAS(MS_BOOL bEnable,EN_OUTPUT_VIDEO_TIMING_TYPE eVideo_Timing,EN_DAC_VIDEO_VBI_WSS_TYPE eWSS_TYPE)221 MS_BOOL MDrv_DAC_WSS_SetAS(MS_BOOL bEnable, EN_OUTPUT_VIDEO_TIMING_TYPE eVideo_Timing, EN_DAC_VIDEO_VBI_WSS_TYPE eWSS_TYPE)
222 {
223 MS_U32 u32PreWSSData = 0;
224 MS_U32 u32WSSData = 0;
225
226 if((eVideo_Timing == RES_720x576I_50Hz) || (eVideo_Timing == RES_720x576P_50Hz))
227 {
228 if((eWSS_TYPE >= DAC_VIDEO_VBI_WSS_AS_4x3_FULL) && (eWSS_TYPE <= DAC_VIDEO_VBI_WSS_AS_16x9_ANAMORPHIC))
229 {
230 switch(eWSS_TYPE)
231 {
232 default:
233 case DAC_VIDEO_VBI_WSS_AS_4x3_FULL:
234 u32WSSData = VIDEO_VBI_WSS_AS_4x3_FULL;
235 break;
236 case DAC_VIDEO_VBI_WSS_AS_14x9_LETTERBOX_CENTER:
237 u32WSSData = VIDEO_VBI_WSS_AS_14x9_LETTERBOX_CENTER;
238 break;
239 case DAC_VIDEO_VBI_WSS_AS_14x9_LETTERBOX_TOP:
240 u32WSSData = VIDEO_VBI_WSS_AS_14x9_LETTERBOX_TOP;
241 break;
242 case DAC_VIDEO_VBI_WSS_AS_16x9_LETTERBOX_CENTER:
243 u32WSSData = VIDEO_VBI_WSS_AS_16x9_LETTERBOX_CENTER;
244 break;
245 case DAC_VIDEO_VBI_WSS_AS_16x9_LETTERBOX_TOP:
246 u32WSSData = VIDEO_VBI_WSS_AS_16x9_LETTERBOX_TOP;
247 break;
248 case DAC_VIDEO_VBI_WSS_AS_ABOVE16x9_LETTERBOX_CENTER:
249 u32WSSData = VIDEO_VBI_WSS_AS_ABOVE16x9_LETTERBOX_CENTER;
250 break;
251 case DAC_VIDEO_VBI_WSS_AS_14x9_FULL_CENTER:
252 u32WSSData = VIDEO_VBI_WSS_AS_14x9_FULL_CENTER;
253 break;
254 case DAC_VIDEO_VBI_WSS_AS_16x9_ANAMORPHIC:
255 u32WSSData = VIDEO_VBI_WSS_AS_16x9_ANAMORPHIC;
256 break;
257 }
258
259 u32PreWSSData = (MS_U32)Hal_HDGEN_Get_WSS_data();
260
261 if(bEnable == TRUE)
262 {
263 u32WSSData = (u32PreWSSData & 0x3FF0) | ((EN_VIDEO_VBI_WSS_AS_TYPE)u32WSSData);
264 }
265 else
266 {
267 u32WSSData = u32PreWSSData & 0x3FF0;
268 }
269
270 Hal_HDGEN_Set_WSS_data(TRUE, eVideo_Timing, u32WSSData);
271 }
272 else
273 {
274 printf("[MDRV_DAC]The timing %d does not support WSS %d type!\n", eVideo_Timing, eWSS_TYPE);
275 return FALSE;
276 }
277 }
278 else if((eVideo_Timing == RES_720x480I_60Hz) || (eVideo_Timing == RES_720x480P_60Hz) || (eVideo_Timing == RES_1280x720P_50Hz)
279 || (eVideo_Timing == RES_1280x720P_60Hz) || (eVideo_Timing == RES_1920x1080I_50Hz) || (eVideo_Timing == RES_1920x1080I_60Hz))
280 {
281 if((eWSS_TYPE >= DAC_VIDEO_VBI_WSS525_A_AS_4x3_NORMAL) && (eWSS_TYPE <= DAC_VIDEO_VBI_WSS525_A_AS_RESERVED))
282 {
283 switch(eWSS_TYPE)
284 {
285 default:
286 case DAC_VIDEO_VBI_WSS525_A_AS_4x3_NORMAL:
287 u32WSSData = VIDEO_VBI_WSS525_A_AS_4x3_NORMAL;
288 break;
289 case DAC_VIDEO_VBI_WSS525_A_AS_4x3_LETTERBOX:
290 u32WSSData = VIDEO_VBI_WSS525_A_AS_4x3_LETTERBOX;
291 break;
292 //case DAC_VIDEO_VBI_WSS525_A_AS_16x9_ANAMORPHIC:
293 case DAC_VIDEO_VBI_WSS525_A_AS_16x9_NORMAL:
294 u32WSSData = VIDEO_VBI_WSS525_A_AS_16x9_NORMAL;
295 break;
296 case DAC_VIDEO_VBI_WSS525_A_AS_RESERVED:
297 u32WSSData = VIDEO_VBI_WSS525_A_AS_RESERVED;
298 break;
299 }
300
301 u32PreWSSData = Hal_HDGEN_Get_WSS525_A_data();
302
303 if(bEnable == TRUE)
304 {
305 u32WSSData = (u32PreWSSData & 0xFFFFC) | ((EN_VIDEO_VBI_WSS525_A_AS_TYPE)u32WSSData);
306 }
307 else
308 {
309 u32WSSData = u32PreWSSData & 0xFFFFC;
310 }
311
312 Hal_HDGEN_Set_WSS525_A_data(TRUE, eVideo_Timing, u32WSSData);
313 }
314 else
315 {
316 printf("[MDRV_DAC]The timing %d does not support WSS %d type!\n", eVideo_Timing, eWSS_TYPE);
317 return FALSE;
318 }
319 }
320 else
321 {
322 printf("[MDRV_DAC]The timing %d does not implement WSS yet!\n", eVideo_Timing);
323 return FALSE;
324 }
325
326 return TRUE;
327 }
328
MDrv_DAC_WSS_SetCGMS(MS_BOOL bEnable,EN_OUTPUT_VIDEO_TIMING_TYPE eVideo_Timing,EN_DAC_VIDEO_VBI_WSS_TYPE eWSS_TYPE)329 MS_BOOL MDrv_DAC_WSS_SetCGMS(MS_BOOL bEnable, EN_OUTPUT_VIDEO_TIMING_TYPE eVideo_Timing, EN_DAC_VIDEO_VBI_WSS_TYPE eWSS_TYPE)
330 {
331 MS_U32 u32PreWSSData = 0;
332 MS_U32 u32WSSData = 0;
333
334 if((eVideo_Timing == RES_720x576I_50Hz) || (eVideo_Timing == RES_720x576P_50Hz))
335 {
336 if(((eWSS_TYPE >= DAC_VIDEO_VBI_WSS_CGMS_COPYRIGHT) && (eWSS_TYPE <= DAC_VIDEO_VBI_WSS_CGMS_COPY_PROTECTION))
337 || ((eWSS_TYPE >= DAC_VIDEO_VBI_WSS_CGMS_COPY_FREELY) && (eWSS_TYPE <= DAC_VIDEO_VBI_WSS_CGMS_COPY_NEVER)))
338 {
339 switch(eWSS_TYPE)
340 {
341 default:
342 case DAC_VIDEO_VBI_WSS_CGMS_COPYRIGHT:
343 u32WSSData = VIDEO_VBI_WSS_CGMS_COPYRIGHT;
344 break;
345 case DAC_VIDEO_VBI_WSS_CGMS_COPY_PROTECTION:
346 u32WSSData = VIDEO_VBI_WSS_CGMS_COPY_PROTECTION;
347 break;
348 case DAC_VIDEO_VBI_WSS_CGMS_COPY_FREELY:
349 u32WSSData = VIDEO_VBI_WSS_CGMS_COPY_FREELY;
350 break;
351 case DAC_VIDEO_VBI_WSS_CGMS_COPY_ONCE:
352 u32WSSData = VIDEO_VBI_WSS_CGMS_COPY_ONCE;
353 break;
354 case DAC_VIDEO_VBI_WSS_CGMS_COPY_NO_MORE:
355 u32WSSData = VIDEO_VBI_WSS_CGMS_COPY_NO_MORE;
356 break;
357 case DAC_VIDEO_VBI_WSS_CGMS_COPY_NEVER:
358 u32WSSData = VIDEO_VBI_WSS_CGMS_COPY_NEVER;
359 break;
360 }
361
362 u32PreWSSData = (MS_U32)Hal_HDGEN_Get_WSS_data();
363
364 if(bEnable == TRUE)
365 {
366 u32WSSData = u32PreWSSData | ((EN_VIDEO_VBI_WSS_CGMS_TYPE) u32WSSData << 12);
367 }
368 else
369 {
370 u32WSSData = u32PreWSSData & (~((EN_VIDEO_VBI_WSS_CGMS_TYPE) u32WSSData << 12));
371 }
372
373 Hal_HDGEN_Set_WSS_data(TRUE, eVideo_Timing, u32WSSData);
374 }
375 else
376 {
377 printf("[MDRV_DAC]The timing %d does not support WSS %d type!\n", eVideo_Timing, eWSS_TYPE);
378 return FALSE;
379 }
380 }
381 else if((eVideo_Timing == RES_720x480I_60Hz) || (eVideo_Timing == RES_720x480P_60Hz) || (eVideo_Timing == RES_1280x720P_50Hz)
382 || (eVideo_Timing == RES_1280x720P_60Hz) || (eVideo_Timing == RES_1920x1080I_50Hz) || (eVideo_Timing == RES_1920x1080I_60Hz))
383 {
384 if((eWSS_TYPE >= DAC_VIDEO_VBI_WSS525_A_CGMS_COPY_FREELY) && (eWSS_TYPE <= DAC_VIDEO_VBI_WSS525_A_CGMS_COPY_NEVER))
385 {
386 switch(eWSS_TYPE)
387 {
388 default:
389 case DAC_VIDEO_VBI_WSS525_A_CGMS_COPY_FREELY:
390 u32WSSData = VIDEO_VBI_WSS525_A_CGMS_COPY_FREELY;
391 break;
392 case DAC_VIDEO_VBI_WSS525_A_CGMS_COPY_ONCE:
393 u32WSSData = VIDEO_VBI_WSS525_A_CGMS_COPY_ONCE;
394 break;
395 case DAC_VIDEO_VBI_WSS525_A_CGMS_COPY_NO_MORE:
396 u32WSSData = VIDEO_VBI_WSS525_A_CGMS_COPY_NO_MORE;
397 break;
398 case DAC_VIDEO_VBI_WSS525_A_CGMS_COPY_NEVER:
399 u32WSSData = VIDEO_VBI_WSS525_A_CGMS_COPY_NEVER;
400 break;
401 }
402
403 u32PreWSSData = Hal_HDGEN_Get_WSS525_A_data();
404
405 if(bEnable == TRUE)
406 {
407 u32WSSData = (u32PreWSSData & 0xFFF3F) | ((EN_VIDEO_VBI_WSS525_A_CGMS_TYPE) u32WSSData << 6);
408 }
409 else
410 {
411 u32WSSData = u32PreWSSData & 0xFFF3F;
412 }
413
414 Hal_HDGEN_Set_WSS525_A_data(TRUE, eVideo_Timing, u32WSSData);
415 }
416 else
417 {
418 printf("[MDRV_DAC]The timing %d does not support WSS %d type!\n", eVideo_Timing, eWSS_TYPE);
419 return FALSE;
420 }
421 }
422 else
423 {
424 printf("[MDRV_DAC]The timing %d does not implement WSS yet!\n", eVideo_Timing);
425 return FALSE;
426 }
427
428 return TRUE;
429 }
430
MDrv_DAC_WSS_SetAPS(MS_BOOL bEnable,EN_OUTPUT_VIDEO_TIMING_TYPE eVideo_Timing,EN_DAC_VIDEO_VBI_WSS_TYPE eWSS_TYPE)431 MS_BOOL MDrv_DAC_WSS_SetAPS(MS_BOOL bEnable, EN_OUTPUT_VIDEO_TIMING_TYPE eVideo_Timing, EN_DAC_VIDEO_VBI_WSS_TYPE eWSS_TYPE)
432 {
433 MS_U32 u32PreWSSData = 0;
434 MS_U32 u32WSSData = 0;
435
436 if((eVideo_Timing == RES_720x480I_60Hz) || (eVideo_Timing == RES_720x480P_60Hz) || (eVideo_Timing == RES_1280x720P_50Hz)
437 || (eVideo_Timing == RES_1280x720P_60Hz) || (eVideo_Timing == RES_1920x1080I_50Hz) || (eVideo_Timing == RES_1920x1080I_60Hz))
438 {
439 if((eWSS_TYPE >= DAC_VIDEO_VBI_WSS525_A_APS_NO_APS) && (eWSS_TYPE <= DAC_VIDEO_VBI_WSS525_A_APS_PSP_4_LINE_CS))
440 {
441 switch(eWSS_TYPE)
442 {
443 default:
444 case DAC_VIDEO_VBI_WSS525_A_APS_NO_APS:
445 u32WSSData = VIDEO_VBI_WSS525_A_APS_NO_APS;
446 break;
447 case DAC_VIDEO_VBI_WSS525_A_APS_PSP_CS_OFF:
448 u32WSSData = VIDEO_VBI_WSS525_A_APS_PSP_CS_OFF;
449 break;
450 case DAC_VIDEO_VBI_WSS525_A_APS_PSP_2_LINE_CS:
451 u32WSSData = VIDEO_VBI_WSS525_A_APS_PSP_2_LINE_CS;
452 break;
453 case DAC_VIDEO_VBI_WSS525_A_APS_PSP_4_LINE_CS:
454 u32WSSData = VIDEO_VBI_WSS525_A_APS_PSP_4_LINE_CS;
455 break;
456 }
457
458 u32PreWSSData = Hal_HDGEN_Get_WSS525_A_data();
459
460 if(bEnable == TRUE)
461 {
462 u32WSSData = (u32PreWSSData & 0xFFCFF) | ((EN_VIDEO_VBI_WSS525_A_APS_TYPE) u32WSSData << 8);
463 }
464 else
465 {
466 u32WSSData = u32PreWSSData & 0xFFCFF;
467 }
468
469 Hal_HDGEN_Set_WSS525_A_data(TRUE, eVideo_Timing, u32WSSData);
470 }
471 }
472 else
473 {
474 printf("[MDRV_DAC]The timing %d does not implement WSS yet!\n", eVideo_Timing);
475 return FALSE;
476 }
477
478 return TRUE;
479 }
480
481 //----------------------------------------------------------------
482 // DAC - set half output current
483 // @return none
484 //----------------------------------------------------------------
MDrv_DAC_SetIHalfOutput(MS_BOOL bEnable,MS_BOOL bIsYPbPr)485 void MDrv_DAC_SetIHalfOutput(MS_BOOL bEnable, MS_BOOL bIsYPbPr)
486 {
487 Hal_DAC_SetIHalfOutput(bEnable, bIsYPbPr);
488 }
489
490 //----------------------------------------------------------------
491 // DAC - set quart output current
492 // @return none
493 //----------------------------------------------------------------
MDrv_DAC_SetQuartOutput(MS_BOOL bEnable,MS_BOOL bIsYPbPr)494 void MDrv_DAC_SetQuartOutput(MS_BOOL bEnable, MS_BOOL bIsYPbPr)
495 {
496 Hal_DAC_SetQuartOutput(bEnable, bIsYPbPr);
497 }
498
499 //----------------------------------------------------------------
500 // MDrv_DAC_SetDACState - Set DAC init state
501 // @param: bEnable: TRUE for DAC is initialized, FALSE for not initialized
502 // @param: bIsYPbPr: TRUE for YPbPr, FALSE for CVBS
503 // @return none
504 //----------------------------------------------------------------
MDrv_DAC_SetDACState(MS_BOOL bEnable,MS_BOOL bIsYPbPr)505 void MDrv_DAC_SetDACState(MS_BOOL bEnable, MS_BOOL bIsYPbPr)
506 {
507 Hal_DAC_SetDACState(bEnable, bIsYPbPr);
508 }
509
510 //----------------------------------------------------------------
511 // MDrv_DAC_GetDACState - Get DAC init state
512 // @param: bIsYPbPr: TRUE for YPbPr, FALSE for CVBS
513 // @return: TRUE is DAC is initialized
514 //----------------------------------------------------------------
MDrv_DAC_GetDACState(MS_BOOL bIsYPbPr)515 MS_BOOL MDrv_DAC_GetDACState(MS_BOOL bIsYPbPr)
516 {
517 return Hal_DAC_GetDACState(bIsYPbPr);
518 }
519
520 //----------------------------------------------------------------
521 // MDrv_DAC_HotPlugDetect - Get DAC HotPlug state
522 // @param: SelDAC: DAC_DETECT_HD, DAC_DETECT_SD
523 // @param: DetectType: DAC_DETECT_PLUGIN, DAC_DETECT_PLUGOUT
524 // @param: bIsSignIn: Report signal is in/out
525 // @return: TRUE is working successful
526 //----------------------------------------------------------------
MDrv_DAC_HotPlugDetect(EN_DAC_DETECT SelDAC,EN_DAC_DETECT_TYPE DetectType,MS_BOOL * State)527 MS_BOOL MDrv_DAC_HotPlugDetect(EN_DAC_DETECT SelDAC, EN_DAC_DETECT_TYPE DetectType, MS_BOOL *State)
528 {
529 return Hal_DAC_HotPlugDetect(SelDAC, DetectType, State);
530 }
531
532 //----------------------------------------------------------------
533 // MDrv_DAC_EnableICT - Enable ICT (Image Constraint Token) function
534 // @bEnable: TRUE: enable, FALSE: disable
535 // @return: TRUE is working successful
536 //----------------------------------------------------------------
MDrv_DAC_EnableICT(MS_BOOL bEnable)537 MS_BOOL MDrv_DAC_EnableICT(MS_BOOL bEnable)
538 {
539 return Hal_HDGEN_EnableICT(bEnable);
540 }
541
542
543 //----------------------------------------------------------------
544 // DAC - set VGA Hsync Vsync
545 // @return none
546 //----------------------------------------------------------------
MDrv_DAC_SetVGAHsyncVsync(MS_BOOL bEnable)547 void MDrv_DAC_SetVGAHsyncVsync(MS_BOOL bEnable)
548 {
549 Hal_DAC_SetVGAHsyncVsync(bEnable);
550 }
551
552
553