1 /*
2 * Copyright (c) 2014-2024, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #ifndef INTERRUPT_MGMT_H
8 #define INTERRUPT_MGMT_H
9
10 #include <arch.h>
11 #include <lib/utils_def.h>
12
13 /*******************************************************************************
14 * Constants for the types of interrupts recognised by the IM framework
15 ******************************************************************************/
16 #define INTR_TYPE_S_EL1 U(0)
17 #define INTR_TYPE_EL3 U(1)
18 #define INTR_TYPE_NS U(2)
19 #define INTR_TYPE_RL U(3)
20 #define MAX_INTR_TYPES U(4)
21 #define INTR_TYPE_INVAL MAX_INTR_TYPES
22
23 /* Interrupt routing modes */
24 #define INTR_ROUTING_MODE_PE 0
25 #define INTR_ROUTING_MODE_ANY 1
26
27 /*
28 * Constant passed to the interrupt handler in the 'id' field when the
29 * framework does not read the gic registers to determine the interrupt id.
30 */
31 #define INTR_ID_UNAVAILABLE U(0xFFFFFFFF)
32
33
34 /*******************************************************************************
35 * Mask for _both_ the routing model bits in the 'flags' parameter and
36 * constants to define the valid routing models for each supported interrupt
37 * type
38 ******************************************************************************/
39 #define INTR_RM_FLAGS_SHIFT U(0x0)
40 #define INTR_RM_FLAGS_MASK U(0x3)
41 /* Routed to EL3 from NS. Taken to S-EL1 from Secure */
42 #define INTR_SEL1_VALID_RM0 U(0x2)
43 /* Routed to EL3 from NS and Secure */
44 #define INTR_SEL1_VALID_RM1 U(0x3)
45 /* Routed to EL1/EL2 from NS and to S-EL1 from Secure */
46 #define INTR_NS_VALID_RM0 U(0x0)
47 /* Routed to EL1/EL2 from NS and to EL3 from Secure */
48 #define INTR_NS_VALID_RM1 U(0x1)
49 /* Routed to EL3 from NS. Taken to S-EL1 from Secure and handed over to EL3 */
50 #define INTR_EL3_VALID_RM0 U(0x2)
51 /* Routed to EL3 from NS and Secure */
52 #define INTR_EL3_VALID_RM1 U(0x3)
53 /* This is the default routing model */
54 #define INTR_DEFAULT_RM U(0x0)
55
56 /*******************************************************************************
57 * Constants for the _individual_ routing model bits in the 'flags' field for
58 * each interrupt type and mask to validate the 'flags' parameter while
59 * registering an interrupt handler
60 ******************************************************************************/
61 #define INTR_TYPE_FLAGS_MASK U(0xFFFFFFFC)
62
63 #define INTR_RM_FROM_SEC_SHIFT SECURE /* BIT[0] */
64 #define INTR_RM_FROM_NS_SHIFT NON_SECURE /* BIT[1] */
65 #define INTR_RM_FROM_FLAG_MASK U(1)
66 #define get_interrupt_rm_flag(flag, ss) \
67 ((((flag) >> INTR_RM_FLAGS_SHIFT) >> (ss)) & INTR_RM_FROM_FLAG_MASK)
68 #define set_interrupt_rm_flag(flag, ss) ((flag) |= U(1) << (ss))
69 #define clr_interrupt_rm_flag(flag, ss) ((flag) &= ~(U(1) << (ss)))
70
71 /*******************************************************************************
72 * Macros to set the 'flags' parameter passed to an interrupt type handler. Only
73 * the flag to indicate the security state when the exception was generated is
74 * supported.
75 ******************************************************************************/
76 #define INTR_SRC_SS_FLAG_SHIFT U(0) /* BIT[0] */
77 #define INTR_SRC_SS_FLAG_MASK U(1)
78 #define set_interrupt_src_ss(flag, val) ((flag) |= (val) << INTR_SRC_SS_FLAG_SHIFT)
79 #define clr_interrupt_src_ss(flag) ((flag) &= ~(U(1) << INTR_SRC_SS_FLAG_SHIFT))
80 #define get_interrupt_src_ss(flag) (((flag) >> INTR_SRC_SS_FLAG_SHIFT) & \
81 INTR_SRC_SS_FLAG_MASK)
82
83 #ifndef __ASSEMBLER__
84
85 #include <errno.h>
86 #include <stddef.h>
87 #include <stdint.h>
88
89 /*******************************************************************************
90 * Helpers to validate the routing model bits in the 'flags' for a type
91 * of interrupt. If the model does not match one of the valid masks
92 * -EINVAL is returned.
93 ******************************************************************************/
validate_sel1_interrupt_rm(uint32_t x)94 static inline int32_t validate_sel1_interrupt_rm(uint32_t x)
95 {
96 if ((x == INTR_SEL1_VALID_RM0) || (x == INTR_SEL1_VALID_RM1))
97 return 0;
98
99 return -EINVAL;
100 }
101
validate_ns_interrupt_rm(uint32_t x)102 static inline int32_t validate_ns_interrupt_rm(uint32_t x)
103 {
104 if ((x == INTR_NS_VALID_RM0) || (x == INTR_NS_VALID_RM1))
105 return 0;
106
107 return -EINVAL;
108 }
109
validate_el3_interrupt_rm(uint32_t x)110 static inline int32_t validate_el3_interrupt_rm(uint32_t x)
111 {
112 #if EL3_EXCEPTION_HANDLING && SPM_MM
113 /*
114 * With EL3 exception handling, EL3 interrupts are always routed to EL3
115 * from Non-secure and from secure only if SPM_MM is present.
116 * Therefore INTR_EL3_VALID_RM1 is the only valid routing model.
117 */
118 if (x == INTR_EL3_VALID_RM1)
119 return 0;
120 #else
121 /*
122 * When EL3_EXCEPTION_HANDLING is not defined both routing modes are
123 * valid. This is the most common case. The exception to this rule is
124 * when EL3_EXCEPTION_HANDLING is defined but also when the SPMC lives
125 * at S-EL2. In this case, Group0 Interrupts are trapped to the SPMC
126 * when running in S-EL0 and S-EL1. The SPMC may handle the interrupt
127 * itself, delegate it to an SP or forward to EL3 for handling.
128 */
129 if ((x == INTR_EL3_VALID_RM0) || (x == INTR_EL3_VALID_RM1))
130 return 0;
131 #endif
132
133 return -EINVAL;
134 }
135
136 /*******************************************************************************
137 * Prototype for defining a handler for an interrupt type
138 ******************************************************************************/
139 typedef uint64_t (*interrupt_type_handler_t)(uint32_t id,
140 uint32_t flags,
141 void *handle,
142 void *cookie);
143
144 /*******************************************************************************
145 * Function & variable prototypes
146 ******************************************************************************/
147 u_register_t get_scr_el3_from_routing_model(size_t security_state);
148 int32_t set_routing_model(uint32_t type, uint32_t flags);
149 int32_t register_interrupt_type_handler(uint32_t type,
150 interrupt_type_handler_t handler,
151 uint32_t flags);
152 interrupt_type_handler_t get_interrupt_type_handler(uint32_t type);
153 int disable_intr_rm_local(uint32_t type, uint32_t security_state);
154 int enable_intr_rm_local(uint32_t type, uint32_t security_state);
155
156 #endif /*__ASSEMBLER__*/
157 #endif /* INTERRUPT_MGMT_H */
158