1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2020 Rockchip Electronics Co., Ltd 4 * 5 * Based on include/soc/rockchip/rockchip_phy_typec.h in Linux Kernel. 6 */ 7 8 #ifndef __LINUX_ROCKCHIP_PHY_TYPEC_H 9 #define __LINUX_ROCKCHIP_PHY_TYPEC_H 10 11 #include <reset.h> 12 13 struct usb3phy_reg { 14 u32 offset; 15 u32 enable_bit; 16 u32 write_enable; 17 }; 18 19 struct rockchip_usb3phy_port_cfg { 20 struct usb3phy_reg typec_conn_dir; 21 struct usb3phy_reg usb3tousb2_en; 22 struct usb3phy_reg usb3host_disable; 23 struct usb3phy_reg usb3host_port; 24 struct usb3phy_reg external_psm; 25 struct usb3phy_reg pipe_status; 26 }; 27 28 struct rockchip_typec_phy { 29 struct udevice *dev; 30 void __iomem *base; 31 void __iomem *grf_regs; 32 struct reset_ctl uphy_rst; 33 struct reset_ctl pipe_rst; 34 struct reset_ctl tcphy_rst; 35 struct rockchip_usb3phy_port_cfg port_cfgs; 36 /* mutex to protect access to individual PHYs */ 37 struct mutex lock; 38 39 bool flip; 40 u8 mode; 41 }; 42 43 #if CONFIG_IS_ENABLED(PHY_ROCKCHIP_TYPEC) 44 int rockchip_u3phy_uboot_init(const char *name); 45 #else rockchip_u3phy_uboot_init(const char * name)46static inline int rockchip_u3phy_uboot_init(const char *name) 47 { 48 return -ENOTSUPP; 49 } 50 #endif 51 52 #endif /* __LINUX_ROCKCHIP_PHY_TYPEC_H */ 53