1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Universal Flash Storage Host controller driver
4 * Copyright (C) 2011-2013 Samsung India Software Operations
5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
6 *
7 * Authors:
8 * Santosh Yaraganavi <santosh.sy@samsung.com>
9 * Vinayak Holikatti <h.vinayak@samsung.com>
10 */
11
12 #ifndef _UFSHCD_H
13 #define _UFSHCD_H
14
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/interrupt.h>
19 #include <linux/io.h>
20 #include <linux/delay.h>
21 #include <linux/slab.h>
22 #include <linux/spinlock.h>
23 #include <linux/rwsem.h>
24 #include <linux/workqueue.h>
25 #include <linux/errno.h>
26 #include <linux/types.h>
27 #include <linux/wait.h>
28 #include <linux/bitops.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/clk.h>
31 #include <linux/completion.h>
32 #include <linux/regulator/consumer.h>
33 #include <linux/bitfield.h>
34 #include <linux/devfreq.h>
35 #include <linux/keyslot-manager.h>
36 #include "unipro.h"
37
38 #include <asm/irq.h>
39 #include <asm/byteorder.h>
40 #include <scsi/scsi.h>
41 #include <scsi/scsi_cmnd.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_tcq.h>
44 #include <scsi/scsi_dbg.h>
45 #include <scsi/scsi_eh.h>
46 #include <linux/android_kabi.h>
47
48 #include "ufs.h"
49 #include "ufs_quirks.h"
50 #include "ufshci.h"
51
52 #define UFSHCD "ufshcd"
53 #define UFSHCD_DRIVER_VERSION "0.2"
54
55 struct ufs_hba;
56
57 enum dev_cmd_type {
58 DEV_CMD_TYPE_NOP = 0x0,
59 DEV_CMD_TYPE_QUERY = 0x1,
60 };
61
62 enum ufs_event_type {
63 /* uic specific errors */
64 UFS_EVT_PA_ERR = 0,
65 UFS_EVT_DL_ERR,
66 UFS_EVT_NL_ERR,
67 UFS_EVT_TL_ERR,
68 UFS_EVT_DME_ERR,
69
70 /* fatal errors */
71 UFS_EVT_AUTO_HIBERN8_ERR,
72 UFS_EVT_FATAL_ERR,
73 UFS_EVT_LINK_STARTUP_FAIL,
74 UFS_EVT_RESUME_ERR,
75 UFS_EVT_SUSPEND_ERR,
76
77 /* abnormal events */
78 UFS_EVT_DEV_RESET,
79 UFS_EVT_HOST_RESET,
80 UFS_EVT_ABORT,
81
82 UFS_EVT_CNT,
83 };
84
85 /**
86 * struct uic_command - UIC command structure
87 * @command: UIC command
88 * @argument1: UIC command argument 1
89 * @argument2: UIC command argument 2
90 * @argument3: UIC command argument 3
91 * @cmd_active: Indicate if UIC command is outstanding
92 * @done: UIC command completion
93 */
94 struct uic_command {
95 u32 command;
96 u32 argument1;
97 u32 argument2;
98 u32 argument3;
99 int cmd_active;
100 struct completion done;
101 };
102
103 /* Used to differentiate the power management options */
104 enum ufs_pm_op {
105 UFS_RUNTIME_PM,
106 UFS_SYSTEM_PM,
107 UFS_SHUTDOWN_PM,
108 };
109
110 #define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
111 #define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
112 #define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
113
114 /* Host <-> Device UniPro Link state */
115 enum uic_link_state {
116 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
117 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
118 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
119 UIC_LINK_BROKEN_STATE = 3, /* Link is in broken state */
120 };
121
122 #define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
123 #define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
124 UIC_LINK_ACTIVE_STATE)
125 #define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
126 UIC_LINK_HIBERN8_STATE)
127 #define ufshcd_is_link_broken(hba) ((hba)->uic_link_state == \
128 UIC_LINK_BROKEN_STATE)
129 #define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
130 #define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
131 UIC_LINK_ACTIVE_STATE)
132 #define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
133 UIC_LINK_HIBERN8_STATE)
134 #define ufshcd_set_link_broken(hba) ((hba)->uic_link_state = \
135 UIC_LINK_BROKEN_STATE)
136
137 #define ufshcd_set_ufs_dev_active(h) \
138 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
139 #define ufshcd_set_ufs_dev_sleep(h) \
140 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
141 #define ufshcd_set_ufs_dev_poweroff(h) \
142 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
143 #define ufshcd_is_ufs_dev_active(h) \
144 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
145 #define ufshcd_is_ufs_dev_sleep(h) \
146 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
147 #define ufshcd_is_ufs_dev_poweroff(h) \
148 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
149
150 /*
151 * UFS Power management levels.
152 * Each level is in increasing order of power savings.
153 */
154 enum ufs_pm_level {
155 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
156 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
157 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
158 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
159 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
160 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
161 UFS_PM_LVL_MAX
162 };
163
164 struct ufs_pm_lvl_states {
165 enum ufs_dev_pwr_mode dev_state;
166 enum uic_link_state link_state;
167 };
168
169 /**
170 * struct ufshcd_lrb - local reference block
171 * @utr_descriptor_ptr: UTRD address of the command
172 * @ucd_req_ptr: UCD address of the command
173 * @ucd_rsp_ptr: Response UPIU address for this command
174 * @ucd_prdt_ptr: PRDT address of the command
175 * @utrd_dma_addr: UTRD dma address for debug
176 * @ucd_prdt_dma_addr: PRDT dma address for debug
177 * @ucd_rsp_dma_addr: UPIU response dma address for debug
178 * @ucd_req_dma_addr: UPIU request dma address for debug
179 * @cmd: pointer to SCSI command
180 * @sense_buffer: pointer to sense buffer address of the SCSI command
181 * @sense_bufflen: Length of the sense buffer
182 * @scsi_status: SCSI status of the command
183 * @command_type: SCSI, UFS, Query.
184 * @task_tag: Task tag of the command
185 * @lun: LUN of the command
186 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
187 * @issue_time_stamp: time stamp for debug purposes
188 * @compl_time_stamp: time stamp for statistics
189 * @crypto_key_slot: the key slot to use for inline crypto (-1 if none)
190 * @data_unit_num: the data unit number for the first block for inline crypto
191 * @req_abort_skip: skip request abort task flag
192 */
193 struct ufshcd_lrb {
194 struct utp_transfer_req_desc *utr_descriptor_ptr;
195 struct utp_upiu_req *ucd_req_ptr;
196 struct utp_upiu_rsp *ucd_rsp_ptr;
197 struct ufshcd_sg_entry *ucd_prdt_ptr;
198
199 dma_addr_t utrd_dma_addr;
200 dma_addr_t ucd_req_dma_addr;
201 dma_addr_t ucd_rsp_dma_addr;
202 dma_addr_t ucd_prdt_dma_addr;
203
204 struct scsi_cmnd *cmd;
205 u8 *sense_buffer;
206 unsigned int sense_bufflen;
207 int scsi_status;
208
209 int command_type;
210 int task_tag;
211 u8 lun; /* UPIU LUN id field is only 8-bit wide */
212 bool intr_cmd;
213 ktime_t issue_time_stamp;
214 ktime_t compl_time_stamp;
215 #ifdef CONFIG_SCSI_UFS_CRYPTO
216 int crypto_key_slot;
217 u64 data_unit_num;
218 #endif
219
220 bool req_abort_skip;
221
222 ANDROID_KABI_RESERVE(1);
223 };
224
225 /**
226 * struct ufs_query - holds relevant data structures for query request
227 * @request: request upiu and function
228 * @descriptor: buffer for sending/receiving descriptor
229 * @response: response upiu and response
230 */
231 struct ufs_query {
232 struct ufs_query_req request;
233 u8 *descriptor;
234 struct ufs_query_res response;
235 };
236
237 /**
238 * struct ufs_dev_cmd - all assosiated fields with device management commands
239 * @type: device management command type - Query, NOP OUT
240 * @lock: lock to allow one command at a time
241 * @complete: internal commands completion
242 */
243 struct ufs_dev_cmd {
244 enum dev_cmd_type type;
245 struct mutex lock;
246 struct completion *complete;
247 struct ufs_query query;
248 };
249
250 /**
251 * struct ufs_clk_info - UFS clock related info
252 * @list: list headed by hba->clk_list_head
253 * @clk: clock node
254 * @name: clock name
255 * @max_freq: maximum frequency supported by the clock
256 * @min_freq: min frequency that can be used for clock scaling
257 * @curr_freq: indicates the current frequency that it is set to
258 * @keep_link_active: indicates that the clk should not be disabled if
259 link is active
260 * @enabled: variable to check against multiple enable/disable
261 */
262 struct ufs_clk_info {
263 struct list_head list;
264 struct clk *clk;
265 const char *name;
266 u32 max_freq;
267 u32 min_freq;
268 u32 curr_freq;
269 bool keep_link_active;
270 bool enabled;
271 };
272
273 enum ufs_notify_change_status {
274 PRE_CHANGE,
275 POST_CHANGE,
276 };
277
278 struct ufs_pa_layer_attr {
279 u32 gear_rx;
280 u32 gear_tx;
281 u32 lane_rx;
282 u32 lane_tx;
283 u32 pwr_rx;
284 u32 pwr_tx;
285 u32 hs_rate;
286 };
287
288 struct ufs_pwr_mode_info {
289 bool is_valid;
290 struct ufs_pa_layer_attr info;
291 };
292
293 /**
294 * struct ufs_hba_variant_ops - variant specific callbacks
295 * @name: variant name
296 * @init: called when the driver is initialized
297 * @exit: called to cleanup everything done in init
298 * @get_ufs_hci_version: called to get UFS HCI version
299 * @clk_scale_notify: notifies that clks are scaled up/down
300 * @setup_clocks: called before touching any of the controller registers
301 * @setup_regulators: called before accessing the host controller
302 * @hce_enable_notify: called before and after HCE enable bit is set to allow
303 * variant specific Uni-Pro initialization.
304 * @link_startup_notify: called before and after Link startup is carried out
305 * to allow variant specific Uni-Pro initialization.
306 * @pwr_change_notify: called before and after a power mode change
307 * is carried out to allow vendor spesific capabilities
308 * to be set.
309 * @setup_xfer_req: called before any transfer request is issued
310 * to set some things
311 * @setup_task_mgmt: called before any task management request is issued
312 * to set some things
313 * @hibern8_notify: called around hibern8 enter/exit
314 * @apply_dev_quirks: called to apply device specific quirks
315 * @suspend: called during host controller PM callback
316 * @resume: called during host controller PM callback
317 * @dbg_register_dump: used to dump controller debug information
318 * @phy_initialization: used to initialize phys
319 * @device_reset: called to issue a reset pulse on the UFS device
320 * @program_key: program or evict an inline encryption key
321 * @event_notify: called to notify important events
322 */
323 struct ufs_hba_variant_ops {
324 const char *name;
325 int (*init)(struct ufs_hba *);
326 void (*exit)(struct ufs_hba *);
327 u32 (*get_ufs_hci_version)(struct ufs_hba *);
328 int (*clk_scale_notify)(struct ufs_hba *, bool,
329 enum ufs_notify_change_status);
330 int (*setup_clocks)(struct ufs_hba *, bool,
331 enum ufs_notify_change_status);
332 int (*setup_regulators)(struct ufs_hba *, bool);
333 int (*hce_enable_notify)(struct ufs_hba *,
334 enum ufs_notify_change_status);
335 int (*link_startup_notify)(struct ufs_hba *,
336 enum ufs_notify_change_status);
337 int (*pwr_change_notify)(struct ufs_hba *,
338 enum ufs_notify_change_status status,
339 struct ufs_pa_layer_attr *,
340 struct ufs_pa_layer_attr *);
341 void (*setup_xfer_req)(struct ufs_hba *, int, bool);
342 void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
343 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
344 enum ufs_notify_change_status);
345 int (*apply_dev_quirks)(struct ufs_hba *hba);
346 void (*fixup_dev_quirks)(struct ufs_hba *hba);
347 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
348 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
349 void (*dbg_register_dump)(struct ufs_hba *hba);
350 int (*phy_initialization)(struct ufs_hba *);
351 int (*device_reset)(struct ufs_hba *hba);
352 void (*config_scaling_param)(struct ufs_hba *hba,
353 struct devfreq_dev_profile *profile,
354 void *data);
355 int (*program_key)(struct ufs_hba *hba,
356 const union ufs_crypto_cfg_entry *cfg, int slot);
357 void (*event_notify)(struct ufs_hba *hba,
358 enum ufs_event_type evt, void *data);
359
360 ANDROID_KABI_RESERVE(1);
361 ANDROID_KABI_RESERVE(2);
362 ANDROID_KABI_RESERVE(3);
363 ANDROID_KABI_RESERVE(4);
364 };
365
366 /* clock gating state */
367 enum clk_gating_state {
368 CLKS_OFF,
369 CLKS_ON,
370 REQ_CLKS_OFF,
371 REQ_CLKS_ON,
372 };
373
374 /**
375 * struct ufs_clk_gating - UFS clock gating related info
376 * @gate_work: worker to turn off clocks after some delay as specified in
377 * delay_ms
378 * @ungate_work: worker to turn on clocks that will be used in case of
379 * interrupt context
380 * @state: the current clocks state
381 * @delay_ms: gating delay in ms
382 * @is_suspended: clk gating is suspended when set to 1 which can be used
383 * during suspend/resume
384 * @delay_attr: sysfs attribute to control delay_attr
385 * @enable_attr: sysfs attribute to enable/disable clock gating
386 * @is_enabled: Indicates the current status of clock gating
387 * @is_initialized: Indicates whether clock gating is initialized or not
388 * @active_reqs: number of requests that are pending and should be waited for
389 * completion before gating clocks.
390 */
391 struct ufs_clk_gating {
392 struct delayed_work gate_work;
393 struct work_struct ungate_work;
394 enum clk_gating_state state;
395 unsigned long delay_ms;
396 bool is_suspended;
397 struct device_attribute delay_attr;
398 struct device_attribute enable_attr;
399 bool is_enabled;
400 bool is_initialized;
401 int active_reqs;
402 struct workqueue_struct *clk_gating_workq;
403
404 ANDROID_KABI_RESERVE(1);
405 };
406
407 struct ufs_saved_pwr_info {
408 struct ufs_pa_layer_attr info;
409 bool is_valid;
410 };
411
412 /**
413 * struct ufs_clk_scaling - UFS clock scaling related data
414 * @active_reqs: number of requests that are pending. If this is zero when
415 * devfreq ->target() function is called then schedule "suspend_work" to
416 * suspend devfreq.
417 * @tot_busy_t: Total busy time in current polling window
418 * @window_start_t: Start time (in jiffies) of the current polling window
419 * @busy_start_t: Start time of current busy period
420 * @enable_attr: sysfs attribute to enable/disable clock scaling
421 * @saved_pwr_info: UFS power mode may also be changed during scaling and this
422 * one keeps track of previous power mode.
423 * @workq: workqueue to schedule devfreq suspend/resume work
424 * @suspend_work: worker to suspend devfreq
425 * @resume_work: worker to resume devfreq
426 * @min_gear: lowest HS gear to scale down to
427 * @is_enabled: tracks if scaling is currently enabled or not, controlled by
428 clkscale_enable sysfs node
429 * @is_allowed: tracks if scaling is currently allowed or not, used to block
430 clock scaling which is not invoked from devfreq governor
431 * @is_initialized: Indicates whether clock scaling is initialized or not
432 * @is_busy_started: tracks if busy period has started or not
433 * @is_suspended: tracks if devfreq is suspended or not
434 */
435 struct ufs_clk_scaling {
436 int active_reqs;
437 unsigned long tot_busy_t;
438 ktime_t window_start_t;
439 ktime_t busy_start_t;
440 struct device_attribute enable_attr;
441 struct ufs_saved_pwr_info saved_pwr_info;
442 struct workqueue_struct *workq;
443 struct work_struct suspend_work;
444 struct work_struct resume_work;
445 u32 min_gear;
446 bool is_enabled;
447 bool is_allowed;
448 bool is_initialized;
449 bool is_busy_started;
450 bool is_suspended;
451
452 ANDROID_KABI_RESERVE(1);
453 };
454
455 #define UFS_EVENT_HIST_LENGTH 8
456 /**
457 * struct ufs_event_hist - keeps history of errors
458 * @pos: index to indicate cyclic buffer position
459 * @reg: cyclic buffer for registers value
460 * @tstamp: cyclic buffer for time stamp
461 * @cnt: error counter
462 */
463 struct ufs_event_hist {
464 int pos;
465 u32 val[UFS_EVENT_HIST_LENGTH];
466 ktime_t tstamp[UFS_EVENT_HIST_LENGTH];
467 unsigned long long cnt;
468 };
469
470 /**
471 * struct ufs_stats - keeps usage/err statistics
472 * @last_intr_status: record the last interrupt status.
473 * @last_intr_ts: record the last interrupt timestamp.
474 * @hibern8_exit_cnt: Counter to keep track of number of exits,
475 * reset this after link-startup.
476 * @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
477 * Clear after the first successful command completion.
478 */
479 struct ufs_stats {
480 u32 last_intr_status;
481 ktime_t last_intr_ts;
482
483 u32 hibern8_exit_cnt;
484 ktime_t last_hibern8_exit_tstamp;
485 struct ufs_event_hist event[UFS_EVT_CNT];
486 };
487
488 enum ufshcd_quirks {
489 /* Interrupt aggregation support is broken */
490 UFSHCD_QUIRK_BROKEN_INTR_AGGR = 1 << 0,
491
492 /*
493 * delay before each dme command is required as the unipro
494 * layer has shown instabilities
495 */
496 UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS = 1 << 1,
497
498 /*
499 * If UFS host controller is having issue in processing LCC (Line
500 * Control Command) coming from device then enable this quirk.
501 * When this quirk is enabled, host controller driver should disable
502 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
503 * attribute of device to 0).
504 */
505 UFSHCD_QUIRK_BROKEN_LCC = 1 << 2,
506
507 /*
508 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
509 * inbound Link supports unterminated line in HS mode. Setting this
510 * attribute to 1 fixes moving to HS gear.
511 */
512 UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP = 1 << 3,
513
514 /*
515 * This quirk needs to be enabled if the host controller only allows
516 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
517 * SLOW AUTO).
518 */
519 UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE = 1 << 4,
520
521 /*
522 * This quirk needs to be enabled if the host controller doesn't
523 * advertise the correct version in UFS_VER register. If this quirk
524 * is enabled, standard UFS host driver will call the vendor specific
525 * ops (get_ufs_hci_version) to get the correct version.
526 */
527 UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION = 1 << 5,
528
529 /*
530 * Clear handling for transfer/task request list is just opposite.
531 */
532 UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR = 1 << 6,
533
534 /*
535 * This quirk needs to be enabled if host controller doesn't allow
536 * that the interrupt aggregation timer and counter are reset by s/w.
537 */
538 UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR = 1 << 7,
539
540 /*
541 * This quirks needs to be enabled if host controller cannot be
542 * enabled via HCE register.
543 */
544 UFSHCI_QUIRK_BROKEN_HCE = 1 << 8,
545
546 /*
547 * This quirk needs to be enabled if the host controller regards
548 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
549 */
550 UFSHCD_QUIRK_PRDT_BYTE_GRAN = 1 << 9,
551
552 /*
553 * This quirk needs to be enabled if the host controller reports
554 * OCS FATAL ERROR with device error through sense data
555 */
556 UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR = 1 << 10,
557
558 /*
559 * This quirk needs to be enabled if the host controller has
560 * auto-hibernate capability but it doesn't work.
561 */
562 UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8 = 1 << 11,
563
564 /*
565 * This quirk needs to disable manual flush for write booster
566 */
567 UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL = 1 << 12,
568
569 /*
570 * This quirk needs to disable unipro timeout values
571 * before power mode change
572 */
573 UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING = 1 << 13,
574
575 /*
576 * This quirk allows only sg entries aligned with page size.
577 */
578 UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE = 1 << 14,
579
580 /*
581 * This quirk needs to be enabled if the host controller does not
582 * support UIC command
583 */
584 UFSHCD_QUIRK_BROKEN_UIC_CMD = 1 << 15,
585
586 /*
587 * This quirk needs to be enabled if the host controller cannot
588 * support interface configuration.
589 */
590 UFSHCD_QUIRK_SKIP_INTERFACE_CONFIGURATION = 1 << 16,
591
592 /*
593 * This quirk needs to be enabled if the host controller supports inline
594 * encryption, but it needs to initialize the crypto capabilities in a
595 * nonstandard way and/or it needs to override blk_ksm_ll_ops. If
596 * enabled, the standard code won't initialize the blk_keyslot_manager;
597 * ufs_hba_variant_ops::init() must do it instead.
598 */
599 UFSHCD_QUIRK_CUSTOM_KEYSLOT_MANAGER = 1 << 20,
600
601 /*
602 * This quirk needs to be enabled if the host controller supports inline
603 * encryption, but the CRYPTO_GENERAL_ENABLE bit is not implemented and
604 * breaks the HCE sequence if used.
605 */
606 UFSHCD_QUIRK_BROKEN_CRYPTO_ENABLE = 1 << 21,
607
608 /*
609 * This quirk needs to be enabled if the host controller requires that
610 * the PRDT be cleared after each encrypted request because encryption
611 * keys were stored in it.
612 */
613 UFSHCD_QUIRK_KEYS_IN_PRDT = 1 << 22,
614 };
615
616 enum ufshcd_caps {
617 /* Allow dynamic clk gating */
618 UFSHCD_CAP_CLK_GATING = 1 << 0,
619
620 /* Allow hiberb8 with clk gating */
621 UFSHCD_CAP_HIBERN8_WITH_CLK_GATING = 1 << 1,
622
623 /* Allow dynamic clk scaling */
624 UFSHCD_CAP_CLK_SCALING = 1 << 2,
625
626 /* Allow auto bkops to enabled during runtime suspend */
627 UFSHCD_CAP_AUTO_BKOPS_SUSPEND = 1 << 3,
628
629 /*
630 * This capability allows host controller driver to use the UFS HCI's
631 * interrupt aggregation capability.
632 * CAUTION: Enabling this might reduce overall UFS throughput.
633 */
634 UFSHCD_CAP_INTR_AGGR = 1 << 4,
635
636 /*
637 * This capability allows the device auto-bkops to be always enabled
638 * except during suspend (both runtime and suspend).
639 * Enabling this capability means that device will always be allowed
640 * to do background operation when it's active but it might degrade
641 * the performance of ongoing read/write operations.
642 */
643 UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND = 1 << 5,
644
645 /*
646 * This capability allows host controller driver to automatically
647 * enable runtime power management by itself instead of waiting
648 * for userspace to control the power management.
649 */
650 UFSHCD_CAP_RPM_AUTOSUSPEND = 1 << 6,
651
652 /*
653 * This capability allows the host controller driver to turn-on
654 * WriteBooster, if the underlying device supports it and is
655 * provisioned to be used. This would increase the write performance.
656 */
657 UFSHCD_CAP_WB_EN = 1 << 7,
658
659 /*
660 * This capability allows the host controller driver to use the
661 * inline crypto engine, if it is present
662 */
663 UFSHCD_CAP_CRYPTO = 1 << 8,
664
665 /*
666 * This capability allows the controller regulators to be put into
667 * lpm mode aggressively during clock gating.
668 * This would increase power savings.
669 */
670 UFSHCD_CAP_AGGR_POWER_COLLAPSE = 1 << 9,
671 };
672
673 struct ufs_hba_variant_params {
674 struct devfreq_dev_profile devfreq_profile;
675 struct devfreq_simple_ondemand_data ondemand_data;
676 u16 hba_enable_delay_us;
677 u32 wb_flush_threshold;
678 };
679
680 #ifdef CONFIG_SCSI_UFS_HPB
681 /**
682 * struct ufshpb_dev_info - UFSHPB device related info
683 * @num_lu: the number of user logical unit to check whether all lu finished
684 * initialization
685 * @rgn_size: device reported HPB region size
686 * @srgn_size: device reported HPB sub-region size
687 * @slave_conf_cnt: counter to check all lu finished initialization
688 * @hpb_disabled: flag to check if HPB is disabled
689 * @max_hpb_single_cmd: device reported bMAX_DATA_SIZE_FOR_SINGLE_CMD value
690 * @is_legacy: flag to check HPB 1.0
691 * @control_mode: either host or device
692 */
693 struct ufshpb_dev_info {
694 int num_lu;
695 int rgn_size;
696 int srgn_size;
697 atomic_t slave_conf_cnt;
698 bool hpb_disabled;
699 u8 max_hpb_single_cmd;
700 bool is_legacy;
701 u8 control_mode;
702 };
703 #endif
704
705 struct ufs_hba_monitor {
706 unsigned long chunk_size;
707
708 unsigned long nr_sec_rw[2];
709 ktime_t total_busy[2];
710
711 unsigned long nr_req[2];
712 /* latencies*/
713 ktime_t lat_sum[2];
714 ktime_t lat_max[2];
715 ktime_t lat_min[2];
716
717 u32 nr_queued[2];
718 ktime_t busy_start_ts[2];
719
720 ktime_t enabled_ts;
721 bool enabled;
722 };
723
724 /**
725 * struct ufs_hba - per adapter private structure
726 * @mmio_base: UFSHCI base register address
727 * @ucdl_base_addr: UFS Command Descriptor base address
728 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
729 * @utmrdl_base_addr: UTP Task Management Descriptor base address
730 * @ucdl_dma_addr: UFS Command Descriptor DMA address
731 * @utrdl_dma_addr: UTRDL DMA address
732 * @utmrdl_dma_addr: UTMRDL DMA address
733 * @host: Scsi_Host instance of the driver
734 * @dev: device handle
735 * @lrb: local reference block
736 * @cmd_queue: Used to allocate command tags from hba->host->tag_set.
737 * @outstanding_tasks: Bits representing outstanding task requests
738 * @outstanding_reqs: Bits representing outstanding transfer requests
739 * @capabilities: UFS Controller Capabilities
740 * @nutrs: Transfer Request Queue depth supported by controller
741 * @nutmrs: Task Management Queue depth supported by controller
742 * @reserved_slot: Used to submit device commands. Protected by @dev_cmd.lock.
743 * @ufs_version: UFS Version to which controller complies
744 * @vops: pointer to variant specific operations
745 * @priv: pointer to variant specific private data
746 * @sg_entry_size: size of struct ufshcd_sg_entry (may include variant fields)
747 * @irq: Irq number of the controller
748 * @active_uic_cmd: handle of active UIC command
749 * @uic_cmd_mutex: mutex for uic command
750 * @tmf_tag_set: TMF tag set.
751 * @tmf_queue: Used to allocate TMF tags.
752 * @pwr_done: completion for power mode change
753 * @ufshcd_state: UFSHCD states
754 * @eh_flags: Error handling flags
755 * @intr_mask: Interrupt Mask Bits
756 * @ee_ctrl_mask: Exception event control mask
757 * @is_powered: flag to check if HBA is powered
758 * @shutting_down: flag to check if shutdown has been invoked
759 * @host_sem: semaphore used to serialize concurrent contexts
760 * @eh_wq: Workqueue that eh_work works on
761 * @eh_work: Worker to handle UFS errors that require s/w attention
762 * @eeh_work: Worker to handle exception events
763 * @errors: HBA errors
764 * @uic_error: UFS interconnect layer error status
765 * @saved_err: sticky error mask
766 * @saved_uic_err: sticky UIC error mask
767 * @force_reset: flag to force eh_work perform a full reset
768 * @force_pmc: flag to force a power mode change
769 * @silence_err_logs: flag to silence error logs
770 * @dev_cmd: ufs device management command information
771 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
772 * @auto_bkops_enabled: to track whether bkops is enabled in device
773 * @vreg_info: UFS device voltage regulator information
774 * @clk_list_head: UFS host controller clocks list node head
775 * @pwr_info: holds current power mode
776 * @max_pwr_info: keeps the device max valid pwm
777 * @desc_size: descriptor sizes reported by device
778 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
779 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
780 * device is known or not.
781 * @scsi_block_reqs_cnt: reference counting for scsi block requests
782 * @crypto_capabilities: Content of crypto capabilities register (0x100)
783 * @crypto_cap_array: Array of crypto capabilities
784 * @crypto_cfg_register: Start of the crypto cfg array
785 * @ksm: the keyslot manager tied to this hba
786 */
787 struct ufs_hba {
788 void __iomem *mmio_base;
789
790 /* Virtual memory reference */
791 struct utp_transfer_cmd_desc *ucdl_base_addr;
792 struct utp_transfer_req_desc *utrdl_base_addr;
793 struct utp_task_req_desc *utmrdl_base_addr;
794
795 /* DMA memory reference */
796 dma_addr_t ucdl_dma_addr;
797 dma_addr_t utrdl_dma_addr;
798 dma_addr_t utmrdl_dma_addr;
799
800 struct Scsi_Host *host;
801 struct device *dev;
802 struct request_queue *cmd_queue;
803 /*
804 * This field is to keep a reference to "scsi_device" corresponding to
805 * "UFS device" W-LU.
806 */
807 struct scsi_device *sdev_ufs_device;
808 struct scsi_device *sdev_rpmb;
809
810 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
811 enum uic_link_state uic_link_state;
812 /* Desired UFS power management level during runtime PM */
813 enum ufs_pm_level rpm_lvl;
814 /* Desired UFS power management level during system PM */
815 enum ufs_pm_level spm_lvl;
816 struct device_attribute rpm_lvl_attr;
817 struct device_attribute spm_lvl_attr;
818 int pm_op_in_progress;
819
820 /* Auto-Hibernate Idle Timer register value */
821 u32 ahit;
822
823 struct ufshcd_lrb *lrb;
824
825 unsigned long outstanding_tasks;
826 unsigned long outstanding_reqs;
827
828 u32 capabilities;
829 int nutrs;
830 int nutmrs;
831 #if 0
832 /*
833 * This has been moved into struct ufs_hba_add_info because of the GKI.
834 */
835 u32 reserved_slot;
836 #endif
837 u32 ufs_version;
838 const struct ufs_hba_variant_ops *vops;
839 struct ufs_hba_variant_params *vps;
840 void *priv;
841 size_t sg_entry_size;
842 unsigned int irq;
843 bool is_irq_enabled;
844 enum ufs_ref_clk_freq dev_ref_clk_freq;
845
846 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
847
848 /* Device deviations from standard UFS device spec. */
849 unsigned int dev_quirks;
850
851 struct blk_mq_tag_set tmf_tag_set;
852 struct request_queue *tmf_queue;
853 #if 0
854 /*
855 * This has been moved into struct ufs_hba_add_info because of the GKI.
856 */
857 struct request **tmf_rqs;
858 #endif
859
860 struct uic_command *active_uic_cmd;
861 struct mutex uic_cmd_mutex;
862 struct completion *uic_async_done;
863
864 u32 ufshcd_state;
865 u32 eh_flags;
866 u32 intr_mask;
867 u16 ee_ctrl_mask;
868 bool is_powered;
869 bool shutting_down;
870 struct semaphore host_sem;
871
872 /* Work Queues */
873 struct workqueue_struct *eh_wq;
874 struct work_struct eh_work;
875 struct work_struct eeh_work;
876
877 /* HBA Errors */
878 u32 errors;
879 u32 uic_error;
880 u32 saved_err;
881 u32 saved_uic_err;
882 struct ufs_stats ufs_stats;
883 bool force_reset;
884 bool force_pmc;
885 bool silence_err_logs;
886
887 /* Device management request data */
888 struct ufs_dev_cmd dev_cmd;
889 ktime_t last_dme_cmd_tstamp;
890
891 /* Keeps information of the UFS device connected to this host */
892 struct ufs_dev_info dev_info;
893 bool auto_bkops_enabled;
894 struct ufs_vreg_info vreg_info;
895 struct list_head clk_list_head;
896
897 bool wlun_dev_clr_ua;
898
899 /* Number of requests aborts */
900 int req_abort_count;
901
902 /* Number of lanes available (1 or 2) for Rx/Tx */
903 u32 lanes_per_direction;
904 struct ufs_pa_layer_attr pwr_info;
905 struct ufs_pwr_mode_info max_pwr_info;
906
907 struct ufs_clk_gating clk_gating;
908 /* Control to enable/disable host capabilities */
909 u32 caps;
910
911 struct devfreq *devfreq;
912 struct ufs_clk_scaling clk_scaling;
913 bool is_sys_suspended;
914
915 enum bkops_status urgent_bkops_lvl;
916 bool is_urgent_bkops_lvl_checked;
917
918 struct rw_semaphore clk_scaling_lock;
919 unsigned char desc_size[QUERY_DESC_IDN_MAX];
920 atomic_t scsi_block_reqs_cnt;
921
922 struct device bsg_dev;
923 struct request_queue *bsg_queue;
924 bool wb_buf_flush_enabled;
925 bool wb_enabled;
926 struct delayed_work rpm_dev_flush_recheck_work;
927
928 #if 0
929 /* This has been moved into struct ufs_hba_add_info. */
930 struct ufshpb_dev_info ufshpb_dev;
931 #endif
932
933 struct ufs_hba_monitor monitor;
934
935 #ifdef CONFIG_SCSI_UFS_CRYPTO
936 union ufs_crypto_capabilities crypto_capabilities;
937 union ufs_crypto_cap_entry *crypto_cap_array;
938 u32 crypto_cfg_register;
939 struct blk_keyslot_manager ksm;
940 #endif
941 #ifdef CONFIG_DEBUG_FS
942 struct dentry *debugfs_root;
943 #endif
944
945 ANDROID_KABI_RESERVE(1);
946 ANDROID_KABI_RESERVE(2);
947 ANDROID_KABI_RESERVE(3);
948 ANDROID_KABI_RESERVE(4);
949 };
950
951 /* Returns true if clocks can be gated. Otherwise false */
ufshcd_is_clkgating_allowed(struct ufs_hba * hba)952 static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
953 {
954 return hba->caps & UFSHCD_CAP_CLK_GATING;
955 }
ufshcd_can_hibern8_during_gating(struct ufs_hba * hba)956 static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
957 {
958 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
959 }
ufshcd_is_clkscaling_supported(struct ufs_hba * hba)960 static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
961 {
962 return hba->caps & UFSHCD_CAP_CLK_SCALING;
963 }
ufshcd_can_autobkops_during_suspend(struct ufs_hba * hba)964 static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
965 {
966 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
967 }
ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba * hba)968 static inline bool ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba *hba)
969 {
970 return hba->caps & UFSHCD_CAP_RPM_AUTOSUSPEND;
971 }
972
ufshcd_is_intr_aggr_allowed(struct ufs_hba * hba)973 static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
974 {
975 /* DWC UFS Core has the Interrupt aggregation feature but is not detectable*/
976 #ifndef CONFIG_SCSI_UFS_DWC
977 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
978 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
979 return true;
980 else
981 return false;
982 #else
983 return true;
984 #endif
985 }
986
ufshcd_can_aggressive_pc(struct ufs_hba * hba)987 static inline bool ufshcd_can_aggressive_pc(struct ufs_hba *hba)
988 {
989 return !!(ufshcd_is_link_hibern8(hba) &&
990 (hba->caps & UFSHCD_CAP_AGGR_POWER_COLLAPSE));
991 }
992
ufshcd_is_auto_hibern8_supported(struct ufs_hba * hba)993 static inline bool ufshcd_is_auto_hibern8_supported(struct ufs_hba *hba)
994 {
995 return (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) &&
996 !(hba->quirks & UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8);
997 }
998
ufshcd_is_auto_hibern8_enabled(struct ufs_hba * hba)999 static inline bool ufshcd_is_auto_hibern8_enabled(struct ufs_hba *hba)
1000 {
1001 return FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, hba->ahit) ? true : false;
1002 }
1003
ufshcd_is_wb_allowed(struct ufs_hba * hba)1004 static inline bool ufshcd_is_wb_allowed(struct ufs_hba *hba)
1005 {
1006 return hba->caps & UFSHCD_CAP_WB_EN;
1007 }
1008
ufshcd_is_user_access_allowed(struct ufs_hba * hba)1009 static inline bool ufshcd_is_user_access_allowed(struct ufs_hba *hba)
1010 {
1011 return !hba->shutting_down;
1012 }
1013
1014 #define ufshcd_writel(hba, val, reg) \
1015 writel((val), (hba)->mmio_base + (reg))
1016 #define ufshcd_readl(hba, reg) \
1017 readl((hba)->mmio_base + (reg))
1018
1019 /**
1020 * ufshcd_rmwl - read modify write into a register
1021 * @hba - per adapter instance
1022 * @mask - mask to apply on read value
1023 * @val - actual value to write
1024 * @reg - register address
1025 */
ufshcd_rmwl(struct ufs_hba * hba,u32 mask,u32 val,u32 reg)1026 static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
1027 {
1028 u32 tmp;
1029
1030 tmp = ufshcd_readl(hba, reg);
1031 tmp &= ~mask;
1032 tmp |= (val & mask);
1033 ufshcd_writel(hba, tmp, reg);
1034 }
1035
1036 int ufshcd_alloc_host(struct device *, struct ufs_hba **);
1037 void ufshcd_dealloc_host(struct ufs_hba *);
1038 int ufshcd_hba_enable(struct ufs_hba *hba);
1039 int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
1040 int ufshcd_link_recovery(struct ufs_hba *hba);
1041 int ufshcd_make_hba_operational(struct ufs_hba *hba);
1042 void ufshcd_remove(struct ufs_hba *);
1043 int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
1044 void ufshcd_delay_us(unsigned long us, unsigned long tolerance);
1045 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
1046 u32 val, unsigned long interval_us,
1047 unsigned long timeout_ms);
1048 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk);
1049 void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val);
1050 void ufshcd_hba_stop(struct ufs_hba *hba);
1051
check_upiu_size(void)1052 static inline void check_upiu_size(void)
1053 {
1054 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
1055 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
1056 }
1057
1058 /**
1059 * ufshcd_set_variant - set variant specific data to the hba
1060 * @hba - per adapter instance
1061 * @variant - pointer to variant specific data
1062 */
ufshcd_set_variant(struct ufs_hba * hba,void * variant)1063 static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
1064 {
1065 BUG_ON(!hba);
1066 hba->priv = variant;
1067 }
1068
1069 /**
1070 * ufshcd_get_variant - get variant specific data from the hba
1071 * @hba - per adapter instance
1072 */
ufshcd_get_variant(struct ufs_hba * hba)1073 static inline void *ufshcd_get_variant(struct ufs_hba *hba)
1074 {
1075 BUG_ON(!hba);
1076 return hba->priv;
1077 }
ufshcd_keep_autobkops_enabled_except_suspend(struct ufs_hba * hba)1078 static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
1079 struct ufs_hba *hba)
1080 {
1081 return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
1082 }
1083
ufshcd_wb_get_query_index(struct ufs_hba * hba)1084 static inline u8 ufshcd_wb_get_query_index(struct ufs_hba *hba)
1085 {
1086 if (hba->dev_info.b_wb_buffer_type == WB_BUF_MODE_LU_DEDICATED)
1087 return hba->dev_info.wb_dedicated_lu;
1088 return 0;
1089 }
1090
1091 extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
1092 extern int ufshcd_runtime_resume(struct ufs_hba *hba);
1093 extern int ufshcd_runtime_idle(struct ufs_hba *hba);
1094 extern int ufshcd_system_suspend(struct ufs_hba *hba);
1095 extern int ufshcd_system_resume(struct ufs_hba *hba);
1096 extern int ufshcd_shutdown(struct ufs_hba *hba);
1097 extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
1098 u8 attr_set, u32 mib_val, u8 peer);
1099 extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
1100 u32 *mib_val, u8 peer);
1101 extern int ufshcd_config_pwr_mode(struct ufs_hba *hba,
1102 struct ufs_pa_layer_attr *desired_pwr_mode);
1103
1104 /* UIC command interfaces for DME primitives */
1105 #define DME_LOCAL 0
1106 #define DME_PEER 1
1107 #define ATTR_SET_NOR 0 /* NORMAL */
1108 #define ATTR_SET_ST 1 /* STATIC */
1109
ufshcd_dme_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1110 static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
1111 u32 mib_val)
1112 {
1113 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
1114 mib_val, DME_LOCAL);
1115 }
1116
ufshcd_dme_st_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1117 static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
1118 u32 mib_val)
1119 {
1120 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
1121 mib_val, DME_LOCAL);
1122 }
1123
ufshcd_dme_peer_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1124 static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
1125 u32 mib_val)
1126 {
1127 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
1128 mib_val, DME_PEER);
1129 }
1130
ufshcd_dme_peer_st_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1131 static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
1132 u32 mib_val)
1133 {
1134 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
1135 mib_val, DME_PEER);
1136 }
1137
ufshcd_dme_get(struct ufs_hba * hba,u32 attr_sel,u32 * mib_val)1138 static inline int ufshcd_dme_get(struct ufs_hba *hba,
1139 u32 attr_sel, u32 *mib_val)
1140 {
1141 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
1142 }
1143
ufshcd_dme_peer_get(struct ufs_hba * hba,u32 attr_sel,u32 * mib_val)1144 static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
1145 u32 attr_sel, u32 *mib_val)
1146 {
1147 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
1148 }
1149
ufshcd_is_hs_mode(struct ufs_pa_layer_attr * pwr_info)1150 static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
1151 {
1152 return (pwr_info->pwr_rx == FAST_MODE ||
1153 pwr_info->pwr_rx == FASTAUTO_MODE) &&
1154 (pwr_info->pwr_tx == FAST_MODE ||
1155 pwr_info->pwr_tx == FASTAUTO_MODE);
1156 }
1157
ufshcd_disable_host_tx_lcc(struct ufs_hba * hba)1158 static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
1159 {
1160 return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0);
1161 }
1162
1163 /* Expose Query-Request API */
1164 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
1165 enum query_opcode opcode,
1166 enum desc_idn idn, u8 index,
1167 u8 selector,
1168 u8 *desc_buf, int *buf_len);
1169 int ufshcd_read_desc_param(struct ufs_hba *hba,
1170 enum desc_idn desc_id,
1171 int desc_index,
1172 u8 param_offset,
1173 u8 *param_read_buf,
1174 u8 param_size);
1175 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
1176 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val);
1177 int ufshcd_query_attr_retry(struct ufs_hba *hba,
1178 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
1179 u32 *attr_val);
1180 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
1181 enum flag_idn idn, u8 index, bool *flag_res);
1182 int ufshcd_query_flag_retry(struct ufs_hba *hba,
1183 enum query_opcode opcode, enum flag_idn idn, u8 index, bool *flag_res);
1184 int ufshcd_bkops_ctrl(struct ufs_hba *hba, enum bkops_status status);
1185
1186 void ufshcd_auto_hibern8_enable(struct ufs_hba *hba);
1187 void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit);
1188 void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups);
1189 #define SD_ASCII_STD true
1190 #define SD_RAW false
1191 int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
1192 u8 **buf, bool ascii);
1193
1194 int ufshcd_hold(struct ufs_hba *hba, bool async);
1195 void ufshcd_release(struct ufs_hba *hba);
1196
1197 void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
1198 int *desc_length);
1199
1200 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
1201
1202 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd);
1203
1204 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
1205 struct utp_upiu_req *req_upiu,
1206 struct utp_upiu_req *rsp_upiu,
1207 int msgcode,
1208 u8 *desc_buff, int *buff_len,
1209 enum query_opcode desc_op);
1210
1211 /* Wrapper functions for safely calling variant operations */
ufshcd_get_var_name(struct ufs_hba * hba)1212 static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
1213 {
1214 if (hba->vops)
1215 return hba->vops->name;
1216 return "";
1217 }
1218
ufshcd_vops_init(struct ufs_hba * hba)1219 static inline int ufshcd_vops_init(struct ufs_hba *hba)
1220 {
1221 if (hba->vops && hba->vops->init)
1222 return hba->vops->init(hba);
1223
1224 return 0;
1225 }
1226
ufshcd_vops_exit(struct ufs_hba * hba)1227 static inline void ufshcd_vops_exit(struct ufs_hba *hba)
1228 {
1229 if (hba->vops && hba->vops->exit)
1230 return hba->vops->exit(hba);
1231 }
1232
ufshcd_vops_get_ufs_hci_version(struct ufs_hba * hba)1233 static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
1234 {
1235 if (hba->vops && hba->vops->get_ufs_hci_version)
1236 return hba->vops->get_ufs_hci_version(hba);
1237
1238 return ufshcd_readl(hba, REG_UFS_VERSION);
1239 }
1240
ufshcd_has_utrlcnr(struct ufs_hba * hba)1241 static inline bool ufshcd_has_utrlcnr(struct ufs_hba *hba)
1242 {
1243 return (hba->ufs_version >= ufshci_version(3, 0));
1244 }
1245
ufshcd_vops_clk_scale_notify(struct ufs_hba * hba,bool up,enum ufs_notify_change_status status)1246 static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
1247 bool up, enum ufs_notify_change_status status)
1248 {
1249 if (hba->vops && hba->vops->clk_scale_notify)
1250 return hba->vops->clk_scale_notify(hba, up, status);
1251 return 0;
1252 }
1253
ufshcd_vops_event_notify(struct ufs_hba * hba,enum ufs_event_type evt,void * data)1254 static inline void ufshcd_vops_event_notify(struct ufs_hba *hba,
1255 enum ufs_event_type evt,
1256 void *data)
1257 {
1258 if (hba->vops && hba->vops->event_notify)
1259 hba->vops->event_notify(hba, evt, data);
1260 }
1261
ufshcd_vops_setup_clocks(struct ufs_hba * hba,bool on,enum ufs_notify_change_status status)1262 static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
1263 enum ufs_notify_change_status status)
1264 {
1265 if (hba->vops && hba->vops->setup_clocks)
1266 return hba->vops->setup_clocks(hba, on, status);
1267 return 0;
1268 }
1269
ufshcd_vops_setup_regulators(struct ufs_hba * hba,bool status)1270 static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
1271 {
1272 if (hba->vops && hba->vops->setup_regulators)
1273 return hba->vops->setup_regulators(hba, status);
1274
1275 return 0;
1276 }
1277
ufshcd_vops_hce_enable_notify(struct ufs_hba * hba,bool status)1278 static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
1279 bool status)
1280 {
1281 if (hba->vops && hba->vops->hce_enable_notify)
1282 return hba->vops->hce_enable_notify(hba, status);
1283
1284 return 0;
1285 }
ufshcd_vops_link_startup_notify(struct ufs_hba * hba,bool status)1286 static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
1287 bool status)
1288 {
1289 if (hba->vops && hba->vops->link_startup_notify)
1290 return hba->vops->link_startup_notify(hba, status);
1291
1292 return 0;
1293 }
1294
ufshcd_vops_pwr_change_notify(struct ufs_hba * hba,bool status,struct ufs_pa_layer_attr * dev_max_params,struct ufs_pa_layer_attr * dev_req_params)1295 static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
1296 bool status,
1297 struct ufs_pa_layer_attr *dev_max_params,
1298 struct ufs_pa_layer_attr *dev_req_params)
1299 {
1300 if (hba->vops && hba->vops->pwr_change_notify)
1301 return hba->vops->pwr_change_notify(hba, status,
1302 dev_max_params, dev_req_params);
1303
1304 return -ENOTSUPP;
1305 }
1306
ufshcd_vops_setup_task_mgmt(struct ufs_hba * hba,int tag,u8 tm_function)1307 static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
1308 int tag, u8 tm_function)
1309 {
1310 if (hba->vops && hba->vops->setup_task_mgmt)
1311 return hba->vops->setup_task_mgmt(hba, tag, tm_function);
1312 }
1313
ufshcd_vops_hibern8_notify(struct ufs_hba * hba,enum uic_cmd_dme cmd,enum ufs_notify_change_status status)1314 static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
1315 enum uic_cmd_dme cmd,
1316 enum ufs_notify_change_status status)
1317 {
1318 if (hba->vops && hba->vops->hibern8_notify)
1319 return hba->vops->hibern8_notify(hba, cmd, status);
1320 }
1321
ufshcd_vops_apply_dev_quirks(struct ufs_hba * hba)1322 static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
1323 {
1324 if (hba->vops && hba->vops->apply_dev_quirks)
1325 return hba->vops->apply_dev_quirks(hba);
1326 return 0;
1327 }
1328
ufshcd_vops_fixup_dev_quirks(struct ufs_hba * hba)1329 static inline void ufshcd_vops_fixup_dev_quirks(struct ufs_hba *hba)
1330 {
1331 if (hba->vops && hba->vops->fixup_dev_quirks)
1332 hba->vops->fixup_dev_quirks(hba);
1333 }
1334
ufshcd_vops_suspend(struct ufs_hba * hba,enum ufs_pm_op op)1335 static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
1336 {
1337 if (hba->vops && hba->vops->suspend)
1338 return hba->vops->suspend(hba, op);
1339
1340 return 0;
1341 }
1342
ufshcd_vops_resume(struct ufs_hba * hba,enum ufs_pm_op op)1343 static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
1344 {
1345 if (hba->vops && hba->vops->resume)
1346 return hba->vops->resume(hba, op);
1347
1348 return 0;
1349 }
1350
ufshcd_vops_dbg_register_dump(struct ufs_hba * hba)1351 static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
1352 {
1353 if (hba->vops && hba->vops->dbg_register_dump)
1354 hba->vops->dbg_register_dump(hba);
1355 }
1356
ufshcd_vops_device_reset(struct ufs_hba * hba)1357 static inline void ufshcd_vops_device_reset(struct ufs_hba *hba)
1358 {
1359 if (hba->vops && hba->vops->device_reset) {
1360 int err = hba->vops->device_reset(hba);
1361
1362 if (!err) {
1363 ufshcd_set_ufs_dev_active(hba);
1364 if (ufshcd_is_wb_allowed(hba)) {
1365 hba->wb_enabled = false;
1366 hba->wb_buf_flush_enabled = false;
1367 }
1368 }
1369 if (err != -EOPNOTSUPP)
1370 ufshcd_update_evt_hist(hba, UFS_EVT_DEV_RESET, err);
1371 }
1372 }
1373
ufshcd_vops_config_scaling_param(struct ufs_hba * hba,struct devfreq_dev_profile * profile,void * data)1374 static inline void ufshcd_vops_config_scaling_param(struct ufs_hba *hba,
1375 struct devfreq_dev_profile
1376 *profile, void *data)
1377 {
1378 if (hba->vops && hba->vops->config_scaling_param)
1379 hba->vops->config_scaling_param(hba, profile, data);
1380 }
1381
1382 extern struct ufs_pm_lvl_states ufs_pm_lvl_states[];
1383
1384 /*
1385 * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
1386 * @scsi_lun: scsi LUN id
1387 *
1388 * Returns UPIU LUN id
1389 */
ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)1390 static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
1391 {
1392 if (scsi_is_wlun(scsi_lun))
1393 return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
1394 | UFS_UPIU_WLUN_ID;
1395 else
1396 return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
1397 }
1398
1399 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
1400 const char *prefix);
1401 int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
1402 int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
1403 #endif /* End of Header */
1404