1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License as published by 4 * the Free Software Foundation; either version 2 of the License, or 5 * (at your option) any later version. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 * 12 * You should have received a copy of the GNU General Public License 13 * along with this program; if not, write to the Free Software 14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 15 */ 16 17 /* 18 * CMSPAR, some architectures can't have space and mark parity. 19 */ 20 21 #ifndef CMSPAR 22 #define CMSPAR 0 23 #endif 24 25 /* 26 * Major and minor numbers. 27 */ 28 29 #define XR_USB_SERIAL_TTY_MAJOR 266 30 #define XR_USB_SERIAL_TTY_MINORS 32 31 32 /* 33 * Requests. 34 */ 35 36 #define USB_RT_XR_USB_SERIAL (USB_TYPE_CLASS | USB_RECIP_INTERFACE) 37 38 /* 39 * Output control lines. 40 */ 41 42 #define XR_USB_SERIAL_CTRL_DTR 0x01 43 #define XR_USB_SERIAL_CTRL_RTS 0x02 44 45 /* 46 * Input control lines and line errors. 47 */ 48 49 #define XR_USB_SERIAL_CTRL_DCD 0x01 50 #define XR_USB_SERIAL_CTRL_DSR 0x02 51 #define XR_USB_SERIAL_CTRL_BRK 0x04 52 #define XR_USB_SERIAL_CTRL_RI 0x08 53 54 #define XR_USB_SERIAL_CTRL_FRAMING 0x10 55 #define XR_USB_SERIAL_CTRL_PARITY 0x20 56 #define XR_USB_SERIAL_CTRL_OVERRUN 0x40 57 58 /* 59 * Internal driver structures. 60 */ 61 62 /* 63 * The only reason to have several buffers is to accommodate assumptions 64 * in line disciplines. They ask for empty space amount, receive our URB size, 65 * and proceed to issue several 1-character writes, assuming they will fit. 66 * The very first write takes a complete URB. Fortunately, this only happens 67 * when processing onlcr, so we only need 2 buffers. These values must be 68 * powers of 2. 69 */ 70 #define XR_USB_SERIAL_NW 16 71 #define XR_USB_SERIAL_NR 16 72 73 #define RAMCTL_BUFFER_PARITY 0x1 74 #define RAMCTL_BUFFER_BREAK 0x2 75 #define RAMCTL_BUFFER_FRAME 0x4 76 #define RAMCTL_BUFFER_OVERRUN 0x8 77 78 struct xr_usb_serial_wb { 79 unsigned char *buf; 80 dma_addr_t dmah; 81 int len; 82 int use; 83 struct urb *urb; 84 struct xr_usb_serial *instance; 85 }; 86 87 struct xr_usb_serial_rb { 88 int size; 89 unsigned char *base; 90 dma_addr_t dma; 91 int index; 92 struct xr_usb_serial *instance; 93 }; 94 95 struct reg_addr_map { 96 unsigned int uart_enable_addr; 97 unsigned int uart_format_addr; 98 unsigned int uart_flow_addr; 99 unsigned int uart_loopback_addr; 100 unsigned int uart_xon_char_addr; 101 unsigned int uart_xoff_char_addr; 102 unsigned int uart_gpio_mode_addr; 103 unsigned int uart_gpio_dir_addr; 104 unsigned int uart_gpio_set_addr; 105 unsigned int uart_gpio_clr_addr; 106 unsigned int uart_gpio_status_addr; 107 unsigned int tx_break_addr; 108 unsigned int uart_custom_driver; 109 unsigned int uart_low_latency; 110 }; 111 112 struct xr_usb_serial { 113 struct usb_device *dev; /* the corresponding usb device */ 114 struct usb_interface *control; /* control interface */ 115 struct usb_interface *data; /* data interface */ 116 struct tty_port port; /* our tty port data */ 117 struct urb *ctrlurb; /* urbs */ 118 u8 *ctrl_buffer; /* buffers of urbs */ 119 dma_addr_t ctrl_dma; /* dma handles of buffers */ 120 u8 *country_codes; /* country codes from device */ 121 unsigned int country_code_size; /* size of this buffer */ 122 unsigned int country_rel_date; /* release date of version */ 123 struct xr_usb_serial_wb wb[XR_USB_SERIAL_NW]; 124 unsigned long read_urbs_free; 125 struct urb *read_urbs[XR_USB_SERIAL_NR]; 126 struct xr_usb_serial_rb read_buffers[XR_USB_SERIAL_NR]; 127 int rx_buflimit; 128 int rx_endpoint; 129 spinlock_t read_lock; 130 int write_used; /* number of non-empty write buffers */ 131 int transmitting; 132 spinlock_t write_lock; 133 struct mutex mutex; 134 bool disconnected; 135 struct usb_cdc_line_coding line; /* bits, stop, parity */ 136 struct work_struct work; /* work queue entry for line discipline waking up */ 137 unsigned int ctrlin; /* input control lines (DCD, DSR, RI, break, overruns) */ 138 unsigned int ctrlout; /* output control lines (DTR, RTS) */ 139 unsigned int writesize; /* max packet size for the output bulk endpoint */ 140 unsigned int readsize,ctrlsize; /* buffer sizes for freeing */ 141 unsigned int minor; /* xr_usb_serial minor number */ 142 unsigned char clocal; /* termios CLOCAL */ 143 unsigned int ctrl_caps; /* control capabilities from the class specific header */ 144 unsigned int susp_count; /* number of suspended interfaces */ 145 unsigned int combined_interfaces:1; /* control and data collapsed */ 146 unsigned int is_int_ep:1; /* interrupt endpoints contrary to spec used */ 147 unsigned int throttled:1; /* actually throttled */ 148 unsigned int throttle_req:1; /* throttle requested */ 149 u8 bInterval; 150 struct xr_usb_serial_wb *delayed_wb; /* write queued for a device about to be woken */ 151 unsigned int channel; 152 int preciseflags; /* USB: wide mode, TTY: flags per character */ 153 int trans9; /* USB: wide mode, serial 9N1 */ 154 int have_extra_byte; 155 int extra_byte; 156 157 unsigned short DeviceVendor; 158 unsigned short DeviceProduct; 159 struct reg_addr_map reg_map; 160 #ifdef CONFIG_GPIOLIB 161 struct gpio_chip xr_gpio; 162 int rv_gpio_created; 163 #endif 164 }; 165 166 #define CDC_DATA_INTERFACE_TYPE 0x0a 167 168 /* constants describing various quirks and errors */ 169 #define NO_UNION_NORMAL 1 170 #define SINGLE_RX_URB 2 171 #define NO_CAP_LINE 4 172 #define NOT_A_MODEM 8 173 #define NO_DATA_INTERFACE 16 174 #define IGNORE_DEVICE 32 175 176 177 #define UART_ENABLE_TX 1 178 #define UART_ENABLE_RX 2 179 180 #define UART_GPIO_CLR_DTR 0x8 181 #define UART_GPIO_SET_DTR 0x8 182 #define UART_GPIO_CLR_RTS 0x20 183 #define UART_GPIO_SET_RTS 0x20 184 185 #define LOOPBACK_ENABLE_TX_RX 1 186 #define LOOPBACK_ENABLE_RTS_CTS 2 187 #define LOOPBACK_ENABLE_DTR_DSR 4 188 189 #define UART_FLOW_MODE_NONE 0x0 190 #define UART_FLOW_MODE_HW 0x1 191 #define UART_FLOW_MODE_SW 0x2 192 193 #define UART_GPIO_MODE_SEL_GPIO 0x0 194 #define UART_GPIO_MODE_SEL_RTS_CTS 0x1 195 196 #define XR2280x_FUNC_MGR_OFFSET 0x40 197 198