1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * techpoint lib
4 *
5 * Copyright (C) 2023 Rockchip Electronics Co., Ltd.
6 */
7
8 #include "techpoint_tp9930.h"
9 #include "techpoint_dev.h"
10
11 static __maybe_unused const struct regval common_setting_148M_1080p_25fps_regs[] = {
12 { 0x40, 0x04 },
13 { 0x02, 0x44 },
14 { 0x05, 0x00 },
15 { 0x06, 0x32 },
16 { 0x07, 0x80 },
17 { 0x08, 0x00 },
18 { 0x09, 0x24 },
19 { 0x0a, 0x48 },
20 { 0x0b, 0xc0 },
21 { 0x0c, 0x03 },
22 { 0x0d, 0x73 },
23 { 0x10, 0x00 },
24 { 0x11, 0x40 },
25 { 0x12, 0x40 },
26 { 0x13, 0x00 },
27 { 0x14, 0x00 },
28 { 0x15, 0x01 },
29 { 0x16, 0xf0 },
30 { 0x17, 0x80 },
31 { 0x18, 0x29 },
32 { 0x19, 0x38 },
33 { 0x1a, 0x47 },
34 { 0x1c, 0x0a },
35 { 0x1d, 0x50 },
36 { 0x20, 0x3c },
37 { 0x21, 0x46 },
38 { 0x22, 0x36 },
39 { 0x23, 0x3c },
40 { 0x24, 0x04 },
41 { 0x25, 0xfe },
42 { 0x26, 0x0d },
43 { 0x27, 0x2d },
44 { 0x28, 0x00 },
45 { 0x29, 0x48 },
46 #if TECHPOINT_TEST_PATTERN
47 { 0x2a, 0x3c },
48 #else
49 { 0x2a, 0x30 },
50 #endif
51 { 0x2b, 0x60 },
52 { 0x2c, 0x3a },
53 { 0x2d, 0x54 },
54 { 0x2e, 0x40 },
55 { 0x30, 0xa5 },
56 { 0x31, 0x86 },
57 { 0x32, 0xfb },
58 { 0x33, 0x60 },
59 { 0x35, 0x05 },
60 { 0x36, 0xca },
61 { 0x38, 0x00 },
62 { 0x39, 0x1c },
63 { 0x3a, 0x32 },
64 { 0x3b, 0x26 },
65 { 0x40, 0x00 },
66 { 0x34, 0x10 },
67 { 0x40, 0x01 },
68 { 0x34, 0x11 },
69 { 0x40, 0x02 },
70 { 0x34, 0x12 },
71 { 0x40, 0x03 },
72 { 0x34, 0x13 },
73 { 0x4f, 0x03 },
74 { 0x50, 0xb2 },
75 { 0x52, 0xf6 },
76 { 0xf1, 0x04 },
77 { 0xf2, 0x77 },
78 { 0xf3, 0x77 },
79 { 0xf5, 0xf0 },
80 { 0xf6, 0x10 },
81 { 0xf8, 0x54 },
82 { 0xfa, 0x88 },
83 { 0xfb, 0x88 },
84 { 0x4d, 0x07 },
85 { 0x4e, 0x05 },
86 };
87
88 static __maybe_unused const struct regval common_setting_148M_1080p_30fps_regs[] = {
89 { 0x40, 0x04 },
90 { 0x02, 0x44 },
91 { 0x07, 0x80 },
92 { 0x0b, 0xc0 },
93 { 0x0c, 0x03 },
94 { 0x0d, 0x72 },
95 { 0x10, 0x00 },
96 { 0x11, 0x40 },
97 { 0x12, 0x40 },
98 { 0x13, 0x00 },
99 { 0x14, 0x00 },
100 { 0x15, 0x01 },
101 { 0x16, 0xf0 },
102 { 0x17, 0x80 },
103 { 0x18, 0x29 },
104 { 0x19, 0x38 },
105 { 0x1a, 0x47 },
106 { 0x1c, 0x08 },
107 { 0x1d, 0x98 },
108 { 0x20, 0x38 },
109 { 0x21, 0x46 },
110 { 0x22, 0x36 },
111 { 0x23, 0x3c },
112 { 0x24, 0x04 },
113 { 0x25, 0xfe },
114 { 0x26, 0x0d },
115 { 0x27, 0x2d },
116 { 0x28, 0x00 },
117 { 0x29, 0x48 },
118 #if TECHPOINT_TEST_PATTERN
119 { 0x2a, 0x3c },
120 #else
121 { 0x2a, 0x30 },
122 #endif
123 { 0x2b, 0x60 },
124 { 0x2c, 0x3a },
125 { 0x2d, 0x54 },
126 { 0x2e, 0x40 },
127 { 0x30, 0xa5 },
128 { 0x31, 0x95 },
129 { 0x32, 0xe0 },
130 { 0x33, 0x60 },
131 { 0x35, 0x45 },
132 { 0x36, 0xca },
133 { 0x38, 0x00 },
134 { 0x39, 0x1c },
135 { 0x3a, 0x32 },
136 { 0x3b, 0x26 },
137 { 0x40, 0x00 },
138 { 0x34, 0x10 },
139 { 0x40, 0x01 },
140 { 0x34, 0x11 },
141 { 0x40, 0x02 },
142 { 0x34, 0x12 },
143 { 0x40, 0x03 },
144 { 0x34, 0x13 },
145 { 0x4f, 0x03 },
146 { 0x50, 0xA3 },
147 { 0x52, 0xE7 },
148 { 0xf1, 0x04 },
149 { 0xf2, 0x77 },
150 { 0xf3, 0x77 },
151 { 0xf4, 0x00 },
152 { 0xf5, 0xf0 },
153 { 0xf6, 0x10 },
154 { 0xf8, 0x54 },
155 { 0xfa, 0x99 },
156 { 0xfb, 0x99 },
157 { 0x4d, 0x07 },
158 { 0x4e, 0x05 },
159 };
160
161 static __maybe_unused const struct regval common_setting_148M_720p_25fps_regs[] = {
162 { 0x40, 0x04 },
163 { 0x02, 0x4e },
164 { 0x05, 0x00 },
165 { 0x06, 0x32 },
166 { 0x07, 0xc0 },
167 { 0x08, 0x00 },
168 { 0x09, 0x24 },
169 { 0x0a, 0x48 },
170 { 0x0b, 0xc0 },
171 { 0x0c, 0x13 },
172 { 0x0d, 0x71 },
173 { 0x0e, 0x00 },
174 { 0x0f, 0x00 },
175 { 0x10, 0x00 },
176 { 0x11, 0x40 },
177 { 0x12, 0x40 },
178 { 0x13, 0x00 },
179 { 0x14, 0x00 },
180 { 0x15, 0x13 },
181 { 0x16, 0x16 },
182 { 0x17, 0x00 },
183 { 0x18, 0x19 },
184 { 0x19, 0xd0 },
185 { 0x1a, 0x25 },
186 { 0x1b, 0x00 },
187 { 0x1c, 0x07 },
188 { 0x1d, 0xbc },
189 { 0x1e, 0x60 },
190 { 0x1f, 0x06 },
191 { 0x20, 0x40 },
192 { 0x21, 0x46 },
193 { 0x22, 0x36 },
194 { 0x23, 0x3c },
195 { 0x24, 0x04 },
196 { 0x25, 0xfe },
197 { 0x26, 0x01 },
198 { 0x27, 0x2d },
199 { 0x28, 0x00 },
200 { 0x29, 0x48 },
201 #if TECHPOINT_TEST_PATTERN
202 { 0x2a, 0x3c },
203 #else
204 { 0x2a, 0x30 },
205 #endif
206 { 0x2b, 0x60 },
207 { 0x2c, 0x3a },
208 { 0x2d, 0x5a },
209 { 0x2e, 0x40 },
210 { 0x2f, 0x06 },
211 { 0x30, 0x9e },
212 { 0x31, 0x20 },
213 { 0x32, 0x01 },
214 { 0x33, 0x90 },
215 { 0x35, 0x25 },
216 { 0x36, 0xca },
217 { 0x37, 0x00 },
218 { 0x38, 0x00 },
219 { 0x39, 0x18 },
220 { 0x3a, 0x32 },
221 { 0x3b, 0x26 },
222 { 0x3c, 0x00 },
223 { 0x3d, 0x60 },
224 { 0x3e, 0x00 },
225 { 0x3f, 0x00 },
226
227 { 0x40, 0x00 },
228 { 0x34, 0x10 },
229 { 0x40, 0x01 },
230 { 0x34, 0x11 },
231 { 0x40, 0x02 },
232 { 0x34, 0x12 },
233 { 0x40, 0x03 },
234 { 0x34, 0x13 },
235
236 { 0x4f, 0x03 },
237 { 0x50, 0xA3 },
238 { 0x52, 0xE7 },
239 { 0xf1, 0x04 },
240 { 0xf2, 0x77 },
241 { 0xf3, 0x77 },
242 { 0xf4, 0x00 },
243 { 0xf5, 0xff },
244 { 0xf6, 0x10 },
245 { 0xf8, 0x54 },
246 { 0xfa, 0x99 },
247 { 0xfb, 0x99 },
248
249 { 0x4d, 0x07 },
250 { 0x4e, 0x05 },
251 };
252
253 static __maybe_unused const struct regval common_setting_148M_720p_30fps_regs[] = {
254 { 0x40, 0x04 },
255 { 0x02, 0x4e },
256 { 0x05, 0x00 },
257 { 0x06, 0x32 },
258 { 0x07, 0xc0 },
259 { 0x08, 0x00 },
260 { 0x09, 0x24 },
261 { 0x0a, 0x48 },
262 { 0x0b, 0xc0 },
263 { 0x0c, 0x13 },
264 { 0x0d, 0x70 },
265 { 0x0e, 0x00 },
266 { 0x0f, 0x00 },
267 { 0x10, 0x00 },
268 { 0x11, 0x40 },
269 { 0x12, 0x40 },
270 { 0x13, 0x00 },
271 { 0x14, 0x00 },
272 { 0x15, 0x13 },
273 { 0x16, 0x16 },
274 { 0x17, 0x00 },
275 { 0x18, 0x19 },
276 { 0x19, 0xd0 },
277 { 0x1a, 0x25 },
278 { 0x1b, 0x00 },
279 { 0x1c, 0x06 },
280 { 0x1d, 0x72 },
281 { 0x1e, 0x60 },
282 { 0x1f, 0x06 },
283 { 0x20, 0x40 },
284 { 0x21, 0x46 },
285 { 0x22, 0x36 },
286 { 0x23, 0x3c },
287 { 0x24, 0x04 },
288 { 0x25, 0xfe },
289 { 0x26, 0x01 },
290 { 0x27, 0x2d },
291 { 0x28, 0x00 },
292 { 0x29, 0x48 },
293 #if TECHPOINT_TEST_PATTERN
294 { 0x2a, 0x3c },
295 #else
296 { 0x2a, 0x30 },
297 #endif
298 { 0x2b, 0x60 },
299 { 0x2c, 0x3a },
300 { 0x2d, 0x5a },
301 { 0x2e, 0x40 },
302 { 0x2f, 0x06 },
303 { 0x30, 0x9d },
304 { 0x31, 0xca },
305 { 0x32, 0x01 },
306 { 0x33, 0xd0 },
307 { 0x35, 0x25 },
308 { 0x36, 0xca },
309 { 0x37, 0x00 },
310 { 0x38, 0x00 },
311 { 0x39, 0x18 },
312 { 0x3a, 0x32 },
313 { 0x3b, 0x26 },
314 { 0x3c, 0x00 },
315 { 0x3d, 0x60 },
316 { 0x3e, 0x00 },
317 { 0x3f, 0x00 },
318
319 { 0x40, 0x00 },
320 { 0x34, 0x10 },
321 { 0x40, 0x01 },
322 { 0x34, 0x11 },
323 { 0x40, 0x02 },
324 { 0x34, 0x12 },
325 { 0x40, 0x03 },
326 { 0x34, 0x13 },
327
328 { 0x4f, 0x03 },
329 { 0x50, 0xA3 },
330 { 0x52, 0xE7 },
331 { 0xf1, 0x04 },
332 { 0xf2, 0x77 },
333 { 0xf3, 0x77 },
334 { 0xf4, 0x00 },
335 { 0xf5, 0xff },
336 { 0xf6, 0x10 },
337 { 0xf8, 0x54 },
338 { 0xfa, 0x99 },
339 { 0xfb, 0x99 },
340
341 { 0x4d, 0x07 },
342 { 0x4e, 0x05 },
343 };
344
345 static struct techpoint_video_modes supported_modes[] = {
346 #if DEF_1080P
347 {
348 .bus_fmt = MEDIA_BUS_FMT_UYVY8_2X8,
349 .width = 1920,
350 .height = 1080,
351 .max_fps = {
352 .numerator = 10000,
353 .denominator = 250000,
354 },
355 .link_freq_value = TP9930_LINK_FREQ_297M,
356 .common_reg_list = common_setting_148M_1080p_25fps_regs,
357 .common_reg_size = ARRAY_SIZE(common_setting_148M_1080p_25fps_regs),
358 },
359 {
360 .bus_fmt = MEDIA_BUS_FMT_UYVY8_2X8,
361 .width = 1920,
362 .height = 1080,
363 .max_fps = {
364 .numerator = 10000,
365 .denominator = 300000,
366 },
367 .link_freq_value = TP9930_LINK_FREQ_297M,
368 .common_reg_list = common_setting_148M_1080p_30fps_regs,
369 .common_reg_size = ARRAY_SIZE(common_setting_148M_1080p_30fps_regs),
370 },
371 #endif
372 {
373 .bus_fmt = MEDIA_BUS_FMT_UYVY8_2X8,
374 .width = 1280,
375 .height = 720,
376 .max_fps = {
377 .numerator = 10000,
378 .denominator = 250000,
379 },
380 .link_freq_value = TP9930_LINK_FREQ_148M5,
381 .common_reg_list = common_setting_148M_720p_25fps_regs,
382 .common_reg_size = ARRAY_SIZE(common_setting_148M_720p_25fps_regs),
383 },
384 {
385 .bus_fmt = MEDIA_BUS_FMT_UYVY8_2X8,
386 .width = 1280,
387 .height = 720,
388 .max_fps = {
389 .numerator = 10000,
390 .denominator = 300000,
391 },
392 .link_freq_value = TP9930_LINK_FREQ_148M5,
393 .common_reg_list = common_setting_148M_720p_30fps_regs,
394 .common_reg_size = ARRAY_SIZE(common_setting_148M_720p_30fps_regs),
395 }
396 };
397
tp9930_initialize(struct techpoint * techpoint)398 int tp9930_initialize(struct techpoint *techpoint)
399 {
400 int array_size = 0;
401 struct i2c_client *client = techpoint->client;
402 struct device *dev = &client->dev;
403
404 techpoint->video_modes_num = ARRAY_SIZE(supported_modes);
405 array_size =
406 sizeof(struct techpoint_video_modes) * techpoint->video_modes_num;
407 techpoint->video_modes = devm_kzalloc(dev, array_size, GFP_KERNEL);
408 memcpy(techpoint->video_modes, supported_modes, array_size);
409
410 techpoint->cur_video_mode = &techpoint->video_modes[0];
411
412 return 0;
413 }
414
tp9930_do_reset_pll(struct i2c_client * client)415 int tp9930_do_reset_pll(struct i2c_client *client)
416 {
417 u8 val_0x44 = 0, val_0x43 = 0, val_0xf4 = 0;
418
419 techpoint_read_reg(client, 0x43, &val_0x43);
420 techpoint_write_reg(client, 0x43, val_0x43 | 0x40);
421 techpoint_read_reg(client, 0x44, &val_0x44);
422 techpoint_write_reg(client, 0x44, val_0x44 | 0x40);
423
424 techpoint_read_reg(client, 0xf4, &val_0xf4);
425 techpoint_write_reg(client, 0xf4, val_0xf4 | 0x80);
426 usleep_range(10000, 12000);
427
428 techpoint_write_reg(client, 0x43, val_0x43);
429 techpoint_write_reg(client, 0x44, val_0x44);
430
431 return 0;
432 }
433
tp9930_pll_reset(struct i2c_client * client)434 int tp9930_pll_reset(struct i2c_client *client)
435 {
436 techpoint_write_reg(client, 0x40, 0x00);
437 // output disable
438 techpoint_write_reg(client, 0x4d, 0x00);
439 techpoint_write_reg(client, 0x4e, 0x00);
440 // PLL reset
441 tp9930_do_reset_pll(client);
442
443 techpoint_write_reg(client, 0x40, 0x04);
444 techpoint_write_reg(client, 0x3b, 0x20);
445 techpoint_write_reg(client, 0x3d, 0xe0);
446 techpoint_write_reg(client, 0x3d, 0x60);
447 techpoint_write_reg(client, 0x3b, 0x25);
448 techpoint_write_reg(client, 0x40, 0x40);
449 techpoint_write_reg(client, 0x7a, 0x20);
450 techpoint_write_reg(client, 0x3c, 0x20);
451 techpoint_write_reg(client, 0x3c, 0x00);
452 techpoint_write_reg(client, 0x7a, 0x25);
453 techpoint_write_reg(client, 0x40, 0x00);
454
455 #if DEF_1080P
456 // 25FPS
457 techpoint_write_reg(client, 0x44, 0x07);
458 techpoint_write_reg(client, 0x43, 0x17);
459 techpoint_write_reg(client, 0x45, 0x09);
460 techpoint_write_reg(client, 0xf4, 0xa0);
461 #else
462 techpoint_write_reg(client, 0x44, 0x17);
463 techpoint_write_reg(client, 0x43, 0x17);
464 techpoint_write_reg(client, 0x45, 0x09);
465 #endif
466
467 return 0;
468 }
469
tp9930_set_decoder_mode(struct i2c_client * client,int ch,int status)470 int tp9930_set_decoder_mode(struct i2c_client *client, int ch, int status)
471 {
472 u8 val = 0;
473
474 techpoint_write_reg(client, PAGE_REG, ch);
475 techpoint_read_reg(client, 0x26, &val);
476 if (status)
477 val |= 0x1;
478 else
479 val &= ~0x1;
480 techpoint_write_reg(client, 0x26, val);
481
482 return 0;
483 }
484
tp9930_get_channel_input_status(struct techpoint * techpoint,u8 ch)485 int tp9930_get_channel_input_status(struct techpoint *techpoint, u8 ch)
486 {
487 struct i2c_client *client = techpoint->client;
488 u8 val = 0;
489
490 mutex_lock(&techpoint->mutex);
491 techpoint_write_reg(client, PAGE_REG, ch);
492 techpoint_read_reg(client, INPUT_STATUS_REG, &val);
493 mutex_unlock(&techpoint->mutex);
494 dev_dbg(&client->dev, "input_status ch %d : %x\n", ch, val);
495
496 // inaccuracy
497 return (val == INPUT_STATUS_MATCH) ? 1 : 0;
498 }
499
tp9930_get_all_input_status(struct techpoint * techpoint,u8 * detect_status)500 int tp9930_get_all_input_status(struct techpoint *techpoint, u8 *detect_status)
501 {
502 struct i2c_client *client = techpoint->client;
503 u8 val = 0, i;
504
505 for (i = 0; i < PAD_MAX; i++) {
506 techpoint_write_reg(client, PAGE_REG, i);
507 techpoint_read_reg(client, INPUT_STATUS_REG, &val);
508 detect_status[i] = tp9930_get_channel_input_status(techpoint, i);
509 }
510
511 return 0;
512 }
513
tp9930_set_channel_reso(struct i2c_client * client,int ch,enum techpoint_support_reso reso)514 int tp9930_set_channel_reso(struct i2c_client *client, int ch,
515 enum techpoint_support_reso reso)
516 {
517 int val = reso;
518
519 switch (val) {
520 case TECHPOINT_S_RESO_1080P_30:
521 dev_err(&client->dev, "set channel %d 1080P_30, TBD", ch);
522 break;
523 case TECHPOINT_S_RESO_1080P_25:
524 dev_err(&client->dev, "set channel %d 1080P_25, TBD", ch);
525 break;
526 case TECHPOINT_S_RESO_720P_30:
527 dev_err(&client->dev, "set channel %d 720P_30, TBD", ch);
528 break;
529 case TECHPOINT_S_RESO_720P_25:
530 dev_err(&client->dev, "set channel %d 720P_25, TBD", ch);
531 break;
532 default:
533 #if DEF_1080P
534 dev_err(&client->dev,
535 "set channel %d is not supported, default 1080P_25, TBD", ch);
536 #else
537 dev_err(&client->dev,
538 "set channel %d is not supported, default 720P_25, TBD", ch);
539 #endif
540 break;
541 }
542
543 return 0;
544 }
545
tp9930_get_channel_reso(struct i2c_client * client,int ch)546 int tp9930_get_channel_reso(struct i2c_client *client, int ch)
547 {
548 u8 detect_fmt = 0xff;
549 u8 reso = 0xff;
550
551 techpoint_write_reg(client, 0x40, ch);
552 techpoint_read_reg(client, 0x03, &detect_fmt);
553 reso = detect_fmt & 0x7;
554
555 switch (reso) {
556 case TP9930_CVSTD_1080P_30:
557 dev_err(&client->dev, "detect channel %d 1080P_30", ch);
558 return TECHPOINT_S_RESO_1080P_30;
559 case TP9930_CVSTD_1080P_25:
560 dev_err(&client->dev, "detect channel %d 1080P_25", ch);
561 return TECHPOINT_S_RESO_1080P_25;
562 case TP9930_CVSTD_720P_30:
563 dev_err(&client->dev, "detect channel %d 720P_30", ch);
564 return TECHPOINT_S_RESO_720P_30;
565 case TP9930_CVSTD_720P_25:
566 dev_err(&client->dev, "detect channel %d 720P_25", ch);
567 return TECHPOINT_S_RESO_720P_25;
568 case TP9930_CVSTD_720P_60:
569 case TP9930_CVSTD_720P_50:
570 default:
571 #if DEF_1080P
572 dev_err(&client->dev,
573 "detect channel %d is not supported, default 1080P_25", ch);
574 return TECHPOINT_S_RESO_1080P_25;
575 #else
576 dev_err(&client->dev,
577 "detect channel %d is not supported, default 720P_25", ch);
578 return TECHPOINT_S_RESO_720P_25;
579 #endif
580 }
581
582 return reso;
583 }
584