1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2015-2017 Google, Inc
4 *
5 * USB Type-C Port Controller Interface.
6 */
7
8 #include <linux/delay.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/i2c.h>
12 #include <linux/interrupt.h>
13 #include <linux/property.h>
14 #include <linux/regmap.h>
15 #include <linux/usb/pd.h>
16 #include <linux/usb/tcpm.h>
17 #include <linux/usb/typec.h>
18 #include <trace/hooks/typec.h>
19
20 #include "tcpci.h"
21
22 #define PD_RETRY_COUNT_DEFAULT 3
23 #define PD_RETRY_COUNT_3_0_OR_HIGHER 2
24 #define AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV 3500
25 #define VSINKPD_MIN_IR_DROP_MV 750
26 #define VSRC_NEW_MIN_PERCENT 95
27 #define VSRC_VALID_MIN_MV 500
28 #define VPPS_NEW_MIN_PERCENT 95
29 #define VPPS_VALID_MIN_MV 100
30 #define VSINKDISCONNECT_PD_MIN_PERCENT 90
31
32 #define tcpc_presenting_rd(reg, cc) \
33 (!(TCPC_ROLE_CTRL_DRP & (reg)) && \
34 (((reg) & (TCPC_ROLE_CTRL_## cc ##_MASK << TCPC_ROLE_CTRL_## cc ##_SHIFT)) == \
35 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_## cc ##_SHIFT)))
36
37 #define tcpc_presenting_cc1_rd(reg) \
38 (!(TCPC_ROLE_CTRL_DRP & (reg)) && \
39 (((reg) & (TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT)) == \
40 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT)))
41 #define tcpc_presenting_cc2_rd(reg) \
42 (!(TCPC_ROLE_CTRL_DRP & (reg)) && \
43 (((reg) & (TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT)) == \
44 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT)))
45
46 struct tcpci {
47 struct device *dev;
48
49 struct tcpm_port *port;
50
51 struct regmap *regmap;
52
53 bool controls_vbus;
54
55 struct tcpc_dev tcpc;
56 struct tcpci_data *data;
57 };
58
59 struct tcpci_chip {
60 struct tcpci *tcpci;
61 struct tcpci_data data;
62 };
63
tcpci_get_tcpm_port(struct tcpci * tcpci)64 struct tcpm_port *tcpci_get_tcpm_port(struct tcpci *tcpci)
65 {
66 return tcpci->port;
67 }
68 EXPORT_SYMBOL_GPL(tcpci_get_tcpm_port);
69
tcpc_to_tcpci(struct tcpc_dev * tcpc)70 static inline struct tcpci *tcpc_to_tcpci(struct tcpc_dev *tcpc)
71 {
72 return container_of(tcpc, struct tcpci, tcpc);
73 }
74
tcpci_read16(struct tcpci * tcpci,unsigned int reg,u16 * val)75 static int tcpci_read16(struct tcpci *tcpci, unsigned int reg, u16 *val)
76 {
77 return regmap_raw_read(tcpci->regmap, reg, val, sizeof(u16));
78 }
79
tcpci_write16(struct tcpci * tcpci,unsigned int reg,u16 val)80 static int tcpci_write16(struct tcpci *tcpci, unsigned int reg, u16 val)
81 {
82 return regmap_raw_write(tcpci->regmap, reg, &val, sizeof(u16));
83 }
84
tcpci_set_cc(struct tcpc_dev * tcpc,enum typec_cc_status cc)85 static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc)
86 {
87 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
88 bool vconn_pres;
89 enum typec_cc_polarity polarity = TYPEC_POLARITY_CC1;
90 unsigned int reg;
91 int ret;
92
93 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®);
94 if (ret < 0)
95 return ret;
96
97 vconn_pres = !!(reg & TCPC_POWER_STATUS_VCONN_PRES);
98 if (vconn_pres) {
99 ret = regmap_read(tcpci->regmap, TCPC_TCPC_CTRL, ®);
100 if (ret < 0)
101 return ret;
102
103 if (reg & TCPC_TCPC_CTRL_ORIENTATION)
104 polarity = TYPEC_POLARITY_CC2;
105 }
106
107 switch (cc) {
108 case TYPEC_CC_RA:
109 reg = (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC1_SHIFT) |
110 (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC2_SHIFT);
111 break;
112 case TYPEC_CC_RD:
113 reg = (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
114 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
115 break;
116 case TYPEC_CC_RP_DEF:
117 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
118 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
119 (TCPC_ROLE_CTRL_RP_VAL_DEF <<
120 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
121 break;
122 case TYPEC_CC_RP_1_5:
123 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
124 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
125 (TCPC_ROLE_CTRL_RP_VAL_1_5 <<
126 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
127 break;
128 case TYPEC_CC_RP_3_0:
129 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
130 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
131 (TCPC_ROLE_CTRL_RP_VAL_3_0 <<
132 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
133 break;
134 case TYPEC_CC_OPEN:
135 default:
136 reg = (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT) |
137 (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT);
138 break;
139 }
140
141 if (vconn_pres) {
142 if (polarity == TYPEC_POLARITY_CC2) {
143 reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT);
144 reg |= (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT);
145 } else {
146 reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT);
147 reg |= (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT);
148 }
149 }
150
151 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
152 if (ret < 0)
153 return ret;
154
155 return 0;
156 }
157
tcpci_apply_rc(struct tcpc_dev * tcpc,enum typec_cc_status cc,enum typec_cc_polarity polarity)158 static int tcpci_apply_rc(struct tcpc_dev *tcpc, enum typec_cc_status cc,
159 enum typec_cc_polarity polarity)
160 {
161 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
162 unsigned int reg;
163 int ret;
164
165 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, ®);
166 if (ret < 0)
167 return ret;
168
169 /*
170 * APPLY_RC state is when ROLE_CONTROL.CC1 != ROLE_CONTROL.CC2 and vbus autodischarge on
171 * disconnect is disabled. Bail out when ROLE_CONTROL.CC1 != ROLE_CONTROL.CC2.
172 */
173 if (((reg & (TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT)) >>
174 TCPC_ROLE_CTRL_CC2_SHIFT) !=
175 ((reg & (TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT)) >>
176 TCPC_ROLE_CTRL_CC1_SHIFT))
177 return 0;
178
179 return regmap_update_bits(tcpci->regmap, TCPC_ROLE_CTRL, polarity == TYPEC_POLARITY_CC1 ?
180 TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT :
181 TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT,
182 TCPC_ROLE_CTRL_CC_OPEN);
183 }
184
tcpci_start_toggling(struct tcpc_dev * tcpc,enum typec_port_type port_type,enum typec_cc_status cc)185 static int tcpci_start_toggling(struct tcpc_dev *tcpc,
186 enum typec_port_type port_type,
187 enum typec_cc_status cc)
188 {
189 int ret;
190 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
191 unsigned int reg = TCPC_ROLE_CTRL_DRP;
192 int override_toggling = 0;
193
194 if (port_type != TYPEC_PORT_DRP)
195 return -EOPNOTSUPP;
196
197 /* Handle vendor drp toggling */
198 if (tcpci->data->start_drp_toggling) {
199 trace_android_vh_typec_tcpci_override_toggling(tcpci, tcpci->data,
200 &override_toggling);
201 ret = tcpci->data->start_drp_toggling(tcpci, tcpci->data, cc);
202 if (ret < 0 || override_toggling)
203 return ret;
204 }
205
206 switch (cc) {
207 default:
208 case TYPEC_CC_RP_DEF:
209 reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF <<
210 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
211 break;
212 case TYPEC_CC_RP_1_5:
213 reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 <<
214 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
215 break;
216 case TYPEC_CC_RP_3_0:
217 reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 <<
218 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
219 break;
220 }
221
222 if (cc == TYPEC_CC_RD)
223 reg |= (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
224 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
225 else
226 reg |= (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
227 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT);
228 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
229 if (ret < 0)
230 return ret;
231 return regmap_write(tcpci->regmap, TCPC_COMMAND,
232 TCPC_CMD_LOOK4CONNECTION);
233 }
234
tcpci_to_typec_cc(unsigned int cc,bool sink)235 static enum typec_cc_status tcpci_to_typec_cc(unsigned int cc, bool sink)
236 {
237 switch (cc) {
238 case 0x1:
239 return sink ? TYPEC_CC_RP_DEF : TYPEC_CC_RA;
240 case 0x2:
241 return sink ? TYPEC_CC_RP_1_5 : TYPEC_CC_RD;
242 case 0x3:
243 if (sink)
244 return TYPEC_CC_RP_3_0;
245 fallthrough;
246 case 0x0:
247 default:
248 return TYPEC_CC_OPEN;
249 }
250 }
251
tcpci_get_cc(struct tcpc_dev * tcpc,enum typec_cc_status * cc1,enum typec_cc_status * cc2)252 static int tcpci_get_cc(struct tcpc_dev *tcpc,
253 enum typec_cc_status *cc1, enum typec_cc_status *cc2)
254 {
255 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
256 unsigned int reg, role_control;
257 int ret;
258
259 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, &role_control);
260 if (ret < 0)
261 return ret;
262
263 ret = regmap_read(tcpci->regmap, TCPC_CC_STATUS, ®);
264 if (ret < 0)
265 return ret;
266
267 *cc1 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC1_SHIFT) &
268 TCPC_CC_STATUS_CC1_MASK,
269 reg & TCPC_CC_STATUS_TERM ||
270 tcpc_presenting_rd(role_control, CC1));
271 *cc2 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC2_SHIFT) &
272 TCPC_CC_STATUS_CC2_MASK,
273 reg & TCPC_CC_STATUS_TERM ||
274 tcpc_presenting_rd(role_control, CC2));
275
276 return 0;
277 }
278
tcpci_set_polarity(struct tcpc_dev * tcpc,enum typec_cc_polarity polarity)279 static int tcpci_set_polarity(struct tcpc_dev *tcpc,
280 enum typec_cc_polarity polarity)
281 {
282 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
283 unsigned int reg;
284 int ret;
285 enum typec_cc_status cc1, cc2;
286
287 /* Obtain Rp setting from role control */
288 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, ®);
289 if (ret < 0)
290 return ret;
291
292 ret = tcpci_get_cc(tcpc, &cc1, &cc2);
293 if (ret < 0)
294 return ret;
295
296 /*
297 * When port has drp toggling enabled, ROLE_CONTROL would only have the initial
298 * terminations for the toggling and does not indicate the final cc
299 * terminations when ConnectionResult is 0 i.e. drp toggling stops and
300 * the connection is resolbed. Infer port role from TCPC_CC_STATUS based on the
301 * terminations seen. The port role is then used to set the cc terminations.
302 */
303 if (reg & TCPC_ROLE_CTRL_DRP) {
304 /* Disable DRP for the OPEN setting to take effect */
305 reg = reg & ~TCPC_ROLE_CTRL_DRP;
306
307 if (polarity == TYPEC_POLARITY_CC2) {
308 reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT);
309 /* Local port is source */
310 if (cc2 == TYPEC_CC_RD)
311 /* Role control would have the Rp setting when DRP was enabled */
312 reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT;
313 else
314 reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT;
315 } else {
316 reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT);
317 /* Local port is source */
318 if (cc1 == TYPEC_CC_RD)
319 /* Role control would have the Rp setting when DRP was enabled */
320 reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT;
321 else
322 reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT;
323 }
324 }
325
326 if (polarity == TYPEC_POLARITY_CC2)
327 reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT;
328 else
329 reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT;
330 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
331 if (ret < 0)
332 return ret;
333
334 return regmap_write(tcpci->regmap, TCPC_TCPC_CTRL,
335 (polarity == TYPEC_POLARITY_CC2) ?
336 TCPC_TCPC_CTRL_ORIENTATION : 0);
337 }
338
tcpci_set_partner_usb_comm_capable(struct tcpc_dev * tcpc,bool capable)339 static void tcpci_set_partner_usb_comm_capable(struct tcpc_dev *tcpc, bool capable)
340 {
341 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
342
343 if (tcpci->data->set_partner_usb_comm_capable)
344 tcpci->data->set_partner_usb_comm_capable(tcpci, tcpci->data, capable);
345 }
346
tcpci_set_vconn(struct tcpc_dev * tcpc,bool enable)347 static int tcpci_set_vconn(struct tcpc_dev *tcpc, bool enable)
348 {
349 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
350 int ret;
351
352 /* Handle vendor set vconn */
353 if (tcpci->data->set_vconn) {
354 ret = tcpci->data->set_vconn(tcpci, tcpci->data, enable);
355 if (ret < 0)
356 return ret;
357 }
358
359 return regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL,
360 TCPC_POWER_CTRL_VCONN_ENABLE,
361 enable ? TCPC_POWER_CTRL_VCONN_ENABLE : 0);
362 }
363
tcpci_enable_auto_vbus_discharge(struct tcpc_dev * dev,bool enable)364 static int tcpci_enable_auto_vbus_discharge(struct tcpc_dev *dev, bool enable)
365 {
366 struct tcpci *tcpci = tcpc_to_tcpci(dev);
367 int ret;
368
369 ret = regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_POWER_CTRL_AUTO_DISCHARGE,
370 enable ? TCPC_POWER_CTRL_AUTO_DISCHARGE : 0);
371 return ret;
372 }
373
tcpci_set_auto_vbus_discharge_threshold(struct tcpc_dev * dev,enum typec_pwr_opmode mode,bool pps_active,u32 requested_vbus_voltage_mv)374 static int tcpci_set_auto_vbus_discharge_threshold(struct tcpc_dev *dev, enum typec_pwr_opmode mode,
375 bool pps_active, u32 requested_vbus_voltage_mv)
376 {
377 struct tcpci *tcpci = tcpc_to_tcpci(dev);
378 unsigned int pwr_ctrl, threshold = 0;
379 int ret;
380
381 /*
382 * Indicates that vbus is going to go away due PR_SWAP, hard reset etc.
383 * Do not discharge vbus here.
384 */
385 if (requested_vbus_voltage_mv == 0)
386 goto write_thresh;
387
388 ret = regmap_read(tcpci->regmap, TCPC_POWER_CTRL, &pwr_ctrl);
389 if (ret < 0)
390 return ret;
391
392 if (pwr_ctrl & TCPC_FAST_ROLE_SWAP_EN) {
393 /* To prevent disconnect when the source is fast role swap is capable. */
394 threshold = AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV;
395 } else if (mode == TYPEC_PWR_MODE_PD) {
396 if (pps_active)
397 threshold = ((VPPS_NEW_MIN_PERCENT * requested_vbus_voltage_mv / 100) -
398 VSINKPD_MIN_IR_DROP_MV - VPPS_VALID_MIN_MV) *
399 VSINKDISCONNECT_PD_MIN_PERCENT / 100;
400 else
401 threshold = ((VSRC_NEW_MIN_PERCENT * requested_vbus_voltage_mv / 100) -
402 VSINKPD_MIN_IR_DROP_MV - VSRC_VALID_MIN_MV) *
403 VSINKDISCONNECT_PD_MIN_PERCENT / 100;
404 } else {
405 /* 3.5V for non-pd sink */
406 threshold = AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV;
407 }
408
409 threshold = threshold / TCPC_VBUS_SINK_DISCONNECT_THRESH_LSB_MV;
410
411 if (threshold > TCPC_VBUS_SINK_DISCONNECT_THRESH_MAX)
412 return -EINVAL;
413
414 write_thresh:
415 return tcpci_write16(tcpci, TCPC_VBUS_SINK_DISCONNECT_THRESH, threshold);
416 }
417
tcpci_enable_frs(struct tcpc_dev * dev,bool enable)418 static int tcpci_enable_frs(struct tcpc_dev *dev, bool enable)
419 {
420 struct tcpci *tcpci = tcpc_to_tcpci(dev);
421 int ret;
422
423 /* To prevent disconnect during FRS, set disconnect threshold to 3.5V */
424 ret = tcpci_write16(tcpci, TCPC_VBUS_SINK_DISCONNECT_THRESH, enable ? 0 : 0x8c);
425 if (ret < 0)
426 return ret;
427
428 ret = regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_FAST_ROLE_SWAP_EN, enable ?
429 TCPC_FAST_ROLE_SWAP_EN : 0);
430
431 return ret;
432 }
433
tcpci_frs_sourcing_vbus(struct tcpc_dev * dev)434 static void tcpci_frs_sourcing_vbus(struct tcpc_dev *dev)
435 {
436 struct tcpci *tcpci = tcpc_to_tcpci(dev);
437
438 if (tcpci->data->frs_sourcing_vbus)
439 tcpci->data->frs_sourcing_vbus(tcpci, tcpci->data);
440 }
441
tcpci_set_bist_data(struct tcpc_dev * tcpc,bool enable)442 static int tcpci_set_bist_data(struct tcpc_dev *tcpc, bool enable)
443 {
444 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
445
446 return regmap_update_bits(tcpci->regmap, TCPC_TCPC_CTRL, TCPC_TCPC_CTRL_BIST_TM,
447 enable ? TCPC_TCPC_CTRL_BIST_TM : 0);
448 }
449
tcpci_set_roles(struct tcpc_dev * tcpc,bool attached,enum typec_role role,enum typec_data_role data)450 static int tcpci_set_roles(struct tcpc_dev *tcpc, bool attached,
451 enum typec_role role, enum typec_data_role data)
452 {
453 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
454 unsigned int reg;
455 int ret;
456
457 reg = PD_REV20 << TCPC_MSG_HDR_INFO_REV_SHIFT;
458 if (role == TYPEC_SOURCE)
459 reg |= TCPC_MSG_HDR_INFO_PWR_ROLE;
460 if (data == TYPEC_HOST)
461 reg |= TCPC_MSG_HDR_INFO_DATA_ROLE;
462 ret = regmap_write(tcpci->regmap, TCPC_MSG_HDR_INFO, reg);
463 if (ret < 0)
464 return ret;
465
466 return 0;
467 }
468
tcpci_set_pd_rx(struct tcpc_dev * tcpc,bool enable)469 static int tcpci_set_pd_rx(struct tcpc_dev *tcpc, bool enable)
470 {
471 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
472 unsigned int reg = 0;
473 int ret;
474
475 if (enable)
476 reg = TCPC_RX_DETECT_SOP | TCPC_RX_DETECT_HARD_RESET;
477 ret = regmap_write(tcpci->regmap, TCPC_RX_DETECT, reg);
478 if (ret < 0)
479 return ret;
480
481 return 0;
482 }
483
tcpci_get_vbus(struct tcpc_dev * tcpc)484 static int tcpci_get_vbus(struct tcpc_dev *tcpc)
485 {
486 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
487 unsigned int reg;
488 int ret, vbus, bypass = 0;
489
490 trace_android_rvh_typec_tcpci_get_vbus(tcpci, tcpci->data, &vbus, &bypass);
491 if (bypass)
492 return vbus;
493
494 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®);
495 if (ret < 0)
496 return ret;
497
498 return !!(reg & TCPC_POWER_STATUS_VBUS_PRES);
499 }
500
tcpci_check_contaminant(struct tcpc_dev * tcpc)501 static int tcpci_check_contaminant(struct tcpc_dev *tcpc)
502 {
503 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
504 int ret = 0;
505
506 trace_android_rvh_typec_tcpci_chk_contaminant(tcpci, tcpci->data, &ret);
507 return ret;
508 }
509
tcpci_is_vbus_vsafe0v(struct tcpc_dev * tcpc)510 static bool tcpci_is_vbus_vsafe0v(struct tcpc_dev *tcpc)
511 {
512 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
513 unsigned int reg;
514 int ret;
515
516 ret = regmap_read(tcpci->regmap, TCPC_EXTENDED_STATUS, ®);
517 if (ret < 0)
518 return false;
519
520 return !!(reg & TCPC_EXTENDED_STATUS_VSAFE0V);
521 }
522
tcpci_set_vbus(struct tcpc_dev * tcpc,bool source,bool sink)523 static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink)
524 {
525 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
526 int ret;
527
528 if (tcpci->data->set_vbus) {
529 ret = tcpci->data->set_vbus(tcpci, tcpci->data, source, sink);
530 /* Bypass when ret > 0 */
531 if (ret != 0)
532 return ret < 0 ? ret : 0;
533 }
534
535 /* Disable both source and sink first before enabling anything */
536
537 if (!source) {
538 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
539 TCPC_CMD_DISABLE_SRC_VBUS);
540 if (ret < 0)
541 return ret;
542 }
543
544 if (!sink) {
545 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
546 TCPC_CMD_DISABLE_SINK_VBUS);
547 if (ret < 0)
548 return ret;
549 }
550
551 if (source) {
552 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
553 TCPC_CMD_SRC_VBUS_DEFAULT);
554 if (ret < 0)
555 return ret;
556 }
557
558 if (sink) {
559 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
560 TCPC_CMD_SINK_VBUS);
561 if (ret < 0)
562 return ret;
563 }
564
565 return 0;
566 }
567
tcpci_pd_transmit(struct tcpc_dev * tcpc,enum tcpm_transmit_type type,const struct pd_message * msg,unsigned int negotiated_rev)568 static int tcpci_pd_transmit(struct tcpc_dev *tcpc, enum tcpm_transmit_type type,
569 const struct pd_message *msg, unsigned int negotiated_rev)
570 {
571 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
572 u16 header = msg ? le16_to_cpu(msg->header) : 0;
573 unsigned int reg, cnt;
574 int ret;
575
576 cnt = msg ? pd_header_cnt(header) * 4 : 0;
577 /**
578 * TCPCI spec forbids direct access of TCPC_TX_DATA.
579 * But, since some of the chipsets offer this capability,
580 * it's fair to support both.
581 */
582 if (tcpci->data->TX_BUF_BYTE_x_hidden) {
583 u8 buf[TCPC_TRANSMIT_BUFFER_MAX_LEN] = {0,};
584 u8 pos = 0;
585
586 /* Payload + header + TCPC_TX_BYTE_CNT */
587 buf[pos++] = cnt + 2;
588
589 if (msg)
590 memcpy(&buf[pos], &msg->header, sizeof(msg->header));
591
592 pos += sizeof(header);
593
594 if (cnt > 0)
595 memcpy(&buf[pos], msg->payload, cnt);
596
597 pos += cnt;
598 ret = regmap_raw_write(tcpci->regmap, TCPC_TX_BYTE_CNT, buf, pos);
599 if (ret < 0)
600 return ret;
601 } else {
602 ret = regmap_write(tcpci->regmap, TCPC_TX_BYTE_CNT, cnt + 2);
603 if (ret < 0)
604 return ret;
605
606 ret = tcpci_write16(tcpci, TCPC_TX_HDR, header);
607 if (ret < 0)
608 return ret;
609
610 if (cnt > 0) {
611 ret = regmap_raw_write(tcpci->regmap, TCPC_TX_DATA, &msg->payload, cnt);
612 if (ret < 0)
613 return ret;
614 }
615 }
616
617 /* nRetryCount is 3 in PD2.0 spec where 2 in PD3.0 spec */
618 reg = ((negotiated_rev > PD_REV20 ? PD_RETRY_COUNT_3_0_OR_HIGHER : PD_RETRY_COUNT_DEFAULT)
619 << TCPC_TRANSMIT_RETRY_SHIFT) | (type << TCPC_TRANSMIT_TYPE_SHIFT);
620 ret = regmap_write(tcpci->regmap, TCPC_TRANSMIT, reg);
621 if (ret < 0)
622 return ret;
623
624 return 0;
625 }
626
tcpci_init(struct tcpc_dev * tcpc)627 static int tcpci_init(struct tcpc_dev *tcpc)
628 {
629 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
630 unsigned long timeout = jiffies + msecs_to_jiffies(2000); /* XXX */
631 unsigned int reg;
632 int ret;
633
634 while (time_before_eq(jiffies, timeout)) {
635 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®);
636 if (ret < 0)
637 return ret;
638 if (!(reg & TCPC_POWER_STATUS_UNINIT))
639 break;
640 usleep_range(10000, 20000);
641 }
642 if (time_after(jiffies, timeout))
643 return -ETIMEDOUT;
644
645 /* Handle vendor init */
646 if (tcpci->data->init) {
647 ret = tcpci->data->init(tcpci, tcpci->data);
648 if (ret < 0)
649 return ret;
650 }
651
652 /* Clear all events */
653 ret = tcpci_write16(tcpci, TCPC_ALERT, 0xffff);
654 if (ret < 0)
655 return ret;
656
657 if (tcpci->controls_vbus)
658 reg = TCPC_POWER_STATUS_VBUS_PRES;
659 else
660 reg = 0;
661 ret = regmap_write(tcpci->regmap, TCPC_POWER_STATUS_MASK, reg);
662 if (ret < 0)
663 return ret;
664
665 /* Enable Vbus detection */
666 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
667 TCPC_CMD_ENABLE_VBUS_DETECT);
668 if (ret < 0)
669 return ret;
670
671 reg = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_FAILED |
672 TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_RX_STATUS |
673 TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_CC_STATUS;
674 if (tcpci->controls_vbus)
675 reg |= TCPC_ALERT_POWER_STATUS;
676 /* Enable VSAFE0V status interrupt when detecting VSAFE0V is supported */
677 if (tcpci->data->vbus_vsafe0v) {
678 reg |= TCPC_ALERT_EXTENDED_STATUS;
679 ret = regmap_write(tcpci->regmap, TCPC_EXTENDED_STATUS_MASK,
680 TCPC_EXTENDED_STATUS_VSAFE0V);
681 if (ret < 0)
682 return ret;
683 }
684 return tcpci_write16(tcpci, TCPC_ALERT_MASK, reg);
685 }
686
tcpci_irq(struct tcpci * tcpci)687 irqreturn_t tcpci_irq(struct tcpci *tcpci)
688 {
689 u16 status;
690 int ret;
691 unsigned int raw;
692
693 tcpci_read16(tcpci, TCPC_ALERT, &status);
694
695 /*
696 * Clear alert status for everything except RX_STATUS, which shouldn't
697 * be cleared until we have successfully retrieved message.
698 */
699 if (status & ~TCPC_ALERT_RX_STATUS)
700 tcpci_write16(tcpci, TCPC_ALERT,
701 status & ~TCPC_ALERT_RX_STATUS);
702
703 if (status & TCPC_ALERT_CC_STATUS)
704 tcpm_cc_change(tcpci->port);
705
706 if (status & TCPC_ALERT_POWER_STATUS) {
707 regmap_read(tcpci->regmap, TCPC_POWER_STATUS_MASK, &raw);
708 /*
709 * If power status mask has been reset, then the TCPC
710 * has reset.
711 */
712 if (raw == 0xff)
713 tcpm_tcpc_reset(tcpci->port);
714 else
715 tcpm_vbus_change(tcpci->port);
716 }
717
718 if (status & TCPC_ALERT_RX_STATUS) {
719 struct pd_message msg;
720 unsigned int cnt, payload_cnt;
721 u16 header;
722
723 regmap_read(tcpci->regmap, TCPC_RX_BYTE_CNT, &cnt);
724 /*
725 * 'cnt' corresponds to READABLE_BYTE_COUNT in section 4.4.14
726 * of the TCPCI spec [Rev 2.0 Ver 1.0 October 2017] and is
727 * defined in table 4-36 as one greater than the number of
728 * bytes received. And that number includes the header. So:
729 */
730 if (cnt > 3)
731 payload_cnt = cnt - (1 + sizeof(msg.header));
732 else
733 payload_cnt = 0;
734
735 tcpci_read16(tcpci, TCPC_RX_HDR, &header);
736 msg.header = cpu_to_le16(header);
737
738 if (WARN_ON(payload_cnt > sizeof(msg.payload)))
739 payload_cnt = sizeof(msg.payload);
740
741 if (payload_cnt > 0)
742 regmap_raw_read(tcpci->regmap, TCPC_RX_DATA,
743 &msg.payload, payload_cnt);
744
745 /* Read complete, clear RX status alert bit */
746 tcpci_write16(tcpci, TCPC_ALERT, TCPC_ALERT_RX_STATUS);
747
748 tcpm_pd_receive(tcpci->port, &msg);
749 }
750
751 if (tcpci->data->vbus_vsafe0v && (status & TCPC_ALERT_EXTENDED_STATUS)) {
752 ret = regmap_read(tcpci->regmap, TCPC_EXTENDED_STATUS, &raw);
753 if (!ret && (raw & TCPC_EXTENDED_STATUS_VSAFE0V))
754 tcpm_vbus_change(tcpci->port);
755 }
756
757 if (status & TCPC_ALERT_RX_HARD_RST)
758 tcpm_pd_hard_reset(tcpci->port);
759
760 if (status & TCPC_ALERT_TX_SUCCESS)
761 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_SUCCESS);
762 else if (status & TCPC_ALERT_TX_DISCARDED)
763 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_DISCARDED);
764 else if (status & TCPC_ALERT_TX_FAILED)
765 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_FAILED);
766
767 return IRQ_HANDLED;
768 }
769 EXPORT_SYMBOL_GPL(tcpci_irq);
770
_tcpci_irq(int irq,void * dev_id)771 static irqreturn_t _tcpci_irq(int irq, void *dev_id)
772 {
773 struct tcpci_chip *chip = dev_id;
774
775 return tcpci_irq(chip->tcpci);
776 }
777
778 static const struct regmap_config tcpci_regmap_config = {
779 .reg_bits = 8,
780 .val_bits = 8,
781
782 .max_register = 0x7F, /* 0x80 .. 0xFF are vendor defined */
783 };
784
tcpci_parse_config(struct tcpci * tcpci)785 static int tcpci_parse_config(struct tcpci *tcpci)
786 {
787 tcpci->controls_vbus = true; /* XXX */
788
789 tcpci->tcpc.fwnode = device_get_named_child_node(tcpci->dev,
790 "connector");
791 if (!tcpci->tcpc.fwnode) {
792 dev_err(tcpci->dev, "Can't find connector node.\n");
793 return -EINVAL;
794 }
795
796 return 0;
797 }
798
tcpci_register_port(struct device * dev,struct tcpci_data * data)799 struct tcpci *tcpci_register_port(struct device *dev, struct tcpci_data *data)
800 {
801 struct tcpci *tcpci;
802 int err;
803
804 tcpci = devm_kzalloc(dev, sizeof(*tcpci), GFP_KERNEL);
805 if (!tcpci)
806 return ERR_PTR(-ENOMEM);
807
808 tcpci->dev = dev;
809 tcpci->data = data;
810 tcpci->regmap = data->regmap;
811
812 tcpci->tcpc.init = tcpci_init;
813 tcpci->tcpc.get_vbus = tcpci_get_vbus;
814 tcpci->tcpc.set_vbus = tcpci_set_vbus;
815 tcpci->tcpc.set_cc = tcpci_set_cc;
816 tcpci->tcpc.apply_rc = tcpci_apply_rc;
817 tcpci->tcpc.get_cc = tcpci_get_cc;
818 tcpci->tcpc.set_polarity = tcpci_set_polarity;
819 tcpci->tcpc.set_vconn = tcpci_set_vconn;
820 tcpci->tcpc.start_toggling = tcpci_start_toggling;
821
822 tcpci->tcpc.set_pd_rx = tcpci_set_pd_rx;
823 tcpci->tcpc.set_roles = tcpci_set_roles;
824 tcpci->tcpc.pd_transmit = tcpci_pd_transmit;
825 tcpci->tcpc.set_bist_data = tcpci_set_bist_data;
826 tcpci->tcpc.enable_frs = tcpci_enable_frs;
827 tcpci->tcpc.frs_sourcing_vbus = tcpci_frs_sourcing_vbus;
828 tcpci->tcpc.set_partner_usb_comm_capable = tcpci_set_partner_usb_comm_capable;
829 tcpci->tcpc.check_contaminant = tcpci_check_contaminant;
830
831 if (tcpci->data->auto_discharge_disconnect) {
832 tcpci->tcpc.enable_auto_vbus_discharge = tcpci_enable_auto_vbus_discharge;
833 tcpci->tcpc.set_auto_vbus_discharge_threshold =
834 tcpci_set_auto_vbus_discharge_threshold;
835 regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_POWER_CTRL_BLEED_DISCHARGE,
836 TCPC_POWER_CTRL_BLEED_DISCHARGE);
837 }
838
839 if (tcpci->data->vbus_vsafe0v)
840 tcpci->tcpc.is_vbus_vsafe0v = tcpci_is_vbus_vsafe0v;
841
842 err = tcpci_parse_config(tcpci);
843 if (err < 0)
844 return ERR_PTR(err);
845
846 tcpci->port = tcpm_register_port(tcpci->dev, &tcpci->tcpc);
847 if (IS_ERR(tcpci->port))
848 return ERR_CAST(tcpci->port);
849
850 return tcpci;
851 }
852 EXPORT_SYMBOL_GPL(tcpci_register_port);
853
tcpci_unregister_port(struct tcpci * tcpci)854 void tcpci_unregister_port(struct tcpci *tcpci)
855 {
856 tcpm_unregister_port(tcpci->port);
857 }
858 EXPORT_SYMBOL_GPL(tcpci_unregister_port);
859
tcpci_probe(struct i2c_client * client,const struct i2c_device_id * i2c_id)860 static int tcpci_probe(struct i2c_client *client,
861 const struct i2c_device_id *i2c_id)
862 {
863 struct tcpci_chip *chip;
864 int err;
865 u16 val = 0;
866
867 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
868 if (!chip)
869 return -ENOMEM;
870
871 chip->data.regmap = devm_regmap_init_i2c(client, &tcpci_regmap_config);
872 if (IS_ERR(chip->data.regmap))
873 return PTR_ERR(chip->data.regmap);
874
875 i2c_set_clientdata(client, chip);
876
877 /* Disable chip interrupts before requesting irq */
878 err = regmap_raw_write(chip->data.regmap, TCPC_ALERT_MASK, &val,
879 sizeof(u16));
880 if (err < 0)
881 return err;
882
883 chip->tcpci = tcpci_register_port(&client->dev, &chip->data);
884 if (IS_ERR(chip->tcpci))
885 return PTR_ERR(chip->tcpci);
886
887 err = devm_request_threaded_irq(&client->dev, client->irq, NULL,
888 _tcpci_irq,
889 IRQF_ONESHOT | IRQF_TRIGGER_LOW,
890 dev_name(&client->dev), chip);
891 if (err < 0) {
892 tcpci_unregister_port(chip->tcpci);
893 return err;
894 }
895
896 return 0;
897 }
898
tcpci_remove(struct i2c_client * client)899 static int tcpci_remove(struct i2c_client *client)
900 {
901 struct tcpci_chip *chip = i2c_get_clientdata(client);
902 int err;
903
904 /* Disable chip interrupts before unregistering port */
905 err = tcpci_write16(chip->tcpci, TCPC_ALERT_MASK, 0);
906 if (err < 0)
907 dev_warn(&client->dev, "Failed to disable irqs (%pe)\n", ERR_PTR(err));
908
909 tcpci_unregister_port(chip->tcpci);
910
911 return 0;
912 }
913
914 static const struct i2c_device_id tcpci_id[] = {
915 { "tcpci", 0 },
916 { }
917 };
918 MODULE_DEVICE_TABLE(i2c, tcpci_id);
919
920 #ifdef CONFIG_OF
921 static const struct of_device_id tcpci_of_match[] = {
922 { .compatible = "nxp,ptn5110", },
923 {},
924 };
925 MODULE_DEVICE_TABLE(of, tcpci_of_match);
926 #endif
927
928 static struct i2c_driver tcpci_i2c_driver = {
929 .driver = {
930 .name = "tcpci",
931 .of_match_table = of_match_ptr(tcpci_of_match),
932 },
933 .probe = tcpci_probe,
934 .remove = tcpci_remove,
935 .id_table = tcpci_id,
936 };
937 module_i2c_driver(tcpci_i2c_driver);
938
939 MODULE_DESCRIPTION("USB Type-C Port Controller Interface driver");
940 MODULE_LICENSE("GPL");
941