1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Rockchip CIF Driver 4 * 5 * Copyright (C) 2020 Rockchip Electronics Co., Ltd. 6 */ 7 8 #ifndef _RKCIF_HW_H 9 #define _RKCIF_HW_H 10 11 #include <linux/mutex.h> 12 #include <media/media-device.h> 13 #include <media/media-entity.h> 14 #include <media/v4l2-ctrls.h> 15 #include <media/v4l2-device.h> 16 #include <media/videobuf2-v4l2.h> 17 #include <media/v4l2-mc.h> 18 #include <linux/rk-camera-module.h> 19 #include "regs.h" 20 #include "version.h" 21 #include "dev.h" 22 23 #define RKCIF_DEV_MAX 7 24 #define RKCIF_HW_DRIVER_NAME "rkcifhw" 25 #define RKCIF_MAX_BUS_CLK 15 26 #define RKCIF_MAX_RESET 15 27 28 #define RKCIF_MAX_GROUP 4 29 30 #define write_cif_reg(base, addr, val) \ 31 writel(val, (addr) + (base)) 32 #define read_cif_reg(base, addr) \ 33 readl((addr) + (base)) 34 #define write_cif_reg_or(base, addr, val) \ 35 writel(readl((addr) + (base)) | (val), (addr) + (base)) 36 #define write_cif_reg_and(base, addr, val) \ 37 writel(readl((addr) + (base)) & (val), (addr) + (base)) 38 39 /* 40 * multi sensor sync mode 41 * RKCIF_NOSYNC_MODE: not used sync mode 42 * RKCIF_MASTER_MASTER: internal master->external master 43 * RKCIF_MASTER_SLAVE: internal master->slave 44 * RKCIF_MASTER_MASTER: pwm/gpio->external master 45 * RKCIF_MASTER_MASTER: pwm/gpio->slave 46 */ 47 enum rkcif_sync_mode { 48 RKCIF_NOSYNC_MODE, 49 RKCIF_MASTER_MASTER, 50 RKCIF_MASTER_SLAVE, 51 RKCIF_EXT_MASTER, 52 RKCIF_EXT_SLAVE, 53 }; 54 55 struct rkcif_sync_dev { 56 struct rkcif_device *cif_dev[RKCIF_DEV_MAX]; 57 int count; 58 bool is_streaming[RKCIF_DEV_MAX]; 59 }; 60 61 struct rkcif_multi_sync_config { 62 struct rkcif_sync_dev int_master; 63 struct rkcif_sync_dev ext_master; 64 struct rkcif_sync_dev slave; 65 enum rkcif_sync_mode mode; 66 int dev_cnt; 67 int streaming_cnt; 68 u32 sync_code; 69 u32 sync_mask; 70 u32 update_code; 71 u32 update_cache; 72 u32 frame_idx; 73 bool is_attach; 74 }; 75 76 struct rkcif_dummy_buffer { 77 struct list_head list; 78 struct dma_buf *dbuf; 79 dma_addr_t dma_addr; 80 struct page **pages; 81 void *mem_priv; 82 void *vaddr; 83 u32 size; 84 int dma_fd; 85 bool is_need_vaddr; 86 bool is_need_dbuf; 87 bool is_need_dmafd; 88 bool is_free; 89 }; 90 91 /* 92 * add new chip id in tail in time order 93 * by increasing to distinguish cif version 94 */ 95 enum rkcif_chip_id { 96 CHIP_PX30_CIF, 97 CHIP_RK3128_CIF, 98 CHIP_RK3288_CIF, 99 CHIP_RK3328_CIF, 100 CHIP_RK3368_CIF, 101 CHIP_RK1808_CIF, 102 CHIP_RV1126_CIF, 103 CHIP_RV1126_CIF_LITE, 104 CHIP_RK3568_CIF, 105 CHIP_RK3588_CIF, 106 CHIP_RV1106_CIF, 107 CHIP_RK3562_CIF, 108 }; 109 110 struct rkcif_hw_match_data { 111 int chip_id; 112 const char * const *clks; 113 const char * const *rsts; 114 int clks_num; 115 int rsts_num; 116 const struct cif_reg *cif_regs; 117 }; 118 119 /* 120 * struct rkcif_device - ISP platform device 121 * @base_addr: base register address 122 * @active_sensor: sensor in-use, set when streaming on 123 * @stream: capture video device 124 */ 125 struct rkcif_hw { 126 struct device *dev; 127 int irq; 128 void __iomem *base_addr; 129 void __iomem *csi_base; 130 struct regmap *grf; 131 struct clk *clks[RKCIF_MAX_BUS_CLK]; 132 int clk_size; 133 struct iommu_domain *domain; 134 struct reset_control *cif_rst[RKCIF_MAX_RESET]; 135 int chip_id; 136 const struct cif_reg *cif_regs; 137 const struct vb2_mem_ops *mem_ops; 138 struct rkcif_device *cif_dev[RKCIF_DEV_MAX]; 139 int dev_num; 140 atomic_t power_cnt; 141 const struct rkcif_hw_match_data *match_data; 142 struct mutex dev_lock; 143 struct rkcif_multi_sync_config sync_config[RKCIF_MAX_GROUP]; 144 spinlock_t group_lock; 145 struct notifier_block reset_notifier; /* reset for mipi csi crc err */ 146 struct rkcif_dummy_buffer dummy_buf; 147 bool iommu_en; 148 bool can_be_reset; 149 bool is_dma_sg_ops; 150 bool is_dma_contig; 151 bool adapt_to_usbcamerahal; 152 u64 irq_time; 153 bool is_rk3588s2; 154 }; 155 156 void rkcif_hw_soft_reset(struct rkcif_hw *cif_hw, bool is_rst_iommu); 157 void rkcif_disable_sys_clk(struct rkcif_hw *cif_hw); 158 int rkcif_enable_sys_clk(struct rkcif_hw *cif_hw); 159 int rk_cif_plat_drv_init(void); 160 161 #endif 162