1 /* 2 * Copyright (c) 2019 Rockchip Corporation 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 * 16 */ 17 18 #ifndef _RK_AIQ_TYPES_PRIV_H_ 19 #define _RK_AIQ_TYPES_PRIV_H_ 20 #include <string> 21 #include <vector> 22 #include "rk_aiq_types.h" 23 #include "rk-camera-module.h" 24 #include "MessageBus.h" 25 #include "common/rkisp2-config.h" 26 #include "common/rkisp21-config.h" 27 #include "common/rkisp3-config.h" 28 #include "common/rkisp32-config.h" 29 #include "buffer_pool.h" 30 31 #define RKAIQ_ISP_LDCH_ID (1 << 0) 32 33 template<class T> 34 struct rk_aiq_isp_params_t : public XCam::BufferData { 35 /* should be the first member */ 36 union { 37 bool is_update; 38 char aligned[4]; // for aligned to 4 39 }; 40 T result; 41 uint32_t frame_id; 42 uint32_t sync_flag; rk_aiq_isp_params_trk_aiq_isp_params_t43 rk_aiq_isp_params_t() { 44 is_update = false; 45 sync_flag = (uint32_t)(-2); // initial value should be different with handler's 46 } 47 }; 48 49 //common 50 typedef rk_aiq_isp_params_t<rk_aiq_isp_stats_t> rk_aiq_isp_stats_wrapper_t; 51 typedef rk_aiq_isp_params_t<rk_aiq_focus_params_t> rk_aiq_focus_params_wrapper_t; 52 53 // v20 params struct 54 typedef rk_aiq_isp_params_t<rk_aiq_isp_aec_meas_t> rk_aiq_isp_aec_params_v20_t; 55 typedef rk_aiq_isp_params_t<rk_aiq_isp_hist_meas_t> rk_aiq_isp_hist_params_v20_t; 56 typedef rk_aiq_isp_params_t<rk_aiq_awb_stat_cfg_v200_t> rk_aiq_isp_awb_params_v20_t; 57 typedef rk_aiq_isp_params_t<rk_aiq_wb_gain_t> rk_aiq_isp_awb_gain_params_v20_t; 58 typedef rk_aiq_isp_params_t<rk_aiq_isp_af_meas_t> rk_aiq_isp_af_params_v20_t; 59 typedef rk_aiq_isp_params_t<rk_aiq_isp_dpcc_t> rk_aiq_isp_dpcc_params_v20_t; 60 typedef rk_aiq_isp_params_t<rk_aiq_isp_merge_t> rk_aiq_isp_merge_params_v20_t; 61 typedef rk_aiq_isp_params_t<rk_aiq_isp_tmo_t> rk_aiq_isp_tmo_params_v20_t; 62 typedef rk_aiq_isp_params_t<rk_aiq_ccm_cfg_t> rk_aiq_isp_ccm_params_v20_t; 63 typedef rk_aiq_isp_params_t<rk_aiq_lsc_cfg_t> rk_aiq_isp_lsc_params_v20_t; 64 typedef rk_aiq_isp_params_t<rk_aiq_isp_blc_t> rk_aiq_isp_blc_params_v20_t; 65 typedef rk_aiq_isp_params_t<rk_aiq_isp_rawnr_t> rk_aiq_isp_rawnr_params_v20_t; 66 typedef rk_aiq_isp_params_t<rk_aiq_isp_gic_t> rk_aiq_isp_gic_params_v20_t; 67 typedef rk_aiq_isp_params_t<rk_aiq_isp_debayer_t> rk_aiq_isp_debayer_params_v20_t; 68 typedef rk_aiq_isp_params_t<rk_aiq_isp_ldch_t> rk_aiq_isp_ldch_params_v20_t; 69 typedef rk_aiq_isp_params_t<rk_aiq_lut3d_cfg_t> rk_aiq_isp_lut3d_params_v20_t; 70 typedef rk_aiq_isp_params_t<rk_aiq_isp_dehaze_t> rk_aiq_isp_dehaze_params_v20_t; 71 typedef rk_aiq_isp_params_t<AgammaProcRes_t> rk_aiq_isp_agamma_params_v20_t; 72 typedef rk_aiq_isp_params_t<AdegammaProcRes_t> rk_aiq_isp_adegamma_params_v20_t; 73 typedef rk_aiq_isp_params_t<rk_aiq_isp_wdr_t> rk_aiq_isp_wdr_params_v20_t; 74 typedef rk_aiq_isp_params_t<rk_aiq_isp_csm_t> rk_aiq_isp_csm_params_v20_t; 75 typedef rk_aiq_isp_params_t<rk_aiq_isp_cgc_t> rk_aiq_isp_cgc_params_v20_t; 76 typedef rk_aiq_isp_params_t<rk_aiq_isp_conv422_t> rk_aiq_isp_conv422_params_v20_t; 77 typedef rk_aiq_isp_params_t<rk_aiq_isp_yuvconv_t> rk_aiq_isp_yuvconv_params_v20_t; 78 typedef rk_aiq_isp_params_t<rk_aiq_isp_gain_t> rk_aiq_isp_gain_params_v20_t; 79 typedef rk_aiq_isp_params_t<rk_aiq_acp_params_t> rk_aiq_isp_cp_params_v20_t; 80 typedef rk_aiq_isp_params_t<rk_aiq_isp_ie_t> rk_aiq_isp_ie_params_v20_t; 81 typedef rk_aiq_isp_params_t<CalibDb_MFNR_Motion_t> rk_aiq_isp_motion_params_v20_t; 82 typedef rk_aiq_isp_params_t<rk_aiq_amd_params_t> rk_aiq_isp_md_params_v20_t; 83 84 #ifdef ISP_HW_V20 85 typedef struct rkisp_effect_params_s { 86 struct isp2x_isp_params_cfg isp_params; 87 rk_aiq_awb_stat_cfg_v200_t awb_cfg; 88 } rkisp_effect_params_v20; 89 #elif ISP_HW_V21 90 typedef struct rkisp_effect_params_s { 91 struct isp21_isp_params_cfg isp_params_v21; 92 rk_aiq_awb_stat_cfg_v201_t awb_cfg_v201; 93 rk_aiq_isp_blc_v21_t blc_cfg; 94 } rkisp_effect_params_v20; 95 #elif ISP_HW_V30 96 typedef struct rkisp_effect_params_s { 97 struct isp3x_isp_params_cfg isp_params_v3x[3]; 98 rk_aiq_isp_awb_meas_cfg_v3x_t awb_cfg_v3x; 99 rk_aiq_isp_blc_v21_t blc_cfg; 100 } rkisp_effect_params_v20; 101 #elif defined(ISP_HW_V32) || defined(ISP_HW_V32_LITE) 102 typedef struct rkisp_effect_params_s { 103 //struct isp32_isp_params_cfg isp_params_v32; 104 struct isp32_isp_meas_cfg meas; 105 struct isp32_bls_cfg bls_cfg; 106 struct isp32_awb_gain_cfg awb_gain_cfg; 107 rk_aiq_awb_stat_cfg_v32_t awb_cfg_v32; 108 } rkisp_effect_params_v20; 109 #else 110 typedef struct rkisp_effect_params_s { 111 union { 112 struct isp2x_isp_params_cfg isp_params; 113 struct isp21_isp_params_cfg isp_params_v21; 114 struct isp3x_isp_params_cfg isp_params_v3x[3]; 115 struct isp32_isp_params_cfg isp_params_v32; 116 }; 117 union { 118 rk_aiq_awb_stat_cfg_v200_t awb_cfg; 119 rk_aiq_awb_stat_cfg_v201_t awb_cfg_v201; 120 rk_aiq_isp_awb_meas_cfg_v3x_t awb_cfg_v3x; 121 rk_aiq_awb_stat_cfg_v32_t awb_cfg_v32; 122 123 }; 124 rk_aiq_isp_blc_v21_t blc_cfg; 125 } rkisp_effect_params_v20; 126 #endif 127 128 typedef rk_aiq_isp_params_t<rkisp_effect_params_v20> rkisp_effect_params; 129 130 #define RKAIQ_ISPP_TNR_ID (1 << 0) 131 #define RKAIQ_ISPP_NR_ID (1 << 1) 132 #define RKAIQ_ISPP_SHARP_ID (1 << 2) 133 #define RKAIQ_ISPP_FEC_ID (1 << 3) 134 #define RKAIQ_ISPP_ORB_ID (1 << 4) 135 #define RKAIQ_ISPP_FEC_ST_ID (1<< 17 | RKAIQ_ISPP_FEC_ID) 136 137 typedef rk_aiq_isp_params_t<rk_aiq_isp_tnr_t> rk_aiq_isp_tnr_params_v20_t; 138 typedef rk_aiq_isp_params_t<rk_aiq_isp_ynr_t> rk_aiq_isp_ynr_params_v20_t; 139 typedef rk_aiq_isp_params_t<rk_aiq_isp_uvnr_t> rk_aiq_isp_uvnr_params_v20_t; 140 typedef rk_aiq_isp_params_t<rk_aiq_isp_sharpen_t> rk_aiq_isp_sharpen_params_v20_t; 141 typedef rk_aiq_isp_params_t<rk_aiq_isp_edgeflt_t> rk_aiq_isp_edgeflt_params_v20_t; 142 typedef rk_aiq_isp_params_t<rk_aiq_isp_fec_t> rk_aiq_isp_fec_params_v20_t; 143 typedef rk_aiq_isp_params_t<rk_aiq_isp_orb_t> rk_aiq_isp_orb_params_v20_t; 144 typedef rk_aiq_isp_params_t<rk_aiq_isp_afd_t> rk_aiq_isp_afd_params_t; 145 146 // v21 params struct 147 typedef rk_aiq_isp_params_t<rk_aiq_awb_stat_cfg_v201_t> rk_aiq_isp_awb_params_v21_t; 148 typedef rk_aiq_isp_params_t<rk_aiq_isp_drc_v21_t> rk_aiq_isp_drc_params_v21_t; 149 typedef rk_aiq_isp_params_t<rk_aiq_isp_blc_v21_t> rk_aiq_isp_blc_params_v21_t; 150 typedef rk_aiq_isp_params_t<rk_aiq_isp_dehaze_t> rk_aiq_isp_dehaze_params_v21_t; 151 typedef rk_aiq_isp_params_t<rk_aiq_isp_baynr_v21_t> rk_aiq_isp_baynr_params_v21_t; 152 typedef rk_aiq_isp_params_t<rk_aiq_isp_bay3d_v21_t> rk_aiq_isp_bay3d_params_v21_t; 153 typedef rk_aiq_isp_params_t<rk_aiq_isp_ynr_v21_t> rk_aiq_isp_ynr_params_v21_t; 154 typedef rk_aiq_isp_params_t<rk_aiq_isp_cnr_v21_t> rk_aiq_isp_cnr_params_v21_t; 155 typedef rk_aiq_isp_params_t<rk_aiq_isp_sharp_v21_t> rk_aiq_isp_sharpen_params_v21_t; 156 157 // v3x params struct 158 typedef rk_aiq_isp_params_t<rk_aiq_isp_awb_meas_cfg_v3x_t> rk_aiq_isp_awb_params_v3x_t; 159 typedef rk_aiq_isp_params_t<rk_aiq_isp_af_meas_v3x_t> rk_aiq_isp_af_params_v3x_t; 160 typedef rk_aiq_isp_params_t<rk_aiq_isp_goc_v3x_t> rk_aiq_isp_agamma_params_v3x_t; 161 typedef rk_aiq_isp_params_t<rk_aiq_isp_drc_v3x_t> rk_aiq_isp_drc_params_v3x_t; 162 typedef rk_aiq_isp_params_t<rk_aiq_isp_merge_v3x_t> rk_aiq_isp_merge_params_v3x_t; 163 typedef rk_aiq_isp_params_t<rk_aiq_isp_dehaze_t> rk_aiq_isp_dehaze_params_v3x_t; 164 typedef rk_aiq_isp_params_t<rk_aiq_isp_baynr_v3x_t> rk_aiq_isp_baynr_params_v3x_t; 165 typedef rk_aiq_isp_params_t<rk_aiq_isp_bay3d_v3x_t> rk_aiq_isp_bay3d_params_v3x_t; 166 typedef rk_aiq_isp_params_t<rk_aiq_isp_ynr_v3x_t> rk_aiq_isp_ynr_params_v3x_t; 167 typedef rk_aiq_isp_params_t<rk_aiq_isp_cnr_v3x_t> rk_aiq_isp_cnr_params_v3x_t; 168 typedef rk_aiq_isp_params_t<rk_aiq_isp_sharp_v3x_t> rk_aiq_isp_sharpen_params_v3x_t; 169 typedef rk_aiq_isp_params_t<rk_aiq_isp_cac_v3x_t> rk_aiq_isp_cac_params_v3x_t; 170 typedef rk_aiq_isp_params_t<rk_aiq_isp_gain_v3x_t> rk_aiq_isp_gain_params_v3x_t; 171 typedef rk_aiq_isp_params_t<rk_aiq_isp_tnr_v3x_t> rk_aiq_isp_tnr_params_v3x_t; 172 173 // v32 param struct 174 typedef rk_aiq_isp_params_t<rk_aiq_isp_blc_v32_t> rk_aiq_isp_blc_params_v32_t; 175 typedef rk_aiq_isp_params_t<rk_aiq_isp_bay3d_v32_t> rk_aiq_isp_bay3d_params_v32_t; 176 typedef rk_aiq_isp_params_t<rk_aiq_isp_baynr_v32_t> rk_aiq_isp_baynr_params_v32_t; 177 typedef rk_aiq_isp_params_t<rk_aiq_isp_cac_v32_t> rk_aiq_isp_cac_params_v32_t; 178 typedef rk_aiq_isp_params_t<rk_aiq_isp_debayer_v32_t> rk_aiq_isp_debayer_params_v32_t; 179 typedef rk_aiq_isp_params_t<rk_aiq_ccm_cfg_v2_t> rk_aiq_isp_ccm_params_v32_t; 180 typedef rk_aiq_isp_params_t<rk_aiq_isp_ldch_v21_t> rk_aiq_isp_ldch_params_v32_t; 181 typedef rk_aiq_isp_params_t<rk_aiq_isp_ynr_v32_t> rk_aiq_isp_ynr_params_v32_t; 182 typedef rk_aiq_isp_params_t<rk_aiq_isp_cnr_v32_t> rk_aiq_isp_cnr_params_v32_t; 183 typedef rk_aiq_isp_params_t<rk_aiq_isp_sharp_v32_t> rk_aiq_isp_sharp_params_v32_t; 184 typedef rk_aiq_isp_params_t<rk_aiq_isp_awb_meas_cfg_v32_t> rk_aiq_isp_awb_params_v32_t; 185 typedef rk_aiq_isp_params_t<rk_aiq_isp_af_v31_t> rk_aiq_isp_af_params_v32_t; 186 typedef rk_aiq_isp_params_t<rk_aiq_isp_tnr_v32_t> rk_aiq_isp_tnr_params_v32_t; 187 typedef rk_aiq_isp_params_t<rk_aiq_wb_gain_v32_t> rk_aiq_isp_awb_gain_params_v32_t; 188 189 // v32 lite param struct 190 typedef rk_aiq_isp_params_t<rk_aiq_isp_af_v32_t> rk_aiq_isp_af_params_v32_lite_t; 191 192 typedef enum rk_aiq_drv_share_mem_type_e { 193 MEM_TYPE_LDCH, 194 MEM_TYPE_FEC, 195 MEM_TYPE_CAC, 196 MEM_TYPE_DBG_INFO, 197 } rk_aiq_drv_share_mem_type_t; 198 199 typedef void (*alloc_mem_t)(uint8_t id, void* ops_ctx, void* cfg, void** mem_ctx); 200 typedef void (*release_mem_t)(uint8_t id, void* mem_ctx); 201 typedef void* (*get_free_item_t)(uint8_t id, void* mem_ctx); 202 typedef struct isp_drv_share_mem_ops_s { 203 alloc_mem_t alloc_mem; 204 release_mem_t release_mem; 205 get_free_item_t get_free_item; 206 } isp_drv_share_mem_ops_t; 207 208 typedef struct rk_aiq_lut_share_mem_info_s { 209 int size{-1}; 210 void *map_addr{nullptr}; 211 void *addr{nullptr}; 212 int fd{-1}; 213 char *state{nullptr}; 214 } rk_aiq_lut_share_mem_info_t; 215 216 typedef rk_aiq_lut_share_mem_info_t rk_aiq_ldch_share_mem_info_t; 217 typedef rk_aiq_lut_share_mem_info_t rk_aiq_cac_share_mem_info_t; 218 typedef rk_aiq_lut_share_mem_info_t rk_aiq_dbg_share_mem_info_t; 219 220 typedef struct rk_aiq_fec_share_mem_info_s { 221 int size; 222 int fd; 223 void *map_addr; 224 unsigned char *meshxf; 225 unsigned char *meshyf; 226 unsigned short *meshxi; 227 unsigned short *meshyi; 228 char *state; 229 } rk_aiq_fec_share_mem_info_t; 230 231 typedef struct rk_aiq_share_mem_alloc_param_s { 232 int width; 233 int height; 234 char reserved[8]; 235 } rk_aiq_share_mem_alloc_param_t; 236 237 typedef struct rk_aiq_share_mem_config_s { 238 rk_aiq_drv_share_mem_type_t mem_type; 239 rk_aiq_share_mem_alloc_param_t alloc_param; 240 } rk_aiq_share_mem_config_t; 241 242 struct rk_aiq_vbuf_info { 243 uint32_t frame_id; 244 uint32_t timestamp; 245 float exp_time; 246 float exp_gain; 247 uint32_t exp_time_reg; 248 uint32_t exp_gain_reg; 249 uint32_t data_fd; 250 uint8_t *data_addr; 251 uint32_t data_length; 252 rk_aiq_rawbuf_type_t buf_type; 253 bool valid; 254 }; 255 256 struct rk_aiq_vbuf { 257 void *base_addr; 258 uint32_t frame_width; 259 uint32_t frame_height; 260 struct rk_aiq_vbuf_info buf_info[3];/*index: 0-short,1-medium,2-long*/ 261 }; 262 263 typedef struct rk_aiq_tx_info_s { 264 uint32_t width; 265 uint32_t height; 266 uint8_t bpp; 267 uint8_t bayer_fmt; 268 uint32_t stridePerLine; 269 uint32_t bytesPerLine; 270 bool storage_type; 271 uint32_t id; 272 //get from AE 273 bool IsAeConverged; 274 bool envChange; 275 void *data_addr; 276 RKAiqAecExpInfo_t *aecExpInfo; 277 } rk_aiq_tx_info_t; 278 279 enum cam_thread_type_e { 280 ISP_POLL_LUMA, 281 ISP_POLL_3A_STATS, 282 ISP_POLL_PARAMS, 283 ISPP_POLL_FEC_PARAMS, 284 ISPP_POLL_TNR_PARAMS, 285 ISPP_POLL_NR_PARAMS, 286 ISPP_POLL_TNR_STATS, 287 ISPP_POLL_NR_STATS, 288 ISP_POLL_SOF, 289 ISP_POLL_TX, 290 ISP_POLL_RX, 291 ISP_POLL_SP, 292 ISP_POLL_PDAF_STATS, 293 ISP_GAIN, 294 ISP_NR_IMG, 295 ISPP_GAIN_KG, 296 ISPP_GAIN_WR, 297 ISP_POLL_ISPSTREAMSYNC, 298 VICAP_STREAM_ON_EVT, 299 VICAP_RESET_EVT, 300 VICAP_WITH_RK1608_RESET_EVT, 301 VICAP_POLL_SCL, 302 ISP_POLL_POST_MAX, 303 }; 304 305 /* 306 * enum cam_result_type_e { 307 * RESULT_TYPE_INVALID, 308 * RESULT_TYPE_EXPOSURE, 309 * RESULT_TYPE_ISP_OTHER, 310 * RESULT_TYPE_ISPP_OTHER, 311 * RESULT_TYPE_ISP_MEAS, 312 * RESULT_TYPE_ISPP_MEAS, 313 * RESULT_TYPE_AF_PARAM, 314 * RESULT_TYPE_IRIS_PARAM, 315 * RESULT_TYPE_CPSL_PARAM, 316 * RESULT_TYPE_FLASH_PARAM 317 * }; 318 */ 319 320 #define MAX_MEDIA_INDEX 16 321 #define DEV_PATH_LEN 32 322 #define SENSOR_ATTACHED_FLASH_MAX_NUM 2 323 #define MAX_CAM_NUM 8 324 325 #define MAX_ISP_LINKED_VICAP_CNT 4 326 327 #define ISP_TX_BUF_NUM 4 328 #define VIPCAP_TX_BUF_NUM 4 329 #define VIPCAP_TX_BUF_NUM_1608 6 // For mount 3 sensor, is mount 4 sensor, is 7 330 331 typedef struct { 332 int model_idx; 333 int logic_id; 334 int phy_id; // physical isp id 335 int linked_sensor; 336 bool is_multi_isp_mode; // isp-unit mode, 2 isp to 1 337 bool isMultiplex; // muliplex mode, virtually sed by more than one sensor 338 bool linked_dvp; 339 bool valid; 340 char media_dev_path[DEV_PATH_LEN]; 341 char isp_dev_path[DEV_PATH_LEN]; 342 char csi_dev_path[DEV_PATH_LEN]; 343 char mpfbc_dev_path[DEV_PATH_LEN]; 344 char main_path[DEV_PATH_LEN]; 345 char self_path[DEV_PATH_LEN]; 346 char rawwr0_path[DEV_PATH_LEN]; 347 char rawwr1_path[DEV_PATH_LEN]; 348 char rawwr2_path[DEV_PATH_LEN]; 349 char rawwr3_path[DEV_PATH_LEN]; 350 char dma_path[DEV_PATH_LEN]; 351 char rawrd0_m_path[DEV_PATH_LEN]; 352 char rawrd1_l_path[DEV_PATH_LEN]; 353 char rawrd2_s_path[DEV_PATH_LEN]; 354 char stats_path[DEV_PATH_LEN]; 355 char input_params_path[DEV_PATH_LEN]; 356 char mipi_luma_path[DEV_PATH_LEN]; 357 char mipi_dphy_rx_path[DEV_PATH_LEN]; 358 char linked_vicap[MAX_ISP_LINKED_VICAP_CNT][DEV_PATH_LEN]; 359 } rk_aiq_isp_t; 360 361 typedef struct { 362 int model_idx; 363 bool valid; 364 char media_dev_path[DEV_PATH_LEN]; 365 char pp_input_image_path[DEV_PATH_LEN]; 366 char pp_m_bypass_path[DEV_PATH_LEN]; 367 char pp_scale0_path[DEV_PATH_LEN]; 368 char pp_scale1_path[DEV_PATH_LEN]; 369 char pp_scale2_path[DEV_PATH_LEN]; 370 #if defined(ISP_HW_V20) 371 char pp_input_params_path[DEV_PATH_LEN]; 372 char pp_stats_path[DEV_PATH_LEN]; 373 char pp_tnr_params_path[DEV_PATH_LEN]; 374 char pp_tnr_stats_path[DEV_PATH_LEN]; 375 char pp_nr_params_path[DEV_PATH_LEN]; 376 char pp_nr_stats_path[DEV_PATH_LEN]; 377 #endif 378 char pp_fec_params_path[DEV_PATH_LEN]; 379 char pp_dev_path[DEV_PATH_LEN]; 380 } rk_aiq_ispp_t; 381 382 typedef struct { 383 int isp_ver; 384 int awb_ver; 385 int aec_ver; 386 int afc_ver; 387 int ahdr_ver; 388 int blc_ver; 389 int dpcc_ver; 390 int anr_ver; 391 int debayer_ver; 392 int lsc_ver; 393 int ccm_ver; 394 int gamma_ver; 395 int gic_ver; 396 int sharp_ver; 397 int dehaze_ver; 398 } rk_aiq_hw_ver_t; 399 400 typedef struct { 401 rk_aiq_isp_t isp_info[MAX_CAM_NUM]; 402 rk_aiq_ispp_t ispp_info[MAX_CAM_NUM]; 403 rk_aiq_hw_ver_t hw_ver_info; 404 } rk_aiq_isp_hw_info_t; 405 406 typedef struct { 407 int model_idx; 408 char media_dev_path[DEV_PATH_LEN]; 409 char mipi_id0[DEV_PATH_LEN]; 410 char mipi_id1[DEV_PATH_LEN]; 411 char mipi_id2[DEV_PATH_LEN]; 412 char mipi_id3[DEV_PATH_LEN]; 413 char mipi_scl0[DEV_PATH_LEN]; 414 char mipi_scl1[DEV_PATH_LEN]; 415 char mipi_scl2[DEV_PATH_LEN]; 416 char mipi_scl3[DEV_PATH_LEN]; 417 char dvp_id0[DEV_PATH_LEN]; 418 char dvp_id1[DEV_PATH_LEN]; 419 char dvp_id2[DEV_PATH_LEN]; 420 char dvp_id3[DEV_PATH_LEN]; 421 char mipi_dphy_rx_path[DEV_PATH_LEN]; 422 char mipi_csi2_sd_path[DEV_PATH_LEN]; 423 char lvds_sd_path[DEV_PATH_LEN]; 424 char mipi_luma_path[DEV_PATH_LEN]; 425 char stream_cif_path[DEV_PATH_LEN]; 426 char dvp_sof_sd_path[DEV_PATH_LEN]; 427 char model_str[DEV_PATH_LEN]; 428 } rk_aiq_cif_info_t; 429 430 typedef struct { 431 rk_aiq_cif_info_t cif_info[MAX_CAM_NUM]; 432 rk_aiq_hw_ver_t hw_ver_info; 433 } rk_aiq_cif_hw_info_t; 434 435 typedef struct { 436 bool pdaf_support; 437 uint32_t pdaf_vc; 438 uint32_t pdaf_width; 439 uint32_t pdaf_height; 440 uint32_t pdaf_pixelformat; 441 uint32_t pdaf_code; 442 uint8_t pdaf_lrdiffline; 443 char pdaf_vdev[DEV_PATH_LEN]; 444 } rk_sensor_pdaf_info_t; 445 446 typedef struct { 447 /* sensor entity name format: 448 * m01_b_ov13850 1-0010, where 'm01' means module index number 449 * 'b' meansback or front, 'ov13850' is real sensor name 450 * '1-0010' means the i2c bus and sensor i2c slave address 451 */ 452 std::string sensor_name; 453 std::string device_name; 454 std::string len_name; 455 std::string parent_media_dev; 456 int media_node_index; 457 int csi_port; 458 std::string module_lens_dev_name; // matched using mPhyModuleIndex 459 std::string module_ircut_dev_name; 460 int flash_num; 461 std::string module_flash_dev_name[SENSOR_ATTACHED_FLASH_MAX_NUM]; // matched using mPhyModuleIndex 462 bool fl_strth_adj_sup; 463 int flash_ir_num; 464 std::string module_flash_ir_dev_name[SENSOR_ATTACHED_FLASH_MAX_NUM]; 465 bool fl_ir_strth_adj_sup; 466 std::string module_real_sensor_name; //parsed frome sensor entity name 467 std::string module_index_str; // parsed from sensor entity name 468 char phy_module_orient; // parsed from sensor entity name 469 std::vector<rk_frame_fmt_t> frame_size; 470 rk_aiq_isp_t *isp_info; 471 rk_aiq_cif_info_t *cif_info; 472 rk_aiq_ispp_t *ispp_info; 473 bool linked_to_isp; 474 bool linked_to_1608; 475 bool dvp_itf; 476 struct rkmodule_inf mod_info; 477 } rk_sensor_full_info_t; 478 479 typedef void (*ref_t)(void* ops_ctx, void* cfg); 480 typedef void (*unref_t)(void* ops_ctx, void* cfg); 481 typedef struct rk_aiq_share_ptr_ops_s { 482 ref_t ref; 483 unref_t unref; 484 } rk_aiq_share_ptr_ops_t; 485 486 typedef struct rk_aiq_share_ptr_config_s { 487 RkAiqAlgoType_t algo_type; 488 uint32_t frame_id; 489 } rk_aiq_share_ptr_config_t; 490 491 492 class RkAiqAecStats : public XCam::BufferData { 493 public: RkAiqAecStats()494 explicit RkAiqAecStats() { 495 xcam_mem_clear(aec_stats); 496 aec_stats_valid = false; 497 frame_id = -1; 498 af_prior = 0; 499 }; ~RkAiqAecStats()500 virtual ~RkAiqAecStats() {}; 501 rk_aiq_isp_aec_stats_t aec_stats; 502 bool aec_stats_valid; 503 bool af_prior; 504 uint32_t frame_id; 505 private: 506 XCAM_DEAD_COPY (RkAiqAecStats); 507 }; 508 509 class RkAiqAwbStats : public XCam::BufferData { 510 public: RkAiqAwbStats()511 explicit RkAiqAwbStats() { 512 xcam_mem_clear(awb_stats); 513 xcam_mem_clear(awb_stats_v201); 514 xcam_mem_clear(awb_stats_v3x); 515 xcam_mem_clear(blc_cfg_effect); 516 awb_stats_valid = false; 517 awb_cfg_effect_valid = false; 518 frame_id = -1; 519 }; ~RkAiqAwbStats()520 virtual ~RkAiqAwbStats() {}; 521 union { 522 rk_aiq_awb_stat_res_v200_t awb_stats; 523 rk_aiq_awb_stat_res_v201_t awb_stats_v201; 524 rk_aiq_isp_awb_stats_v3x_t awb_stats_v3x; 525 rk_aiq_isp_awb_stats_v32_t awb_stats_v32; 526 }; 527 bool awb_stats_valid; 528 bool awb_cfg_effect_valid; 529 uint32_t frame_id; 530 rk_aiq_isp_blc_t blc_cfg_effect; 531 private: 532 XCAM_DEAD_COPY (RkAiqAwbStats); 533 }; 534 535 class RkAiqAtmoStats : public XCam::BufferData { 536 public: RkAiqAtmoStats()537 explicit RkAiqAtmoStats() { 538 xcam_mem_clear(atmo_stats); 539 atmo_stats_valid = false; 540 frame_id = -1; 541 }; ~RkAiqAtmoStats()542 virtual ~RkAiqAtmoStats() {}; 543 rkisp_atmo_stats_t atmo_stats; 544 bool atmo_stats_valid; 545 uint32_t frame_id; 546 private: 547 XCAM_DEAD_COPY (RkAiqAtmoStats); 548 }; 549 550 class RkAiqAdehazeStats : public XCam::BufferData { 551 public: RkAiqAdehazeStats()552 explicit RkAiqAdehazeStats() { 553 xcam_mem_clear(adehaze_stats); 554 adehaze_stats_valid = false; 555 frame_id = -1; 556 }; ~RkAiqAdehazeStats()557 virtual ~RkAiqAdehazeStats() {}; 558 rkisp_adehaze_stats_t adehaze_stats; 559 bool adehaze_stats_valid; 560 uint32_t frame_id; 561 private: 562 XCAM_DEAD_COPY (RkAiqAdehazeStats); 563 }; 564 565 class RkAiqAfStats : public XCam::BufferData { 566 public: RkAiqAfStats()567 explicit RkAiqAfStats() { 568 xcam_mem_clear(af_stats); 569 xcam_mem_clear(af_stats_v3x); 570 xcam_mem_clear(aecExpInfo); 571 af_stats_valid = false; 572 frame_id = -1; 573 }; ~RkAiqAfStats()574 virtual ~RkAiqAfStats() {}; 575 union { 576 rk_aiq_isp_af_stats_t af_stats; 577 rk_aiq_isp_af_stats_v3x_t af_stats_v3x; 578 }; 579 RKAiqAecExpInfo_t aecExpInfo; 580 bool af_stats_valid; 581 uint32_t frame_id; 582 private: 583 XCAM_DEAD_COPY (RkAiqAfStats); 584 }; 585 586 class RkAiqOrbStats : public XCam::BufferData { 587 public: RkAiqOrbStats()588 explicit RkAiqOrbStats() { 589 xcam_mem_clear(orb_stats); 590 orb_stats_valid = false; 591 frame_id = -1; 592 orb_stats.frame_id = -1; 593 orb_stats.img_buf_index = -1; 594 }; ~RkAiqOrbStats()595 virtual ~RkAiqOrbStats() {}; 596 rk_aiq_isp_orb_stats_t orb_stats; 597 bool orb_stats_valid; 598 uint32_t frame_id; 599 private: 600 XCAM_DEAD_COPY (RkAiqOrbStats); 601 }; 602 603 class RkAiqPdafStats : public XCam::BufferData { 604 public: RkAiqPdafStats()605 explicit RkAiqPdafStats() { 606 xcam_mem_clear(pdaf_stats); 607 pdaf_stats_valid = false; 608 frame_id = -1; 609 }; ~RkAiqPdafStats()610 virtual ~RkAiqPdafStats() {}; 611 rk_aiq_isp_pdaf_stats_t pdaf_stats; 612 bool pdaf_stats_valid; 613 uint32_t frame_id; 614 private: 615 XCAM_DEAD_COPY (RkAiqPdafStats); 616 }; 617 618 typedef struct rk_aiq_scale_raw_info_s { 619 uint8_t bpp; 620 XCamVideoBuffer *raw_s; 621 XCamVideoBuffer *raw_m; 622 XCamVideoBuffer *raw_l; 623 } rk_aiq_scale_raw_info_t; 624 625 typedef struct RkAiqVicapRawBufInfo_s { 626 uint32_t frame_id; 627 bool ready; 628 uint8_t flags; 629 int bpp; 630 SmartPtr<VideoBuffer> raw_s; 631 SmartPtr<VideoBuffer> raw_m; 632 SmartPtr<VideoBuffer> raw_l; resetRkAiqVicapRawBufInfo_s633 void reset() { 634 frame_id = -1; 635 ready = false; 636 flags = 0; 637 bpp = 0; 638 if (raw_s.ptr()) 639 raw_s.release(); 640 if (raw_m.ptr()) 641 raw_m.release(); 642 if (raw_l.ptr()) 643 raw_l.release(); 644 } 645 } RkAiqVicapRawBufInfo_t; 646 647 typedef struct RkAiqVicapRawBuf_s : public BufferData { 648 RkAiqVicapRawBufInfo_t info; mapRkAiqVicapRawBuf_s649 virtual uint8_t* map() override { 650 return (uint8_t*)(&info); 651 } RkAiqVicapRawBuf_sRkAiqVicapRawBuf_s652 RkAiqVicapRawBuf_s() { 653 info.reset(); 654 } ~RkAiqVicapRawBuf_sRkAiqVicapRawBuf_s655 ~RkAiqVicapRawBuf_s() { 656 info.reset(); 657 } 658 } RkAiqVicapRawBuf_t; 659 660 typedef enum RkAiqVicapRawBufFlag_e { 661 RK_AIQ_VICAP_SCALE_HDR_MODE_NORMAL = 0x1, 662 RK_AIQ_VICAP_SCALE_HDR_MODE_2_HDR = 0x3, 663 RK_AIQ_VICAP_SCALE_HDR_MODE_3_HDR = 0x7, 664 } RkAiqVicapRawBufFlag_t; 665 666 enum rk_aiq_core_analyze_type_e { 667 RK_AIQ_CORE_ANALYZE_MEAS, 668 RK_AIQ_CORE_ANALYZE_OTHER, 669 RK_AIQ_CORE_ANALYZE_AMD, 670 RK_AIQ_CORE_ANALYZE_THUMBNAILS, 671 RK_AIQ_CORE_ANALYZE_LSC, 672 RK_AIQ_CORE_ANALYZE_AE, 673 RK_AIQ_CORE_ANALYZE_AMFNR, 674 RK_AIQ_CORE_ANALYZE_AYNR, 675 RK_AIQ_CORE_ANALYZE_AWB, 676 RK_AIQ_CORE_ANALYZE_DHAZ, 677 RK_AIQ_CORE_ANALYZE_GRP0, 678 RK_AIQ_CORE_ANALYZE_GRP1, 679 RK_AIQ_CORE_ANALYZE_AF, 680 RK_AIQ_CORE_ANALYZE_EIS, 681 RK_AIQ_CORE_ANALYZE_ORB, 682 RK_AIQ_CORE_ANALYZE_AFD, 683 RK_AIQ_CORE_ANALYZE_MAX, 684 RK_AIQ_CORE_ANALYZE_ALL = 0xffffffff, 685 }; 686 687 #if defined(__GNUC__) && !defined(__clang__) 688 #pragma GCC diagnostic push 689 #pragma GCC diagnostic ignored "-Wpedantic" 690 #endif 691 static const char* AnalyzerGroupType2Str[32] = { 692 [RK_AIQ_CORE_ANALYZE_MEAS] = "GRP_MEAS", [RK_AIQ_CORE_ANALYZE_OTHER] = "GRP_OTHER", 693 [RK_AIQ_CORE_ANALYZE_AMD] = "GRP_AMD", [RK_AIQ_CORE_ANALYZE_THUMBNAILS] = "GRP_THUMBNAILS", 694 [RK_AIQ_CORE_ANALYZE_LSC] = "GRP_LSC", [RK_AIQ_CORE_ANALYZE_AE] = "GRP_AE", 695 [RK_AIQ_CORE_ANALYZE_AMFNR] = "GRP_AMFNR", [RK_AIQ_CORE_ANALYZE_AYNR] = "GRP_AYNR", 696 [RK_AIQ_CORE_ANALYZE_AWB] = "GRP_AWB", [RK_AIQ_CORE_ANALYZE_DHAZ] = "DHAZ", 697 [RK_AIQ_CORE_ANALYZE_GRP0] = "GRP0", [RK_AIQ_CORE_ANALYZE_GRP1] = "GRP1", 698 [RK_AIQ_CORE_ANALYZE_AF] = "AF", [RK_AIQ_CORE_ANALYZE_EIS] = "EIS", 699 [RK_AIQ_CORE_ANALYZE_ORB] = "ORB", [RK_AIQ_CORE_ANALYZE_AFD] = "AFD", 700 }; 701 #if defined(__GNUC__) && !defined(__clang__) 702 #pragma GCC diagnostic pop 703 #endif 704 705 typedef enum _RkAiqSharedDataType { 706 RK_AIQ_SHARED_TYPE_INVALID, 707 RK_AIQ_SHARED_TYPE_SOF_INFO, 708 RK_AIQ_SHARED_TYPE_3A_STATS, 709 RK_AIQ_SHARED_TYPE_AEC_STATS, 710 RK_AIQ_SHARED_TYPE_ORB_STATS, 711 } RkAiqSharedDataType; 712 713 #endif 714