1 /*
2 * Copyright 2016 Rockchip Electronics Co. LTD
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #define MODULE_TAG "rc_model_v2_smt"
18
19 #include <string.h>
20 #include <math.h>
21
22 #include "mpp_env.h"
23 #include "mpp_mem.h"
24 #include "mpp_common.h"
25
26 #include "rc_base.h"
27 #include "rc_debug.h"
28 #include "rc_model_v2_smt.h"
29 #include "mpp_rc.h"
30
31 #define MAD_THDI 20
32 #define LIMIT_QP_MORE_MOVE 30
33 #define ENOUGH_QP 33
34 #define LOW_QP 34
35 #define LOW_QP_level0 34
36 #define LOW_QP_level1 34
37 #define LOW_LOW_QP 38
38 #define LOW_PRE_DIFF_BIT_USE -20000
39
40 extern RK_S32 tab_lnx[64];
41
42 typedef struct RcModelV2SmtCtx_t {
43 RcCfg usr_cfg;
44 EncRcTaskInfo hal_cfg;
45 RK_U32 frame_type;
46 RK_U32 last_frame_type;
47 RK_S64 gop_total_bits;
48 RK_U32 bit_per_frame;
49 MppDataV2 *i_bit;
50 RK_U32 i_sumbits;
51 RK_U32 i_scale;
52 MppDataV2 *idr_bit;
53 RK_U32 idr_sumbits;
54 RK_U32 idr_scale;
55 MppDataV2 *p_bit;
56 RK_U32 p_sumbits;
57 RK_U32 p_scale;
58 MppDataV2 *pre_p_bit;
59 RK_S32 target_bps;
60 RK_S32 pre_target_bits;
61 RK_S32 pre_real_bits;
62 RK_S32 frm_bits_thr;
63 RK_S32 ins_bps;
64 RK_S32 last_inst_bps;
65 RK_U32 water_level_thr;
66 MppDataV2 *stat_bits;
67 MppDataV2 *stat_rate;
68 RK_S32 stat_watl_thrd;
69 RK_S32 stat_watl;
70 RK_S32 stat_last_watl;
71 RK_S32 next_i_ratio; // scale 64
72 RK_S32 next_ratio; // scale 64
73 RK_S32 pre_i_qp;
74 RK_S32 pre_p_qp;
75 RK_S32 scale_qp; // scale 64
76 MppDataV2 *means_qp;
77 RK_S64 frm_num;
78 RK_S32 reenc_cnt;
79 RK_S32 codec_type; // 264: 0 ; 265: 1
80 RK_S32 qp_min;
81 RK_S32 qp_max;
82 RK_S32 qp_step;
83 MppEncGopMode gop_mode;
84 RK_S32 window_len;
85 RK_S32 intra_to_inter_rate;
86 RK_S32 acc_intra_bits_in_fps;
87 RK_S32 acc_inter_bits_in_fps;
88 RK_S32 acc_total_bits;
89 RK_S64 acc_total_count;
90 RK_S64 acc_intra_count;
91 RK_S64 acc_inter_count;
92 RK_S32 last_fps_bits;
93 RK_S32 pre_gop_left_bit;
94 MppData *qp_p;
95 MppData *sse_p;
96 MppData *intra;
97 MppData *inter;
98 MppData *gop_bits;
99 MppData *intra_percent;
100 MppPIDCtx pid_fps;
101 RK_S32 bps_target_low_rate;
102 RK_S32 bps_target_high_rate;
103 RK_S32 bits_target_low_rate;
104 RK_S32 bits_target_high_rate;
105 RK_S32 bits_per_pic_low_rate;
106 RK_S32 bits_per_intra_low_rate;
107 RK_S32 bits_per_inter_low_rate;
108 RK_S32 bits_per_pic_high_rate;
109 RK_S32 bits_per_intra_high_rate;
110 RK_S32 bits_per_inter_high_rate;
111 RK_S32 pre_diff_bit_low_rate;
112 RK_S32 pre_diff_bit_high_rate;
113 RK_S32 gop_min;
114 MppPIDCtx pid_intra_low_rate;
115 MppPIDCtx pid_intra_high_rate;
116 MppPIDCtx pid_inter_low_rate;
117 MppPIDCtx pid_inter_high_rate;
118 RK_S32 bits_one_gop[1000];
119 RK_S32 bits_one_gop_use_flag;
120 RK_S32 bits_one_gop_sum;
121 RK_S32 delta_bits_per_frame;
122 RK_S32 frame_cnt_in_gop;
123 RK_S32 bits_target_use;
124 RK_S32 qp_out;
125 RK_S32 qp_prev_out;
126 RK_S32 qp_preavg;
127 RK_S32 intra_prerealbit;
128 RK_S32 intra_preqp;
129 RK_S32 intra_presse;
130 RK_S32 intra_premadi;
131 RK_U32 st_madi;
132 } RcModelV2SmtCtx;
133
134 typedef struct InfoList_t {
135 RK_U16 flag; // 1 - valid 0 - unvaild
136 RK_U16 up_left[2]; // 0 - y idx 1 - x idx
137 RK_U16 down_right[2]; // 0 - y idx 1 - x idx
138 } InfoList;
139
140 typedef struct RoiInfo_t {
141 RK_U16 flag; // 1 - valid 0 - unvaild
142 RK_U16 is_move; // 1 - is motion 0 - is motionless
143 RK_U16 up_left[2]; // 0 - y idx 1 - x idx
144 RK_U16 down_right[2]; // 0 - y idx 1 - x idx
145 } RoiInfo;
146
cal_mv_info(InfoList * info)147 static RK_U32 cal_mv_info(InfoList* info)
148 {
149 RK_S32 k, i, j;
150 RK_S32 mb_sta_x, mb_sta_y;
151 RK_S32 mb_end_x, mb_end_y;
152 RK_U32 move_num = 0;
153
154 if (info == NULL)
155 return 0;
156
157 for (k = 0; k < 4096; k++) {
158 if (info[k].flag == 0)
159 break;
160
161 mb_sta_y = info[k].up_left[0] / 16;
162 mb_sta_x = info[k].up_left[1] / 16;
163 mb_end_y = info[k].down_right[0] / 16;
164 mb_end_x = info[k].down_right[1] / 16;
165
166 for (j = mb_sta_y; j <= mb_end_y; j++) {
167 for (i = mb_sta_x; i <= mb_end_x; i++) {
168
169 move_num++;
170 }
171 }
172 }
173
174 return move_num;
175 }
176
bits_model_smt_deinit(RcModelV2SmtCtx * ctx)177 MPP_RET bits_model_smt_deinit(RcModelV2SmtCtx *ctx)
178 {
179 rc_dbg_func("enter %p\n", ctx);
180
181 if (ctx->qp_p) {
182 mpp_data_deinit(ctx->qp_p);
183 ctx->qp_p = NULL;
184 }
185
186 if (ctx->sse_p) {
187 mpp_data_deinit(ctx->sse_p);
188 ctx->sse_p = NULL;
189 }
190
191 if (ctx->intra) {
192 mpp_data_deinit(ctx->intra);
193 ctx->intra = NULL;
194 }
195
196 if (ctx->inter) {
197 mpp_data_deinit(ctx->inter);
198 ctx->inter = NULL;
199 }
200
201 if (ctx->gop_bits) {
202 mpp_data_deinit(ctx->gop_bits);
203 ctx->gop_bits = NULL;
204 }
205
206 if (ctx->intra_percent) {
207 mpp_data_deinit(ctx->intra_percent);
208 ctx->intra_percent = NULL;
209 }
210
211
212 if (ctx->i_bit != NULL) {
213 mpp_data_deinit_v2(ctx->i_bit);
214 ctx->i_bit = NULL;
215 }
216
217 if (ctx->p_bit != NULL) {
218 mpp_data_deinit_v2(ctx->p_bit);
219 ctx->p_bit = NULL;
220 }
221
222 if (ctx->pre_p_bit != NULL) {
223 mpp_data_deinit_v2(ctx->pre_p_bit);
224 ctx->pre_p_bit = NULL;
225 }
226
227 if (ctx->stat_rate != NULL) {
228 mpp_data_deinit_v2(ctx->stat_rate);
229 ctx->stat_rate = NULL;
230 }
231
232 if (ctx->stat_bits != NULL) {
233 mpp_data_deinit_v2(ctx->stat_bits);
234 ctx->stat_bits = NULL;
235 }
236
237 rc_dbg_func("leave %p\n", ctx);
238 return MPP_OK;
239 }
240
bits_model_smt_init(RcModelV2SmtCtx * ctx)241 MPP_RET bits_model_smt_init(RcModelV2SmtCtx *ctx)
242 {
243 RK_S32 gop_len = ctx->usr_cfg.igop;
244 RcFpsCfg *fps = &ctx->usr_cfg.fps;
245
246 rc_dbg_func("enter %p\n", ctx);
247 ctx->frm_num = 0;
248
249 // smt
250 ctx->frame_cnt_in_gop = 0;
251 ctx->bits_one_gop_use_flag = 0;
252 ctx->gop_min = gop_len;
253
254 ctx->qp_min = 18;
255 ctx->qp_max = 51;
256 ctx->qp_step = 4;
257
258 if (gop_len < fps->fps_out_num)
259 ctx->window_len = fps->fps_out_num;
260 else
261 ctx->window_len = gop_len;
262
263 if (ctx->window_len < 10)
264 ctx->window_len = 10;
265
266 if (ctx->window_len > fps->fps_out_num)
267 ctx->window_len = fps->fps_out_num;
268
269 if (ctx->intra)
270 mpp_data_deinit(ctx->intra);
271 mpp_data_init(&ctx->intra, gop_len);
272
273 if (ctx->inter)
274 mpp_data_deinit(ctx->inter);
275 mpp_data_init(&ctx->inter, fps->fps_out_num); /* need test */
276
277 if (ctx->gop_bits)
278 mpp_data_deinit(ctx->gop_bits);
279 mpp_data_init(&ctx->gop_bits, gop_len);
280
281 if (ctx->intra_percent)
282 mpp_data_deinit(ctx->intra_percent);
283 mpp_data_init(&ctx->intra_percent, gop_len);
284
285 mpp_pid_reset(&ctx->pid_fps);
286 mpp_pid_reset(&ctx->pid_intra_low_rate);
287 mpp_pid_reset(&ctx->pid_intra_high_rate);
288 mpp_pid_reset(&ctx->pid_inter_low_rate);
289 mpp_pid_reset(&ctx->pid_inter_high_rate);
290
291 mpp_pid_set_param(&ctx->pid_fps, 4, 6, 0, 100, ctx->window_len);
292 mpp_pid_set_param(&ctx->pid_intra_low_rate, 4, 6, 0, 100, ctx->window_len);
293 mpp_pid_set_param(&ctx->pid_intra_high_rate, 4, 6, 0, 100, ctx->window_len);
294 mpp_pid_set_param(&ctx->pid_inter_low_rate, 4, 6, 0, 100, ctx->window_len);
295 mpp_pid_set_param(&ctx->pid_inter_high_rate, 4, 6, 0, 100, ctx->window_len);
296
297 ctx->bps_target_low_rate = ctx->usr_cfg.bps_min;
298 ctx->bps_target_high_rate = ctx->usr_cfg.bps_max;
299 ctx->bits_per_pic_low_rate = axb_div_c(ctx->bps_target_low_rate, fps->fps_out_denorm, fps->fps_out_num);
300 ctx->bits_per_pic_high_rate = axb_div_c(ctx->bps_target_high_rate, fps->fps_out_denorm, fps->fps_out_num);
301
302 ctx->acc_intra_bits_in_fps = 0;
303 ctx->acc_inter_bits_in_fps = 0;
304 ctx->acc_total_bits = 0;
305 ctx->acc_intra_count = 0;
306 ctx->acc_inter_count = 0;
307 ctx->last_fps_bits = 0;
308
309 RK_S32 avg_low_rate = ctx->bits_per_pic_low_rate;
310 RK_S32 avg_high_rate = ctx->bits_per_pic_high_rate;
311
312 if (gop_len == 0) {
313 ctx->gop_mode = MPP_GOP_ALL_INTER;
314 ctx->bits_per_inter_low_rate = avg_low_rate;
315 ctx->bits_per_intra_low_rate = avg_low_rate * 10;
316 ctx->bits_per_inter_high_rate = avg_high_rate;
317 ctx->bits_per_intra_high_rate = avg_high_rate * 10;
318 } else if (gop_len == 1) {
319 ctx->gop_mode = MPP_GOP_ALL_INTRA;
320 ctx->bits_per_inter_low_rate = 0;
321 ctx->bits_per_intra_low_rate = avg_low_rate;
322 ctx->bits_per_inter_high_rate = 0;
323 ctx->bits_per_intra_high_rate = avg_high_rate;
324 ctx->intra_to_inter_rate = 0;
325 } else if (gop_len < ctx->window_len) {
326 ctx->gop_mode = MPP_GOP_SMALL;
327 ctx->intra_to_inter_rate = gop_len + 1;
328
329 ctx->bits_per_inter_low_rate = avg_low_rate / 2;
330 ctx->bits_per_intra_low_rate = ctx->bits_per_inter_low_rate * ctx->intra_to_inter_rate;
331 ctx->bits_per_inter_high_rate = avg_high_rate / 2;
332 ctx->bits_per_intra_high_rate = ctx->bits_per_inter_high_rate * ctx->intra_to_inter_rate;
333 } else {
334 ctx->gop_mode = MPP_GOP_LARGE;
335 ctx->intra_to_inter_rate = gop_len + 1;
336
337 ctx->bits_per_intra_low_rate = ctx->bits_per_pic_low_rate * (2.0 * log((float)gop_len));
338 ctx->bits_per_inter_low_rate = ctx->bits_per_pic_low_rate;
339 ctx->bits_per_inter_low_rate -= ctx->bits_per_intra_low_rate / (fps->fps_out_num - 1);
340
341 ctx->bits_per_intra_high_rate = ctx->bits_per_pic_high_rate * (2.0 * log((float)gop_len));
342 ctx->bits_per_inter_high_rate = ctx->bits_per_pic_high_rate;
343 ctx->bits_per_inter_high_rate -= ctx->bits_per_intra_high_rate / (fps->fps_out_num - 1);
344 }
345
346 rc_dbg_func("leave %p\n", ctx);
347 return MPP_OK;
348 }
349
bits_model_update_smt(RcModelV2SmtCtx * ctx,RK_S32 real_bit)350 MPP_RET bits_model_update_smt(RcModelV2SmtCtx *ctx, RK_S32 real_bit)
351 {
352 rc_dbg_func("enter %p\n", ctx);
353 // smt
354 RK_S32 gop_len = ctx->usr_cfg.igop;
355 RcFpsCfg *fps = &ctx->usr_cfg.fps;
356
357 ctx->pre_diff_bit_low_rate = ctx->bits_target_low_rate - real_bit;
358 ctx->pre_diff_bit_high_rate = ctx->bits_target_high_rate - real_bit;
359 ctx->bits_one_gop[ctx->frame_cnt_in_gop % 1000] = real_bit;
360 ctx->frame_cnt_in_gop++;
361
362 if (ctx->frame_cnt_in_gop == gop_len) {
363 ctx->frame_cnt_in_gop = 0;
364 ctx->bits_one_gop_use_flag = 1;
365 ctx->bits_one_gop_sum = 0;
366 RK_S32 i = 0;
367 RK_S32 gop_len_save = gop_len;
368 if (gop_len > 1000) {
369 gop_len_save = 1000;
370 }
371 for (i = 0; i < gop_len_save; i++)
372 ctx->bits_one_gop_sum += ctx->bits_one_gop[i];
373
374 ctx->delta_bits_per_frame = ctx->bps_target_high_rate / (fps->fps_out_num) - ctx->bits_one_gop_sum / gop_len_save;
375 }
376
377 if (ctx->frame_type == INTRA_FRAME) {
378 ctx->acc_intra_count++;
379 ctx->acc_intra_bits_in_fps += real_bit;
380 mpp_data_update(ctx->intra, real_bit);
381 mpp_data_update(ctx->gop_bits, real_bit);
382 mpp_pid_update(&ctx->pid_intra_low_rate, real_bit - ctx->bits_target_low_rate);
383 mpp_pid_update(&ctx->pid_intra_high_rate, real_bit - ctx->bits_target_high_rate);
384 } else {
385 ctx->acc_inter_count++;
386 ctx->acc_inter_bits_in_fps += real_bit;
387 mpp_data_update(ctx->inter, real_bit);
388 mpp_data_update(ctx->gop_bits, real_bit);
389 mpp_pid_update(&ctx->pid_inter_low_rate, real_bit - ctx->bits_target_low_rate);
390 mpp_pid_update(&ctx->pid_inter_high_rate, real_bit - ctx->bits_target_high_rate);
391 }
392
393 ctx->acc_total_count++;
394 ctx->last_fps_bits += real_bit;
395 /* new fps start */
396 if ((ctx->acc_intra_count + ctx->acc_inter_count) % fps->fps_out_num == 0) {
397 RK_S32 bps_target_temp = (ctx->bps_target_low_rate + ctx->bps_target_high_rate) / 2;
398 if (bps_target_temp > (ctx->last_fps_bits * 2 / 3))
399 mpp_pid_update(&ctx->pid_fps, bps_target_temp - ctx->last_fps_bits);
400 else {
401 bps_target_temp = ctx->bps_target_low_rate * 0.4 + ctx->bps_target_high_rate * 0.6;
402 mpp_pid_update(&ctx->pid_fps, bps_target_temp - ctx->last_fps_bits);
403 }
404 ctx->acc_intra_bits_in_fps = 0;
405 ctx->acc_inter_bits_in_fps = 0;
406 ctx->last_fps_bits = 0;
407 }
408
409 /* new frame start */
410 ctx->qp_prev_out = ctx->qp_out;
411
412 rc_dbg_func("leave %p\n", ctx);
413
414 return MPP_OK;
415 }
416
reenc_calc_cbr_ratio_smt(RcModelV2SmtCtx * ctx,EncRcTaskInfo * cfg)417 MPP_RET reenc_calc_cbr_ratio_smt(RcModelV2SmtCtx *ctx, EncRcTaskInfo *cfg)
418 {
419 RK_S32 stat_time = ctx->usr_cfg.stats_time;
420 RK_S32 last_ins_bps = mpp_data_sum_v2(ctx->stat_bits) / stat_time;
421 RK_S32 ins_bps = (last_ins_bps * stat_time - mpp_data_get_pre_val_v2(ctx->stat_bits, -1) + cfg->bit_real) / stat_time;
422 RK_S32 real_bit = cfg->bit_real;
423 RK_S32 target_bit = cfg->bit_target;
424 RK_S32 target_bps = ctx->target_bps;
425 RK_S32 water_level = 0;
426 RK_S32 idx1, idx2;
427 RK_S32 i_flag = 0;
428 RK_S32 bit_diff_ratio, ins_ratio, bps_ratio, wl_ratio;
429
430 rc_dbg_func("enter %p\n", ctx);
431
432 i_flag = (ctx->frame_type == INTRA_FRAME);
433
434 if (real_bit + ctx->stat_watl > ctx->stat_watl_thrd)
435 water_level = ctx->stat_watl_thrd - ctx->bit_per_frame;
436 else
437 water_level = real_bit + ctx->stat_watl_thrd - ctx->bit_per_frame;
438
439 if (water_level < ctx->stat_last_watl) {
440 water_level = ctx->stat_last_watl;
441 }
442
443 if (target_bit > real_bit)
444 bit_diff_ratio = 32 * (real_bit - target_bit) / target_bit;
445 else
446 bit_diff_ratio = 32 * (real_bit - target_bit) / real_bit;
447
448 idx1 = ins_bps / (target_bps >> 5);
449 idx2 = last_ins_bps / (target_bps >> 5);
450
451 idx1 = mpp_clip(idx1, 0, 63);
452 idx2 = mpp_clip(idx2, 0, 63);
453 ins_ratio = tab_lnx[idx1] - tab_lnx[idx2];
454
455 bps_ratio = 96 * (ins_bps - target_bps) / target_bps;
456 wl_ratio = 32 * (water_level - (ctx->water_level_thr >> 3)) / (ctx->water_level_thr >> 3);
457 if (last_ins_bps < ins_bps && target_bps != last_ins_bps) {
458 ins_ratio = 6 * ins_ratio;
459 ins_ratio = mpp_clip(ins_ratio, -192, 256);
460 } else {
461 if (i_flag) {
462 ins_ratio = 3 * ins_ratio;
463 ins_ratio = mpp_clip(ins_ratio, -192, 256);
464 } else {
465 ins_ratio = 0;
466 }
467 }
468 if (bit_diff_ratio >= 256)
469 bit_diff_ratio = 256;
470
471 if (bps_ratio >= 32)
472 bps_ratio = 32;
473
474 if (wl_ratio >= 32)
475 wl_ratio = 32;
476
477 if (bit_diff_ratio < -128)
478 ins_ratio = ins_ratio - 128;
479 else
480 ins_ratio = ins_ratio + bit_diff_ratio;
481
482 if (bps_ratio < -32)
483 ins_ratio = ins_ratio - 32;
484 else
485 ins_ratio = ins_ratio + bps_ratio;
486
487 if (wl_ratio < -32)
488 wl_ratio = ins_ratio - 32;
489 else
490 wl_ratio = ins_ratio + wl_ratio;
491
492 ctx->next_ratio = wl_ratio;
493
494 rc_dbg_func("leave %p\n", ctx);
495 return MPP_OK;
496 }
497
reenc_calc_vbr_ratio_smt(RcModelV2SmtCtx * ctx,EncRcTaskInfo * cfg)498 MPP_RET reenc_calc_vbr_ratio_smt(RcModelV2SmtCtx *ctx, EncRcTaskInfo *cfg)
499 {
500 RK_S32 stat_time = ctx->usr_cfg.stats_time;
501 RK_S32 last_ins_bps = mpp_data_sum_v2(ctx->stat_bits) / stat_time;
502 RK_S32 ins_bps = (last_ins_bps * stat_time - mpp_data_get_pre_val_v2(ctx->stat_bits, -1)
503 + cfg->bit_real) / stat_time;
504 RK_S32 bps_change = ctx->target_bps;
505 RK_S32 max_bps_target = ctx->usr_cfg.bps_max;
506 RK_S32 real_bit = cfg->bit_real;
507 RK_S32 target_bit = cfg->bit_target;
508 RK_S32 idx1, idx2;
509 RK_S32 bit_diff_ratio, ins_ratio, bps_ratio;
510
511 rc_dbg_func("enter %p\n", ctx);
512
513 if (target_bit <= real_bit)
514 bit_diff_ratio = 32 * (real_bit - target_bit) / target_bit;
515 else
516 bit_diff_ratio = 32 * (real_bit - target_bit) / real_bit;
517
518 idx1 = ins_bps / (max_bps_target >> 5);
519 idx2 = last_ins_bps / (max_bps_target >> 5);
520 idx1 = mpp_clip(idx1, 0, 63);
521 idx2 = mpp_clip(idx2, 0, 63);
522 if (last_ins_bps < ins_bps && bps_change < ins_bps) {
523 ins_ratio = 6 * (tab_lnx[idx1] - tab_lnx[idx2]);
524 ins_ratio = mpp_clip(ins_ratio, -192, 256);
525 } else {
526 ins_ratio = 0;
527 }
528
529 bps_ratio = 96 * (ins_bps - bps_change) / bps_change;
530
531 if (bit_diff_ratio >= 256)
532 bit_diff_ratio = 256;
533 if (bps_ratio >= 32)
534 bps_ratio = 32;
535
536 if (bit_diff_ratio < -128)
537 ins_ratio = ins_ratio - 128;
538 else
539 ins_ratio = bit_diff_ratio + ins_ratio;
540
541 if (bps_ratio < -32)
542 ins_ratio = ins_ratio - 32;
543 else
544 ins_ratio = ins_ratio + bps_ratio;
545
546 ctx->next_ratio = ins_ratio;
547 rc_dbg_func("leave %p\n", ctx);
548 return MPP_OK;
549 }
550
check_re_enc_smt(RcModelV2SmtCtx * ctx,EncRcTaskInfo * cfg)551 MPP_RET check_re_enc_smt(RcModelV2SmtCtx *ctx, EncRcTaskInfo *cfg)
552 {
553 return MPP_OK;
554
555 RK_S32 frame_type = ctx->frame_type;
556 RK_S32 i_flag = 0;
557 RK_S32 big_flag = 0;
558 RK_S32 stat_time = ctx->usr_cfg.stats_time;
559 RK_S32 last_ins_bps = mpp_data_sum_v2(ctx->stat_bits) / stat_time;
560 RK_S32 ins_bps = (last_ins_bps * stat_time - mpp_data_get_pre_val_v2(ctx->stat_bits, -1)
561 + cfg->bit_real) / stat_time;
562 RK_S32 target_bps;
563 RK_S32 flag1 = 0;
564 RK_S32 flag2 = 0;
565
566 rc_dbg_func("enter %p\n", ctx);
567
568 if (ctx->usr_cfg.mode == RC_CBR)
569 target_bps = ctx->usr_cfg.bps_target;
570 else
571 target_bps = ctx->usr_cfg.bps_max;
572
573 if (ctx->reenc_cnt >= ctx->usr_cfg.max_reencode_times) {
574 return MPP_OK;
575 }
576
577 i_flag = (frame_type == INTRA_FRAME);
578 if (!i_flag && cfg->bit_real > 3 * cfg->bit_target) {
579 big_flag = 1;
580 }
581
582 if (i_flag && cfg->bit_real > 3 * cfg->bit_target / 2) {
583 big_flag = 1;
584 }
585
586 if (ctx->usr_cfg.mode == RC_CBR) {
587 flag1 = target_bps / 20 < ins_bps - last_ins_bps;
588 if (target_bps + target_bps / 10 < ins_bps ||
589 target_bps - target_bps / 10 > ins_bps) {
590 flag2 = 1;
591 }
592 } else {
593 flag1 = target_bps - (target_bps >> 3) < ins_bps;
594 flag2 = target_bps / 20 < ins_bps - last_ins_bps;
595 }
596
597 if (!(big_flag && flag1 && flag2)) {
598 return MPP_OK;
599 }
600
601 rc_dbg_func("leave %p\n", ctx);
602 return MPP_OK;
603 }
604
605
rc_model_v2_smt_h265_init(void * ctx,RcCfg * cfg)606 MPP_RET rc_model_v2_smt_h265_init(void *ctx, RcCfg *cfg)
607 {
608 RcModelV2SmtCtx *p = (RcModelV2SmtCtx*)ctx;
609
610 rc_dbg_func("enter %p\n", ctx);
611
612 p->codec_type = 1;
613 memcpy(&p->usr_cfg, cfg, sizeof(RcCfg));
614 bits_model_smt_init(p);
615
616 rc_dbg_func("leave %p\n", ctx);
617 return MPP_OK;
618 }
619
rc_model_v2_smt_h264_init(void * ctx,RcCfg * cfg)620 MPP_RET rc_model_v2_smt_h264_init(void *ctx, RcCfg *cfg)
621 {
622 RcModelV2SmtCtx *p = (RcModelV2SmtCtx*)ctx;
623
624 rc_dbg_func("enter %p\n", ctx);
625
626 p->codec_type = 0;
627 memcpy(&p->usr_cfg, cfg, sizeof(RcCfg));
628 bits_model_smt_init(p);
629
630 rc_dbg_func("leave %p\n", ctx);
631 return MPP_OK;
632 }
633
634
rc_model_v2_smt_deinit(void * ctx)635 MPP_RET rc_model_v2_smt_deinit(void *ctx)
636 {
637 RcModelV2SmtCtx *p = (RcModelV2SmtCtx *)ctx;
638 rc_dbg_func("enter %p\n", ctx);
639 bits_model_smt_deinit(p);
640 rc_dbg_func("leave %p\n", ctx);
641 return MPP_OK;
642 }
643
rc_model_v2_smt_start(void * ctx,EncRcTask * task)644 MPP_RET rc_model_v2_smt_start(void *ctx, EncRcTask *task)
645 {
646 RcModelV2SmtCtx *p = (RcModelV2SmtCtx*)ctx;
647 EncFrmStatus *frm = &task->frm;
648 EncRcTaskInfo *info = &task->info;
649 RcFpsCfg *fps = &p->usr_cfg.fps;
650 RK_U32 md_ctu_cnt = 0;
651 void *ptr = NULL;
652
653 if (frm->reencode)
654 return MPP_OK;
655
656 if (mpp_frame_has_meta(task->frame)) {
657 MppMeta meta = mpp_frame_get_meta(task->frame);
658
659 mpp_meta_get_ptr(meta, KEY_MV_LIST, &ptr);
660 }
661
662 md_ctu_cnt = cal_mv_info(ptr);
663
664 if (frm->is_intra) {
665 p->frame_type = INTRA_FRAME;
666 p->acc_total_count = 0;
667 p->acc_intra_bits_in_fps = 0;
668 } else {
669 p->frame_type = INTER_P_FRAME;
670 }
671
672 switch (p->gop_mode) {
673 case MPP_GOP_ALL_INTER : {
674 if (p->frame_type == INTRA_FRAME) {
675 p->bits_target_low_rate = p->bits_per_intra_low_rate;
676 p->bits_target_high_rate = p->bits_per_intra_high_rate;
677 } else {
678 p->bits_target_low_rate = p->bits_per_inter_low_rate
679 - mpp_pid_calc(&p->pid_inter_low_rate);
680 p->bits_target_high_rate = p->bits_per_inter_high_rate
681 - mpp_pid_calc(&p->pid_inter_high_rate);
682 }
683 } break;
684 case MPP_GOP_ALL_INTRA : {
685 p->bits_target_low_rate = p->bits_per_intra_low_rate
686 - mpp_pid_calc(&p->pid_intra_low_rate);
687 p->bits_target_high_rate = p->bits_per_intra_high_rate
688 - mpp_pid_calc(&p->pid_intra_high_rate);
689 } break;
690 default : {
691 if (p->frame_type == INTRA_FRAME) {
692 //float intra_percent = 0.0;
693 RK_S32 diff_bit = mpp_pid_calc(&p->pid_fps);
694 /* only affected by last gop */
695 p->pre_gop_left_bit = p->pid_fps.i - diff_bit;
696
697 mpp_pid_reset(&p->pid_fps);
698
699 if (p->acc_intra_count) {
700 p->bits_target_low_rate = (p->bits_per_intra_low_rate + diff_bit);
701 p->bits_target_high_rate = (p->bits_per_intra_high_rate + diff_bit);
702 } else {
703 p->bits_target_low_rate = p->bits_per_intra_low_rate
704 - mpp_pid_calc(&p->pid_intra_low_rate);
705 p->bits_target_high_rate = p->bits_per_intra_high_rate
706 - mpp_pid_calc(&p->pid_intra_high_rate);
707 }
708 } else {
709 if (p->last_frame_type == INTRA_FRAME) {
710 RK_S32 diff_bit = mpp_pid_calc(&p->pid_fps);
711 /*
712 * case - inter frame after intra frame
713 * update inter target bits with compensation of previous intra frame
714 */
715 RK_S32 bits_prev_intra = mpp_data_avg(p->intra, 1, 1, 1);
716
717 p->bits_per_inter_low_rate = (p->bps_target_low_rate *
718 (p->gop_min * 1.0 / fps->fps_out_num) -
719 bits_prev_intra + diff_bit + p->pre_gop_left_bit) /
720 (p->gop_min - 1);
721 p->bits_target_low_rate = p->bits_per_inter_low_rate;
722 p->bits_per_inter_high_rate = (p->bps_target_high_rate *
723 (p->gop_min * 1.0 / fps->fps_out_num) -
724 bits_prev_intra + diff_bit + p->pre_gop_left_bit) /
725 (p->gop_min - 1);
726 p->bits_target_high_rate = p->bits_per_inter_high_rate;
727 } else {
728 RK_S32 diff_bit_low_rate = mpp_pid_calc(&p->pid_inter_low_rate);
729 p->bits_target_low_rate = p->bits_per_inter_low_rate - diff_bit_low_rate;
730 if (p->bits_target_low_rate > p->bits_per_pic_low_rate * 2) {
731 p->bits_target_low_rate = 2 * p->bits_per_pic_low_rate;
732 p->pid_inter_low_rate.i = p->pid_inter_low_rate.i / 2;
733 }
734 RK_S32 diff_bit_high_rate = mpp_pid_calc(&p->pid_inter_high_rate);
735 p->bits_target_high_rate = p->bits_per_inter_high_rate - diff_bit_high_rate;
736
737 if (p->bits_target_high_rate > p->bits_per_pic_high_rate * 2) {
738 p->bits_target_high_rate = 2 * p->bits_per_pic_high_rate;
739 p->pid_inter_high_rate.i = p->pid_inter_high_rate.i / 2;
740 }
741 }
742
743 }
744 } break;
745
746 }
747
748 if (NULL == p->qp_p)
749 mpp_data_init(&p->qp_p, MPP_MIN(p->gop_min, 15));
750 if (NULL == p->sse_p)
751 mpp_data_init(&p->sse_p, MPP_MIN(p->gop_min, 15));
752
753 RK_S32 madi = p->hal_cfg.madi;
754
755 if (p->frm_num == 0) {
756 RK_S32 bits_target_use = 0;
757 bits_target_use = (p->bits_target_high_rate - p->bits_target_low_rate) * 1 * 0.5
758 + p->bits_target_low_rate;
759 p->bits_target_use = bits_target_use;
760 bits_target_use = bits_target_use * ((1920 * 1080 * 1000)
761 / (p->usr_cfg.width * p->usr_cfg.height)) / 1000;
762 p->qp_out = 95 - 10.0 * log((float)(bits_target_use / 1000));
763
764 if (p->qp_out < 27) {
765 p->qp_out = 27;
766 }
767 p->qp_out = mpp_clip(p->qp_out, p->qp_min, p->qp_max);
768 p->qp_preavg = 0;
769 }
770
771 if (p->frame_type == INTRA_FRAME) {
772 if (p->frm_num > 0) {
773 p->qp_out = mpp_data_avg(p->qp_p, -1, 1, 1) - 3;
774 RK_S32 sse = mpp_data_avg(p->sse_p, 1, 1, 1) + 1;
775 RK_S32 bit_target_use = (p->bits_target_low_rate + p->bits_target_high_rate) / 2;
776 RK_S32 qp_add = 0;
777
778 if (bit_target_use < 100)
779 bit_target_use = 100;
780
781 if (sse < p->intra_presse) {
782 if (bit_target_use <= p->intra_prerealbit) {
783 p->qp_out = p->intra_preqp;
784 } else {
785 if (madi >= MAD_THDI) {
786 p->qp_out = p->intra_preqp - 1;
787 } else {
788 if (p->intra_preqp - p->qp_out >= 4) {
789 p->qp_out = p->intra_preqp - (madi <= 12 ? 4 : 3);
790 }
791 }
792 }
793 } else if (sse > p->intra_presse && p->qp_out < p->intra_preqp) {
794 if (p->intra_preqp - p->qp_out >= 3)
795 p->qp_out = p->intra_preqp - 2;
796 } else {
797 RK_S32 ratio = (RK_S32)((float)sse / (float)p->intra_presse + 0.5);
798 if (ratio <= 2) {
799 p->qp_out = p->intra_preqp;
800 } else if (ratio <= 4) {
801 p->qp_out = mpp_clip(p->qp_out, p->intra_preqp - 1, p->intra_preqp + 1);
802 } else {
803 p->qp_out = mpp_clip(p->qp_out, p->intra_preqp - 2, p->intra_preqp + 2);
804 }
805 }
806 if (p->qp_prev_out < 25) {
807 qp_add = 4;
808 } else if (p->qp_prev_out < 27) {
809 qp_add = 2;
810 } else if (p->qp_prev_out < 29) {
811 qp_add = 1;
812 }
813 p->qp_out = mpp_clip(p->qp_out, p->qp_prev_out - 4, p->qp_prev_out + qp_add);
814
815 p->bits_target_use = (p->bits_target_low_rate + p->bits_target_high_rate) / 2;
816 if (p->bits_target_use < 100)
817 p->bits_target_use = 100;
818 }
819 } else {
820 p->bits_target_use = (p->bits_target_low_rate + p->bits_target_high_rate) / 2;
821 p->qp_out = p->qp_preavg;
822
823 if (p->last_frame_type == INTRA_FRAME) {
824 RK_S32 qp_add = 0;
825 if (p->qp_prev_out < 25) {
826 qp_add = 2;
827 } else if (p->qp_prev_out < 29) {
828 qp_add = 1;
829 }
830 p->qp_out = mpp_clip(p->qp_out, p->qp_prev_out + qp_add, p->qp_prev_out + 4 + qp_add);
831 p->bits_target_use = (p->bits_target_low_rate + p->bits_target_high_rate) / 2;
832 if (p->bits_target_use < 100)
833 p->bits_target_use = 100;
834 } else {
835 MppFrame frame = task->frame;
836 RK_S32 width = mpp_frame_get_width(frame);
837 RK_S32 height = mpp_frame_get_height(frame);
838 float coef = (float)md_ctu_cnt / (MPP_ALIGN(width, 16) / 16 * MPP_ALIGN(height, 16) / 16);
839 float coef2 = 0.5;
840
841 if (coef >= 0.7)
842 coef2 = 1.0;
843 else if (coef >= 0.3) // 0.7~0.3 --> 1.0~0.5
844 coef2 = 0.5 + (coef - 0.3) * (1.0 - 0.5) / (0.7 - 0.3);
845 else // 0.3~0.0 --> 0.5~0.0
846 coef2 = 0.0 + coef * (0.5 - 0.0) / (0.3 - 0.0);
847
848 RK_S32 bits_target_use = p->bits_target_low_rate; // bits_target_high_rate
849 RK_S32 pre_diff_bit_use = p->pre_diff_bit_low_rate; // pre_diff_bit_high_rate
850
851 bits_target_use = (p->bits_target_high_rate - p->bits_target_low_rate) * 1 * coef2
852 + p->bits_target_low_rate;
853 pre_diff_bit_use = (p->pre_diff_bit_high_rate - p->pre_diff_bit_low_rate) * 1 * coef2
854 + p->pre_diff_bit_low_rate;
855
856 if (bits_target_use < 100)
857 bits_target_use = 100;
858
859 p->bits_target_use = bits_target_use;
860 if (abs(pre_diff_bit_use) <= bits_target_use * 3 / 100) {
861 p->qp_out = p->qp_prev_out - 1;
862 } else if (pre_diff_bit_use > bits_target_use * 3 / 100) {
863 if (pre_diff_bit_use >= bits_target_use) {
864 p->qp_out = (p->qp_out >= 30 && madi < MAD_THDI) ? p->qp_prev_out - 4 : p->qp_prev_out - 3;
865 } else if (pre_diff_bit_use >= bits_target_use * 1 / 4) {
866 p->qp_out = (p->qp_out >= 30 && madi < MAD_THDI) ? p->qp_prev_out - 3 : p->qp_prev_out - 2;
867 } else if (pre_diff_bit_use > bits_target_use * 1 / 10) {
868 p->qp_out = (madi < MAD_THDI) ? p->qp_prev_out - 2 : p->qp_prev_out - 1;
869 } else {
870 p->qp_out = p->qp_prev_out - 1;
871 }
872 } else {
873 pre_diff_bit_use = abs(pre_diff_bit_use);
874 RK_S32 weight = (madi < MAD_THDI ? 1 : 3);
875 if (pre_diff_bit_use >= 2 * weight * bits_target_use) {
876 p->qp_out = p->qp_prev_out + 3 ;
877 } else if (pre_diff_bit_use >= bits_target_use * 2 * weight / 3) {
878 p->qp_out = p->qp_prev_out + 2 ;
879 } else if (pre_diff_bit_use > bits_target_use * weight / 5) {
880 p->qp_out = p->qp_prev_out + 1;
881 } else {
882 p->qp_out = p->qp_prev_out;
883 }
884 }
885
886 p->qp_out = mpp_clip(p->qp_out, p->qp_min, p->qp_max);
887
888 pre_diff_bit_use = (p->pre_diff_bit_high_rate - p->pre_diff_bit_low_rate) * 1 * coef2 + p->pre_diff_bit_low_rate;
889 RK_S32 low_pre_diff_bit_use = LOW_PRE_DIFF_BIT_USE;
890 low_pre_diff_bit_use = (p->bps_target_low_rate + p->bps_target_high_rate) / 2 / fps->fps_out_num;
891 low_pre_diff_bit_use = -low_pre_diff_bit_use / 5;
892
893 RK_S32 frame_low_qp;
894
895 if (p->codec_type == 1) {
896 if (madi >= MAD_THDI)
897 frame_low_qp = LOW_QP_level1;
898 else
899 frame_low_qp = LOW_QP_level0;
900 } else {
901 frame_low_qp = LOW_QP;
902 }
903
904 if (p->qp_out > frame_low_qp) {
905 if (pre_diff_bit_use <= 2 * low_pre_diff_bit_use)
906 coef2 += 0.5;
907 else if (pre_diff_bit_use <= low_pre_diff_bit_use)
908 coef2 += 0.2;
909 else
910 coef2 += 0.1;
911
912 if (coef2 >= 1.0)
913 coef2 = 1.0;
914
915 if (p->qp_out > LOW_LOW_QP)
916 coef2 = 1.0;
917
918 if (coef2 == 1.0 && p->qp_prev_out > frame_low_qp) {
919 float delta_coef = 0;
920 if (p->bits_one_gop_use_flag == 1 && p->delta_bits_per_frame > 0) {
921 delta_coef = ((float)p->delta_bits_per_frame) / ((float)p->bits_per_inter_high_rate - p->bits_per_inter_low_rate);
922
923 if (delta_coef >= 0.5)
924 delta_coef = 0.5;
925 else if (delta_coef >= 0.3)
926 delta_coef = 0.3;
927
928 if (p->qp_prev_out > (frame_low_qp + 1))
929 delta_coef += 0.1;
930
931 coef2 += delta_coef;
932 }
933 }
934
935 bits_target_use = (p->bits_target_high_rate - p->bits_target_low_rate) * 1 * coef2 + p->bits_target_low_rate;
936 pre_diff_bit_use = (p->pre_diff_bit_high_rate - p->pre_diff_bit_low_rate) * 1 * coef2 + p->pre_diff_bit_low_rate;
937 if (bits_target_use < 100)
938 bits_target_use = 100;
939
940 p->bits_target_use = bits_target_use;
941 if (abs(pre_diff_bit_use) <= bits_target_use * 3 / 100) {
942 p->qp_out = p->qp_prev_out ;
943 } else if (pre_diff_bit_use > bits_target_use * 3 / 100) {
944 if (pre_diff_bit_use >= bits_target_use) {
945 p->qp_out = (p->qp_out >= 30 && madi < MAD_THDI) ? p->qp_prev_out - 3 : p->qp_prev_out - 2;
946 } else if (pre_diff_bit_use >= bits_target_use * 1 / 4) {
947 p->qp_out = (p->qp_out >= 30 && madi < MAD_THDI) ? p->qp_prev_out - 2 : p->qp_prev_out - 1;
948 } else if (pre_diff_bit_use > bits_target_use * 1 / 10) {
949 p->qp_out = (madi < MAD_THDI) ? p->qp_prev_out - 1 : p->qp_prev_out;
950 } else {
951 p->qp_out = p->qp_prev_out;
952 }
953 } else {
954 pre_diff_bit_use = abs(pre_diff_bit_use);
955 RK_S32 weight = (madi < MAD_THDI ? 0 : 2);
956 if (pre_diff_bit_use >= 2 * weight * bits_target_use) {
957 p->qp_out = p->qp_prev_out + 1 ;
958 } else if (pre_diff_bit_use >= bits_target_use * 2 * weight / 3) {
959 p->qp_out = p->qp_prev_out + 1 ;
960 } else if (pre_diff_bit_use > bits_target_use * weight / 5) {
961 p->qp_out = p->qp_prev_out;
962 } else {
963 p->qp_out = p->qp_prev_out;
964 }
965 }
966
967 p->qp_out = mpp_clip(p->qp_out, p->qp_min, p->qp_max);
968 }
969
970 if (p->qp_out < LIMIT_QP_MORE_MOVE && coef >= 0.2)
971 p->qp_out = LIMIT_QP_MORE_MOVE;
972 }
973 }
974
975 if (p->frm_num >= 1) {
976 p->qp_out = mpp_clip(p->qp_out, p->qp_prev_out - 3, p->qp_prev_out + p->qp_step);
977 }
978
979 info->bit_target = p->bits_target_use;
980 info->quality_target = p->qp_out;
981 info->quality_max = p->usr_cfg.max_quality;
982 info->quality_min = p->usr_cfg.min_quality;
983 p->frm_num++;
984 p->reenc_cnt = 0;
985 rc_dbg_func("leave %p\n", ctx);
986 return MPP_OK;
987 }
988
rc_model_v2_smt_check_reenc(void * ctx,EncRcTask * task)989 MPP_RET rc_model_v2_smt_check_reenc(void *ctx, EncRcTask *task)
990 {
991 RcModelV2SmtCtx *p = (RcModelV2SmtCtx *)ctx;
992 EncRcTaskInfo *cfg = (EncRcTaskInfo *)&task->info;
993 EncFrmStatus *frm = &task->frm;
994 RcCfg *usr_cfg = &p->usr_cfg;
995
996 rc_dbg_func("enter ctx %p cfg %p\n", ctx, cfg);
997
998 frm->reencode = 0;
999
1000 if ((usr_cfg->mode == RC_FIXQP) ||
1001 (task->force.force_flag & ENC_RC_FORCE_QP))
1002 return MPP_OK;
1003
1004 if (check_re_enc_smt(p, cfg)) {
1005 if (p->usr_cfg.mode == RC_CBR) {
1006 reenc_calc_cbr_ratio_smt(p, cfg);
1007 } else {
1008 reenc_calc_vbr_ratio_smt(p, cfg);
1009 }
1010 if (p->next_ratio != 0 && cfg->quality_target < cfg->quality_max) {
1011 p->reenc_cnt++;
1012 frm->reencode = 1;
1013 }
1014 }
1015 rc_dbg_func("leave %p\n", ctx);
1016 return MPP_OK;
1017 }
1018
rc_model_v2_smt_end(void * ctx,EncRcTask * task)1019 MPP_RET rc_model_v2_smt_end(void *ctx, EncRcTask *task)
1020 {
1021 RcModelV2SmtCtx *p = (RcModelV2SmtCtx *)ctx;
1022 EncRcTaskInfo *cfg = (EncRcTaskInfo *)&task->info;
1023 MppFrame frame = task->frame;
1024 RK_S32 width = mpp_frame_get_width(frame);
1025 RK_S32 height = mpp_frame_get_height(frame);
1026 RK_S32 bit_real = cfg->bit_real;
1027 RK_S32 madi = cfg->madi;
1028 RK_S32 cu64_num = (MPP_ALIGN(width, 64) / 64 * MPP_ALIGN(height, 64) / 64) ;
1029 RK_U64 sse_dat = cfg->madp * cu64_num;
1030 RK_U32 qp_sum;
1031 double avg_qp = 0.0;
1032 RK_S32 avg_sse = 1;
1033
1034 rc_dbg_func("enter ctx %p cfg %p\n", ctx, cfg);
1035
1036 if (p->codec_type == 1)
1037 qp_sum = cfg->quality_real / 64; // 265
1038 else
1039 qp_sum = cfg->quality_real / 16; // 264
1040
1041 avg_qp = qp_sum;
1042 avg_sse = (RK_S32)sqrt((double)(sse_dat));
1043 p->qp_preavg = (RK_S32)(avg_qp + 0.5);
1044 if (p->frame_type == INTER_P_FRAME) {
1045 if (madi >= MAD_THDI) {
1046 avg_qp = p->qp_out;
1047 }
1048 }
1049
1050 if (p->frame_type == INTER_P_FRAME || p->gop_mode == MPP_GOP_ALL_INTRA) {
1051 mpp_data_update(p->qp_p, avg_qp);
1052 mpp_data_update(p->sse_p, avg_sse);
1053 } else {
1054 p->intra_preqp = p->qp_out;
1055 p->intra_presse = avg_sse;
1056 p->intra_premadi = madi;
1057 p->intra_prerealbit = bit_real;
1058 }
1059
1060 p->st_madi = cfg->madi;
1061 rc_dbg_rc("bits_mode_update real_bit %d", bit_real);
1062 bits_model_update_smt(p, bit_real);
1063 p->pre_target_bits = cfg->bit_target;
1064 p->pre_real_bits = bit_real;
1065 p->qp_prev_out = p->qp_out;
1066 p->last_inst_bps = p->ins_bps;
1067 p->last_frame_type = p->frame_type;
1068
1069 rc_dbg_func("leave %p\n", ctx);
1070 return MPP_OK;
1071 }
1072
1073
rc_model_v2_smt_hal_start(void * ctx,EncRcTask * task)1074 MPP_RET rc_model_v2_smt_hal_start(void *ctx, EncRcTask *task)
1075 {
1076 rc_dbg_func("smt_hal_start enter ctx %p task %p\n", ctx, task);
1077 return MPP_OK;
1078 }
1079
rc_model_v2_smt_hal_end(void * ctx,EncRcTask * task)1080 MPP_RET rc_model_v2_smt_hal_end(void *ctx, EncRcTask *task)
1081 {
1082 rc_dbg_func("smt_hal_end enter ctx %p task %p\n", ctx, task);
1083 rc_dbg_func("leave %p\n", ctx);
1084 return MPP_OK;
1085 }
1086
1087
1088 const RcImplApi smt_h264e = {
1089 "smart",
1090 MPP_VIDEO_CodingAVC,
1091 sizeof(RcModelV2SmtCtx),
1092 rc_model_v2_smt_h264_init,
1093 rc_model_v2_smt_deinit,
1094 NULL,
1095 rc_model_v2_smt_check_reenc,
1096 rc_model_v2_smt_start,
1097 rc_model_v2_smt_end,
1098 rc_model_v2_smt_hal_start,
1099 rc_model_v2_smt_hal_end,
1100 };
1101
1102 const RcImplApi smt_h265e = {
1103 "smart",
1104 MPP_VIDEO_CodingHEVC,
1105 sizeof(RcModelV2SmtCtx),
1106 rc_model_v2_smt_h265_init,
1107 rc_model_v2_smt_deinit,
1108 NULL,
1109 rc_model_v2_smt_check_reenc,
1110 rc_model_v2_smt_start,
1111 rc_model_v2_smt_end,
1112 rc_model_v2_smt_hal_start,
1113 rc_model_v2_smt_hal_end,
1114 };
1115