xref: /rk3399_ARM-atf/lib/el3_runtime/simd_ctx.c (revision 6acdf7b709d59543cfb06d7cfb75b402b7b195d2)
1 /*
2  * Copyright (c) 2024-2026, Arm Limited and Contributors. All rights reserved.
3  * Copyright (c) 2022, Google LLC. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include <stdint.h>
9 
10 #include <arch_helpers.h>
11 #include <common/debug.h>
12 #include <lib/el3_runtime/aarch64/context.h>
13 #include <lib/el3_runtime/context_mgmt.h>
14 #include <lib/el3_runtime/cpu_data.h>
15 #include <lib/el3_runtime/simd_ctx.h>
16 #include <lib/extensions/sve.h>
17 #include <plat/common/platform.h>
18 
19 #if CTX_INCLUDE_FPREGS || CTX_INCLUDE_SVE_REGS
20 
21 /* SIMD context managed for Secure and Normal Worlds. */
22 #define SIMD_CTXT_COUNT	2
23 
24 #if SEPARATE_SIMD_SECTION
25 __section(".simd_context")
26 #else
27 __section(".bss.simd_context")
28 #endif
29 static simd_regs_t simd_context[SIMD_CTXT_COUNT][PLATFORM_CORE_COUNT];
30 
simd_ctx_save(uint32_t security_state,bool hint_sve)31 void simd_ctx_save(uint32_t security_state, bool hint_sve)
32 {
33 	simd_regs_t *regs;
34 
35 	if (security_state != NON_SECURE && security_state != SECURE) {
36 		ERROR("Unsupported security state specified for SIMD context: %u\n",
37 		      security_state);
38 		panic();
39 	}
40 
41 	regs = &simd_context[security_state][plat_my_core_pos()];
42 
43 	disable_fpregs_traps_el3();
44 #if CTX_INCLUDE_SVE_REGS
45 	regs->hint = hint_sve;
46 
47 	if (hint_sve) {
48 		/*
49 		 * Hint bit denoting absence of SVE live state. Hence, only
50 		 * save FP context.
51 		 */
52 		fpregs_context_save(regs);
53 	} else {
54 		sve_context_save(regs);
55 	}
56 #elif CTX_INCLUDE_FPREGS
57 	fpregs_context_save(regs);
58 #endif
59 	enable_fpregs_traps_el3();
60 }
61 
simd_ctx_restore(uint32_t security_state)62 void simd_ctx_restore(uint32_t security_state)
63 {
64 	simd_regs_t *regs;
65 
66 	if (security_state != NON_SECURE && security_state != SECURE) {
67 		ERROR("Unsupported security state specified for SIMD context: %u\n",
68 		      security_state);
69 		panic();
70 	}
71 
72 	regs = &simd_context[security_state][plat_my_core_pos()];
73 
74 	disable_fpregs_traps_el3();
75 #if CTX_INCLUDE_SVE_REGS
76 	if (regs->hint) {
77 		fpregs_context_restore(regs);
78 	} else {
79 		sve_context_restore(regs);
80 	}
81 #elif CTX_INCLUDE_FPREGS
82 	fpregs_context_restore(regs);
83 #endif
84 	enable_fpregs_traps_el3();
85 }
86 #endif /* CTX_INCLUDE_FPREGS || CTX_INCLUDE_SVE_REGS */
87