1 /* 2 * Copyright 2020 Rockchip Electronics Co. LTD 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef __MPP_DEVICE_H__ 18 #define __MPP_DEVICE_H__ 19 20 #include "mpp_err.h" 21 #include "mpp_dev_defs.h" 22 #include "mpp_callback.h" 23 24 typedef enum MppDevIoctlCmd_e { 25 /* device batch mode config */ 26 MPP_DEV_BATCH_ON, 27 MPP_DEV_BATCH_OFF, 28 MPP_DEV_DELIMIT, 29 MPP_DEV_SET_CB_CTX, 30 31 /* hardware operation setup config */ 32 MPP_DEV_REG_WR, 33 MPP_DEV_REG_RD, 34 MPP_DEV_REG_OFFSET, 35 MPP_DEV_REG_OFFS, 36 MPP_DEV_RCB_INFO, 37 MPP_DEV_SET_INFO, 38 MPP_DEV_SET_ERR_REF_HACK, 39 40 MPP_DEV_CMD_SEND, 41 MPP_DEV_CMD_POLL, 42 43 MPP_DEV_IOCTL_CMD_BUTT, 44 } MppDevIoctlCmd; 45 46 /* for MPP_DEV_REG_WR */ 47 typedef struct MppDevRegWrCfg_t { 48 void *reg; 49 RK_U32 size; 50 RK_U32 offset; 51 } MppDevRegWrCfg; 52 53 /* for MPP_DEV_REG_RD */ 54 typedef struct MppDevRegRdCfg_t { 55 void *reg; 56 RK_U32 size; 57 RK_U32 offset; 58 } MppDevRegRdCfg; 59 60 /* for MPP_DEV_REG_OFFSET */ 61 typedef struct MppDevRegOffsetCfg_t { 62 RK_U32 reg_idx; 63 RK_U32 offset; 64 } MppDevRegOffsetCfg; 65 66 /* for multi MPP_DEV_REG_OFFSET */ 67 typedef struct MppDevRegOffsCfg_t { 68 RK_S32 size; 69 RK_S32 count; 70 MppDevRegOffsetCfg cfgs[]; 71 } MppDevRegOffCfgs; 72 73 /* for MPP_DEV_RCB_INFO */ 74 typedef struct MppDevRcbInfoCfg_t { 75 RK_U32 reg_idx; 76 RK_U32 size; 77 } MppDevRcbInfoCfg; 78 79 /* for MPP_DEV_SET_INFO */ 80 typedef struct MppDevSetInfoCfg_t { 81 RK_U32 type; 82 RK_U32 flag; 83 RK_U64 data; 84 } MppDevInfoCfg; 85 86 typedef union MppDevPollEncSliceInfo_u { 87 RK_U32 val; 88 struct { 89 RK_U32 length : 31; 90 RK_U32 last : 1; 91 }; 92 } MppDevPollEncSliceInfo; 93 94 /* for MPP_DEV_POLL */ 95 typedef struct MppDevPollCfg_t { 96 RK_S32 poll_type; 97 RK_S32 poll_ret; 98 RK_S32 count_max; 99 RK_S32 count_ret; 100 MppDevPollEncSliceInfo slice_info[]; 101 } MppDevPollCfg; 102 103 typedef struct MppDevApi_t { 104 const char *name; 105 RK_U32 ctx_size; 106 MPP_RET (*init)(void *ctx, MppClientType type); 107 MPP_RET (*deinit)(void *ctx); 108 109 /* bat mode function */ 110 MPP_RET (*attach)(void *ctx); 111 MPP_RET (*detach)(void *ctx); 112 MPP_RET (*delimit)(void *ctx); 113 MPP_RET (*set_cb_ctx)(void *ctx, MppCbCtx *cb); 114 115 /* config the cmd on preparing */ 116 MPP_RET (*reg_wr)(void *ctx, MppDevRegWrCfg *cfg); 117 MPP_RET (*reg_rd)(void *ctx, MppDevRegRdCfg *cfg); 118 MPP_RET (*reg_offset)(void *ctx, MppDevRegOffsetCfg *cfg); 119 MPP_RET (*reg_offs)(void *ctx, MppDevRegOffCfgs *cfg); 120 MPP_RET (*rcb_info)(void *ctx, MppDevRcbInfoCfg *cfg); 121 MPP_RET (*set_info)(void *ctx, MppDevInfoCfg *cfg); 122 MPP_RET (*set_err_ref_hack)(void *ctx, RK_U32 *enable); 123 124 /* send cmd to hardware */ 125 MPP_RET (*cmd_send)(void *ctx); 126 127 /* poll cmd from hardware */ 128 MPP_RET (*cmd_poll)(void *ctx, MppDevPollCfg *cfg); 129 } MppDevApi; 130 131 typedef void* MppDev; 132 133 #ifdef __cplusplus 134 extern "C" { 135 #endif 136 137 MPP_RET mpp_dev_init(MppDev *ctx, MppClientType type); 138 MPP_RET mpp_dev_deinit(MppDev ctx); 139 140 MPP_RET mpp_dev_ioctl(MppDev ctx, RK_S32 cmd, void *param); 141 142 /* special helper function for large address offset config */ 143 MPP_RET mpp_dev_set_reg_offset(MppDev dev, RK_S32 index, RK_U32 offset); 144 145 /* register offset multi config */ 146 MPP_RET mpp_dev_multi_offset_init(MppDevRegOffCfgs **cfgs, RK_S32 size); 147 MPP_RET mpp_dev_multi_offset_deinit(MppDevRegOffCfgs *cfgs); 148 149 MPP_RET mpp_dev_multi_offset_reset(MppDevRegOffCfgs *cfgs); 150 MPP_RET mpp_dev_multi_offset_update(MppDevRegOffCfgs *cfgs, RK_S32 index, RK_U32 offset); 151 152 #ifdef __cplusplus 153 } 154 #endif 155 156 #endif /* __MPP_DEVICE_H__ */ 157