1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * maxim-max96752.c -- I2C register interface access for max96752 serdes chip
4 *
5 * Copyright (c) 2023-2028 Rockchip Electronics Co. Ltd.
6 *
7 * Author: luowei <lw@rock-chips.com>
8 */
9 #include "../core.h"
10 #include "maxim-max96752.h"
11
12 struct config_desc {
13 u16 reg;
14 u8 mask;
15 u8 val;
16 };
17
18 struct serdes_group_data {
19 const struct config_desc *configs;
20 int num_configs;
21 };
22
23 static int MAX96752_GPIO0_pins[] = {0};
24 static int MAX96752_GPIO1_pins[] = {1};
25 static int MAX96752_GPIO2_pins[] = {2};
26 static int MAX96752_GPIO3_pins[] = {3};
27 static int MAX96752_GPIO4_pins[] = {4};
28 static int MAX96752_GPIO5_pins[] = {5};
29 static int MAX96752_GPIO6_pins[] = {6};
30 static int MAX96752_GPIO7_pins[] = {7};
31
32 static int MAX96752_GPIO8_pins[] = {8};
33 static int MAX96752_GPIO9_pins[] = {9};
34 static int MAX96752_GPIO10_pins[] = {10};
35 static int MAX96752_GPIO11_pins[] = {11};
36 static int MAX96752_GPIO12_pins[] = {12};
37 static int MAX96752_GPIO13_pins[] = {13};
38 static int MAX96752_GPIO14_pins[] = {14};
39 static int MAX96752_GPIO15_pins[] = {15};
40
41 #define GROUP_DESC(nm) \
42 { \
43 .name = #nm, \
44 .pins = nm ## _pins, \
45 .num_pins = ARRAY_SIZE(nm ## _pins), \
46 }
47
48 struct serdes_function_data {
49 u8 gpio_out_dis:1;
50 u8 gpio_tx_en:1;
51 u8 gpio_rx_en:1;
52 u8 gpio_in_level:1;
53 u8 gpio_out_level:1;
54 u8 gpio_tx_id;
55 u8 gpio_rx_id;
56 u16 mdelay;
57 };
58
59 static const char *serdes_gpio_groups[] = {
60 "MAX96752_GPIO0", "MAX96752_GPIO1", "MAX96752_GPIO2", "MAX96752_GPIO3",
61 "MAX96752_GPIO4", "MAX96752_GPIO5", "MAX96752_GPIO6", "MAX96752_GPIO7",
62
63 "MAX96752_GPIO8", "MAX96752_GPIO9", "MAX96752_GPIO10", "MAX96752_GPIO11",
64 "MAX96752_GPIO12", "MAX96752_GPIO13", "MAX96752_GPIO14", "MAX96752_GPIO15",
65 };
66
67 #define FUNCTION_DESC_GPIO_INPUT_BYPASS(id) \
68 { \
69 .name = "SER_TO_DES_RXID"#id, \
70 .group_names = serdes_gpio_groups, \
71 .num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
72 .data = (void *)(const struct serdes_function_data []) { \
73 { .gpio_rx_en = 1, .gpio_rx_id = id } \
74 }, \
75 } \
76
77 #define FUNCTION_DESC_GPIO_OUTPUT_BYPASS(id) \
78 { \
79 .name = "DES_TXID"#id"_TO_SER", \
80 .group_names = serdes_gpio_groups, \
81 .num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
82 .data = (void *)(const struct serdes_function_data []) { \
83 { .gpio_out_dis = 1, .gpio_tx_en = 1, .gpio_tx_id = id } \
84 }, \
85 } \
86
87 #define FUNCTION_DESC_GPIO_OUTPUT_LOW(id) \
88 { \
89 .name = "DES_TXID"#id"_OUTPUT_LOW", \
90 .group_names = serdes_gpio_groups, \
91 .num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
92 .data = (void *)(const struct serdes_function_data []) { \
93 { .gpio_out_dis = 0, .gpio_tx_en = 0, \
94 .gpio_rx_en = 0, .gpio_out_level = 0, .gpio_tx_id = id } \
95 }, \
96 } \
97
98 #define FUNCTION_DESC_GPIO_OUTPUT_HIGH(id) \
99 { \
100 .name = "DES_TXID"#id"_OUTPUT_HIGH", \
101 .group_names = serdes_gpio_groups, \
102 .num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
103 .data = (void *)(const struct serdes_function_data []) { \
104 { .gpio_out_dis = 0, .gpio_tx_en = 0, \
105 .gpio_rx_en = 0, .gpio_out_level = 1, .gpio_tx_id = id } \
106 }, \
107 } \
108
109 #define FUNCTION_DES_DELAY_MS(ms) \
110 { \
111 .name = "DELAY_"#ms"MS", \
112 .group_names = serdes_gpio_groups, \
113 .num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
114 .data = (void *)(const struct serdes_function_data []) { \
115 { .mdelay = ms, } \
116 }, \
117 } \
118
119 static struct pinctrl_pin_desc max96752_pins_desc[] = {
120 PINCTRL_PIN(MAXIM_MAX96752_GPIO0, "MAX96752_GPIO0"),
121 PINCTRL_PIN(MAXIM_MAX96752_GPIO1, "MAX96752_GPIO1"),
122 PINCTRL_PIN(MAXIM_MAX96752_GPIO2, "MAX96752_GPIO2"),
123 PINCTRL_PIN(MAXIM_MAX96752_GPIO3, "MAX96752_GPIO3"),
124 PINCTRL_PIN(MAXIM_MAX96752_GPIO4, "MAX96752_GPIO4"),
125 PINCTRL_PIN(MAXIM_MAX96752_GPIO5, "MAX96752_GPIO5"),
126 PINCTRL_PIN(MAXIM_MAX96752_GPIO6, "MAX96752_GPIO6"),
127 PINCTRL_PIN(MAXIM_MAX96752_GPIO7, "MAX96752_GPIO7"),
128
129 PINCTRL_PIN(MAXIM_MAX96752_GPIO8, "MAX96752_GPIO8"),
130 PINCTRL_PIN(MAXIM_MAX96752_GPIO9, "MAX96752_GPIO9"),
131 PINCTRL_PIN(MAXIM_MAX96752_GPIO10, "MAX96752_GPIO10"),
132 PINCTRL_PIN(MAXIM_MAX96752_GPIO11, "MAX96752_GPIO11"),
133 PINCTRL_PIN(MAXIM_MAX96752_GPIO12, "MAX96752_GPIO12"),
134 PINCTRL_PIN(MAXIM_MAX96752_GPIO13, "MAX96752_GPIO13"),
135 PINCTRL_PIN(MAXIM_MAX96752_GPIO14, "MAX96752_GPIO14"),
136 PINCTRL_PIN(MAXIM_MAX96752_GPIO15, "MAX96752_GPIO15"),
137 };
138
139 static struct group_desc max96752_groups_desc[] = {
140 GROUP_DESC(MAX96752_GPIO0),
141 GROUP_DESC(MAX96752_GPIO1),
142 GROUP_DESC(MAX96752_GPIO2),
143 GROUP_DESC(MAX96752_GPIO3),
144 GROUP_DESC(MAX96752_GPIO4),
145 GROUP_DESC(MAX96752_GPIO5),
146 GROUP_DESC(MAX96752_GPIO6),
147 GROUP_DESC(MAX96752_GPIO7),
148
149 GROUP_DESC(MAX96752_GPIO8),
150 GROUP_DESC(MAX96752_GPIO9),
151 GROUP_DESC(MAX96752_GPIO10),
152 GROUP_DESC(MAX96752_GPIO11),
153 GROUP_DESC(MAX96752_GPIO12),
154 GROUP_DESC(MAX96752_GPIO13),
155 GROUP_DESC(MAX96752_GPIO14),
156 GROUP_DESC(MAX96752_GPIO15),
157 };
158
159 static struct function_desc max96752_functions_desc[] = {
160 FUNCTION_DESC_GPIO_INPUT_BYPASS(0),
161 FUNCTION_DESC_GPIO_INPUT_BYPASS(1),
162 FUNCTION_DESC_GPIO_INPUT_BYPASS(2),
163 FUNCTION_DESC_GPIO_INPUT_BYPASS(3),
164 FUNCTION_DESC_GPIO_INPUT_BYPASS(4),
165 FUNCTION_DESC_GPIO_INPUT_BYPASS(5),
166 FUNCTION_DESC_GPIO_INPUT_BYPASS(6),
167 FUNCTION_DESC_GPIO_INPUT_BYPASS(7),
168
169 FUNCTION_DESC_GPIO_INPUT_BYPASS(8),
170 FUNCTION_DESC_GPIO_INPUT_BYPASS(9),
171 FUNCTION_DESC_GPIO_INPUT_BYPASS(10),
172 FUNCTION_DESC_GPIO_INPUT_BYPASS(11),
173 FUNCTION_DESC_GPIO_INPUT_BYPASS(12),
174 FUNCTION_DESC_GPIO_INPUT_BYPASS(13),
175 FUNCTION_DESC_GPIO_INPUT_BYPASS(14),
176 FUNCTION_DESC_GPIO_INPUT_BYPASS(15),
177
178 FUNCTION_DESC_GPIO_OUTPUT_BYPASS(0),
179 FUNCTION_DESC_GPIO_OUTPUT_BYPASS(1),
180 FUNCTION_DESC_GPIO_OUTPUT_BYPASS(2),
181 FUNCTION_DESC_GPIO_OUTPUT_BYPASS(3),
182 FUNCTION_DESC_GPIO_OUTPUT_BYPASS(4),
183 FUNCTION_DESC_GPIO_OUTPUT_BYPASS(5),
184 FUNCTION_DESC_GPIO_OUTPUT_BYPASS(6),
185 FUNCTION_DESC_GPIO_OUTPUT_BYPASS(7),
186
187 FUNCTION_DESC_GPIO_OUTPUT_BYPASS(8),
188 FUNCTION_DESC_GPIO_OUTPUT_BYPASS(9),
189 FUNCTION_DESC_GPIO_OUTPUT_BYPASS(10),
190 FUNCTION_DESC_GPIO_OUTPUT_BYPASS(11),
191 FUNCTION_DESC_GPIO_OUTPUT_BYPASS(12),
192 FUNCTION_DESC_GPIO_OUTPUT_BYPASS(13),
193 FUNCTION_DESC_GPIO_OUTPUT_BYPASS(14),
194 FUNCTION_DESC_GPIO_OUTPUT_BYPASS(15),
195
196 FUNCTION_DESC_GPIO_OUTPUT_LOW(0),
197 FUNCTION_DESC_GPIO_OUTPUT_LOW(1),
198 FUNCTION_DESC_GPIO_OUTPUT_LOW(2),
199 FUNCTION_DESC_GPIO_OUTPUT_LOW(3),
200 FUNCTION_DESC_GPIO_OUTPUT_LOW(4),
201 FUNCTION_DESC_GPIO_OUTPUT_LOW(5),
202 FUNCTION_DESC_GPIO_OUTPUT_LOW(6),
203 FUNCTION_DESC_GPIO_OUTPUT_LOW(7),
204
205 FUNCTION_DESC_GPIO_OUTPUT_LOW(8),
206 FUNCTION_DESC_GPIO_OUTPUT_LOW(9),
207 FUNCTION_DESC_GPIO_OUTPUT_LOW(10),
208 FUNCTION_DESC_GPIO_OUTPUT_LOW(11),
209 FUNCTION_DESC_GPIO_OUTPUT_LOW(12),
210 FUNCTION_DESC_GPIO_OUTPUT_LOW(13),
211 FUNCTION_DESC_GPIO_OUTPUT_LOW(14),
212 FUNCTION_DESC_GPIO_OUTPUT_LOW(15),
213
214 FUNCTION_DESC_GPIO_OUTPUT_HIGH(0),
215 FUNCTION_DESC_GPIO_OUTPUT_HIGH(1),
216 FUNCTION_DESC_GPIO_OUTPUT_HIGH(2),
217 FUNCTION_DESC_GPIO_OUTPUT_HIGH(3),
218 FUNCTION_DESC_GPIO_OUTPUT_HIGH(4),
219 FUNCTION_DESC_GPIO_OUTPUT_HIGH(5),
220 FUNCTION_DESC_GPIO_OUTPUT_HIGH(6),
221 FUNCTION_DESC_GPIO_OUTPUT_HIGH(7),
222
223 FUNCTION_DESC_GPIO_OUTPUT_HIGH(8),
224 FUNCTION_DESC_GPIO_OUTPUT_HIGH(9),
225 FUNCTION_DESC_GPIO_OUTPUT_HIGH(10),
226 FUNCTION_DESC_GPIO_OUTPUT_HIGH(11),
227 FUNCTION_DESC_GPIO_OUTPUT_HIGH(12),
228 FUNCTION_DESC_GPIO_OUTPUT_HIGH(13),
229 FUNCTION_DESC_GPIO_OUTPUT_HIGH(14),
230 FUNCTION_DESC_GPIO_OUTPUT_HIGH(15),
231
232 FUNCTION_DES_DELAY_MS(10),
233 FUNCTION_DES_DELAY_MS(20),
234 FUNCTION_DES_DELAY_MS(30),
235 FUNCTION_DES_DELAY_MS(40),
236 FUNCTION_DES_DELAY_MS(50),
237 FUNCTION_DES_DELAY_MS(100),
238 FUNCTION_DES_DELAY_MS(200),
239 FUNCTION_DES_DELAY_MS(500),
240 };
241
242 static struct serdes_chip_pinctrl_info max96752_pinctrl_info = {
243 .pins = max96752_pins_desc,
244 .num_pins = ARRAY_SIZE(max96752_pins_desc),
245 .groups = max96752_groups_desc,
246 .num_groups = ARRAY_SIZE(max96752_groups_desc),
247 .functions = max96752_functions_desc,
248 .num_functions = ARRAY_SIZE(max96752_functions_desc),
249 };
250
max96752_panel_prepare(struct serdes * serdes)251 static int max96752_panel_prepare(struct serdes *serdes)
252 {
253 return 0;
254 }
255
max96752_panel_unprepare(struct serdes * serdes)256 static int max96752_panel_unprepare(struct serdes *serdes)
257 {
258 //serdes_reg_write(serdes, 0x0215, 0x80); /* lcd_en */
259
260 return 0;
261 }
262
max96752_panel_enable(struct serdes * serdes)263 static int max96752_panel_enable(struct serdes *serdes)
264 {
265 return 0;
266 }
267
max96752_panel_disable(struct serdes * serdes)268 static int max96752_panel_disable(struct serdes *serdes)
269 {
270 return 0;
271 }
272
max96752_panel_backlight_enable(struct serdes * serdes)273 static int max96752_panel_backlight_enable(struct serdes *serdes)
274 {
275 return 0;
276 }
277
max96752_panel_backlight_disable(struct serdes * serdes)278 static int max96752_panel_backlight_disable(struct serdes *serdes)
279 {
280 return 0;
281 }
282
283 static struct serdes_chip_panel_ops max96752_panel_ops = {
284 .prepare = max96752_panel_prepare,
285 .unprepare = max96752_panel_unprepare,
286 .enable = max96752_panel_enable,
287 .disable = max96752_panel_disable,
288 .backlight_enable = max96752_panel_backlight_enable,
289 .backlight_disable = max96752_panel_backlight_disable,
290 };
291
max96752_pinctrl_set_pin_mux(struct serdes * serdes,unsigned int pin_selector,unsigned int func_selector)292 static int max96752_pinctrl_set_pin_mux(struct serdes *serdes,
293 unsigned int pin_selector,
294 unsigned int func_selector)
295 {
296 struct function_desc *func;
297 struct pinctrl_pin_desc *pin;
298 int offset;
299 u16 ms;
300
301 func = &serdes->chip_data->pinctrl_info->functions[func_selector];
302 if (!func) {
303 printf("%s: func is null\n", __func__);
304 return -EINVAL;
305 }
306
307 pin = &serdes->chip_data->pinctrl_info->pins[pin_selector];
308 if (!pin) {
309 printf("%s: pin is null\n", __func__);
310 return -EINVAL;
311 }
312
313 SERDES_DBG_CHIP("%s: serdes %s func=%s data=%p pin=%s num=%d\n",
314 __func__, serdes->dev->name,
315 func->name, func->data,
316 pin->name, pin->number);
317
318 if (func->data) {
319 struct serdes_function_data *fdata = func->data;
320
321 ms = fdata->mdelay;
322 offset = pin->number;
323 if (offset > 32)
324 dev_err(serdes->dev, "%s offset=%d > 32\n",
325 serdes->dev->name, offset);
326 else
327 SERDES_DBG_CHIP("%s: serdes %s txid=%d rxid=%d off=%d\n",
328 __func__, serdes->dev->name,
329 fdata->gpio_tx_id, fdata->gpio_rx_id, offset);
330
331 if (!ms) {
332 serdes_set_bits(serdes, GPIO_A_REG(offset),
333 GPIO_OUT_DIS | GPIO_RX_EN | GPIO_TX_EN | GPIO_OUT,
334 FIELD_PREP(GPIO_OUT_DIS, fdata->gpio_out_dis) |
335 FIELD_PREP(GPIO_RX_EN, fdata->gpio_rx_en) |
336 FIELD_PREP(GPIO_TX_EN, fdata->gpio_tx_en) |
337 FIELD_PREP(GPIO_OUT, fdata->gpio_out_level));
338 if (fdata->gpio_tx_en)
339 serdes_set_bits(serdes,
340 GPIO_B_REG(offset),
341 GPIO_TX_ID,
342 FIELD_PREP(GPIO_TX_ID, fdata->gpio_tx_id));
343 if (fdata->gpio_rx_en)
344 serdes_set_bits(serdes,
345 GPIO_C_REG(offset),
346 GPIO_RX_ID,
347 FIELD_PREP(GPIO_RX_ID, fdata->gpio_rx_id));
348 } else {
349 mdelay(ms);
350 SERDES_DBG_CHIP("%s: delay %dms\n", __func__, ms);
351 }
352 }
353
354 return 0;
355 }
356
max96752_pinctrl_set_grp_mux(struct serdes * serdes,unsigned int group_selector,unsigned int func_selector)357 static int max96752_pinctrl_set_grp_mux(struct serdes *serdes,
358 unsigned int group_selector,
359 unsigned int func_selector)
360 {
361 struct serdes_pinctrl *pinctrl = serdes->serdes_pinctrl;
362 struct function_desc *func;
363 struct group_desc *grp;
364 int i, offset;
365 u16 ms;
366
367 func = &serdes->chip_data->pinctrl_info->functions[func_selector];
368 if (!func) {
369 printf("%s: func is null\n", __func__);
370 return -EINVAL;
371 }
372
373 grp = &serdes->chip_data->pinctrl_info->groups[group_selector];
374 if (!grp) {
375 printf("%s: grp is null\n", __func__);
376 return -EINVAL;
377 }
378
379 SERDES_DBG_CHIP("%s: serdes %s func=%s data=%p grp=%s data=%p, num=%d\n",
380 __func__, serdes->chip_data->name, func->name,
381 func->data, grp->name, grp->data, grp->num_pins);
382
383 if (func->data) {
384 struct serdes_function_data *fdata = func->data;
385
386 ms = fdata->mdelay;
387
388 for (i = 0; i < grp->num_pins; i++) {
389 offset = grp->pins[i] - pinctrl->pin_base;
390 if (offset > 32)
391 dev_err(serdes->dev, "%s offset=%d > 32\n",
392 serdes->dev->name, offset);
393 else
394 SERDES_DBG_CHIP("%s: serdes %s txid=%d rxid=%d off=%d\n",
395 __func__, serdes->dev->name,
396 fdata->gpio_tx_id, fdata->gpio_rx_id, offset);
397
398 if (!ms) {
399 serdes_set_bits(serdes, GPIO_A_REG(offset),
400 GPIO_OUT_DIS | GPIO_RX_EN | GPIO_TX_EN | GPIO_OUT,
401 FIELD_PREP(GPIO_OUT_DIS, fdata->gpio_out_dis) |
402 FIELD_PREP(GPIO_RX_EN, fdata->gpio_rx_en) |
403 FIELD_PREP(GPIO_TX_EN, fdata->gpio_tx_en) |
404 FIELD_PREP(GPIO_OUT, fdata->gpio_out_level));
405 if (fdata->gpio_tx_en)
406 serdes_set_bits(serdes,
407 GPIO_B_REG(offset),
408 GPIO_TX_ID,
409 FIELD_PREP(GPIO_TX_ID, fdata->gpio_tx_id));
410 if (fdata->gpio_rx_en)
411 serdes_set_bits(serdes,
412 GPIO_C_REG(offset),
413 GPIO_RX_ID,
414 FIELD_PREP(GPIO_RX_ID, fdata->gpio_rx_id));
415 } else {
416 mdelay(ms);
417 SERDES_DBG_CHIP("%s: delay %dms\n", __func__, ms);
418 }
419 }
420 }
421
422 if (grp->data) {
423 struct serdes_group_data *gdata = grp->data;
424
425 for (i = 0; i < gdata->num_configs; i++) {
426 const struct config_desc *config = &gdata->configs[i];
427
428 serdes_set_bits(serdes, config->reg,
429 config->mask, config->val);
430 }
431 }
432
433 return 0;
434 }
435
max96752_pinctrl_config_set(struct serdes * serdes,unsigned int pin_selector,unsigned int param,unsigned int argument)436 static int max96752_pinctrl_config_set(struct serdes *serdes,
437 unsigned int pin_selector,
438 unsigned int param,
439 unsigned int argument)
440 {
441 u8 res_cfg;
442
443 switch (param) {
444 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
445 serdes_set_bits(serdes, GPIO_B_REG(pin_selector),
446 OUT_TYPE, FIELD_PREP(OUT_TYPE, 0));
447 break;
448 case PIN_CONFIG_DRIVE_PUSH_PULL:
449 serdes_set_bits(serdes, GPIO_B_REG(pin_selector),
450 OUT_TYPE, FIELD_PREP(OUT_TYPE, 1));
451 break;
452 case PIN_CONFIG_BIAS_DISABLE:
453 serdes_set_bits(serdes, GPIO_C_REG(pin_selector),
454 PULL_UPDN_SEL,
455 FIELD_PREP(PULL_UPDN_SEL, 0));
456 break;
457 case PIN_CONFIG_BIAS_PULL_UP:
458 switch (argument) {
459 case 40000:
460 res_cfg = 0;
461 break;
462 case 1000000:
463 res_cfg = 1;
464 break;
465 default:
466 return -EINVAL;
467 }
468
469 serdes_set_bits(serdes, GPIO_A_REG(pin_selector),
470 RES_CFG, FIELD_PREP(RES_CFG, res_cfg));
471 serdes_set_bits(serdes, GPIO_C_REG(pin_selector),
472 PULL_UPDN_SEL,
473 FIELD_PREP(PULL_UPDN_SEL, 1));
474 break;
475 case PIN_CONFIG_BIAS_PULL_DOWN:
476 switch (argument) {
477 case 40000:
478 res_cfg = 0;
479 break;
480 case 1000000:
481 res_cfg = 1;
482 break;
483 default:
484 return -EINVAL;
485 }
486
487 serdes_set_bits(serdes, GPIO_A_REG(pin_selector),
488 RES_CFG, FIELD_PREP(RES_CFG, res_cfg));
489 serdes_set_bits(serdes, GPIO_C_REG(pin_selector),
490 PULL_UPDN_SEL,
491 FIELD_PREP(PULL_UPDN_SEL, 2));
492 break;
493 case PIN_CONFIG_OUTPUT:
494 serdes_set_bits(serdes, GPIO_A_REG(pin_selector),
495 GPIO_OUT_DIS | GPIO_OUT,
496 FIELD_PREP(GPIO_OUT_DIS, 0) |
497 FIELD_PREP(GPIO_OUT, argument));
498 break;
499 default:
500 return -EOPNOTSUPP;
501 }
502
503 return 0;
504 }
505
506 static struct serdes_chip_pinctrl_ops max96752_pinctrl_ops = {
507 .pinconf_set = max96752_pinctrl_config_set,
508 .pinmux_set = max96752_pinctrl_set_pin_mux,
509 .pinmux_group_set = max96752_pinctrl_set_grp_mux,
510 };
511
max96752_gpio_direction_input(struct serdes * serdes,int gpio)512 static int max96752_gpio_direction_input(struct serdes *serdes, int gpio)
513 {
514 return 0;
515 }
516
max96752_gpio_direction_output(struct serdes * serdes,int gpio,int value)517 static int max96752_gpio_direction_output(struct serdes *serdes,
518 int gpio, int value)
519 {
520 return 0;
521 }
522
max96752_gpio_get_level(struct serdes * serdes,int gpio)523 static int max96752_gpio_get_level(struct serdes *serdes, int gpio)
524 {
525 return 0;
526 }
527
max96752_gpio_set_level(struct serdes * serdes,int gpio,int value)528 static int max96752_gpio_set_level(struct serdes *serdes, int gpio, int value)
529 {
530 return 0;
531 }
532
max96752_gpio_set_config(struct serdes * serdes,int gpio,unsigned long config)533 static int max96752_gpio_set_config(struct serdes *serdes,
534 int gpio, unsigned long config)
535 {
536 return 0;
537 }
538
max96752_gpio_to_irq(struct serdes * serdes,int gpio)539 static int max96752_gpio_to_irq(struct serdes *serdes, int gpio)
540 {
541 return 0;
542 }
543
544 static struct serdes_chip_gpio_ops max96752_gpio_ops = {
545 .direction_input = max96752_gpio_direction_input,
546 .direction_output = max96752_gpio_direction_output,
547 .get_level = max96752_gpio_get_level,
548 .set_level = max96752_gpio_set_level,
549 .set_config = max96752_gpio_set_config,
550 .to_irq = max96752_gpio_to_irq,
551 };
552
max96752_set_i2c_addr(struct serdes * serdes,int address,int link)553 static int max96752_set_i2c_addr(struct serdes *serdes, int address, int link)
554 {
555 int ret;
556
557 if (link == LINKA) {
558 /* TX_SRC_ID[1] = 0 */
559 ret = serdes_reg_write(serdes, 0x73, 0x31);
560 /* Receive packets with this stream ID = 0 */
561 ret = serdes_reg_write(serdes, 0x50, 0x00);
562 ret = serdes_reg_write(serdes, 0x00, address << 1);
563 } else if (link == LINKB) {
564 /* TX_SRC_ID[1] = 1 */
565 ret = serdes_reg_write(serdes, 0x73, 0x32);
566 /* Receive packets with this stream ID = 1 */
567 ret = serdes_reg_write(serdes, 0x50, 0x01);
568 ret = serdes_reg_write(serdes, 0x00, address << 1);
569 } else {
570 dev_info(serdes->dev, "link %d is error\n", link);
571 ret = -1;
572 }
573
574 SERDES_DBG_CHIP("%s: set serdes chip %s i2c 7bit address to 0x%x\n", __func__,
575 serdes->chip_data->name, address);
576
577 return ret;
578 }
579
580 static struct serdes_chip_split_ops max96752_split_ops = {
581 .set_i2c_addr = max96752_set_i2c_addr,
582 };
583
584 struct serdes_chip_data serdes_max96752_data = {
585 .name = "max96752",
586 .serdes_type = TYPE_DES,
587 .serdes_id = MAXIM_ID_MAX96752,
588 .connector_type = DRM_MODE_CONNECTOR_LVDS,
589 .pinctrl_info = &max96752_pinctrl_info,
590 .panel_ops = &max96752_panel_ops,
591 .pinctrl_ops = &max96752_pinctrl_ops,
592 .split_ops = &max96752_split_ops,
593 .gpio_ops = &max96752_gpio_ops,
594 };
595 EXPORT_SYMBOL_GPL(serdes_max96752_data);
596
597 MODULE_LICENSE("GPL");
598