1 /******************************************************************************
2 *
3 * Copyright(c) 2013 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 *
19 ******************************************************************************/
20
21 #include <rtw_odm.h>
22 #include <hal_data.h>
23
24 const char *odm_comp_str[] = {
25 /* BIT0 */"ODM_COMP_DIG",
26 /* BIT1 */"ODM_COMP_RA_MASK",
27 /* BIT2 */"ODM_COMP_DYNAMIC_TXPWR",
28 /* BIT3 */"ODM_COMP_FA_CNT",
29 /* BIT4 */"ODM_COMP_RSSI_MONITOR",
30 /* BIT5 */"ODM_COMP_CCK_PD",
31 /* BIT6 */"ODM_COMP_ANT_DIV",
32 /* BIT7 */"ODM_COMP_PWR_SAVE",
33 /* BIT8 */"ODM_COMP_PWR_TRAIN",
34 /* BIT9 */"ODM_COMP_RATE_ADAPTIVE",
35 /* BIT10 */"ODM_COMP_PATH_DIV",
36 /* BIT11 */"ODM_COMP_PSD",
37 /* BIT12 */"ODM_COMP_DYNAMIC_PRICCA",
38 /* BIT13 */"ODM_COMP_RXHP",
39 /* BIT14 */"ODM_COMP_MP",
40 /* BIT15 */"ODM_COMP_CFO_TRACKING",
41 /* BIT16 */"ODM_COMP_ACS",
42 /* BIT17 */"PHYDM_COMP_ADAPTIVITY",
43 /* BIT18 */"PHYDM_COMP_RA_DBG",
44 /* BIT19 */"PHYDM_COMP_TXBF",
45 /* BIT20 */"ODM_COMP_EDCA_TURBO",
46 /* BIT21 */"ODM_COMP_EARLY_MODE",
47 /* BIT22 */"ODM_FW_DEBUG_TRACE",
48 /* BIT23 */NULL,
49 /* BIT24 */"ODM_COMP_TX_PWR_TRACK",
50 /* BIT25 */"ODM_COMP_RX_GAIN_TRACK",
51 /* BIT26 */"ODM_COMP_CALIBRATION",
52 /* BIT27 */NULL,
53 /* BIT28 */"ODM_PHY_CONFIG",
54 /* BIT29 */"BEAMFORMING_DEBUG",
55 /* BIT30 */"ODM_COMP_COMMON",
56 /* BIT31 */"ODM_COMP_INIT",
57 /* BIT32 */"ODM_COMP_NOISY_DETECT",
58 /* BIT33 */"ODM_COMP_DFS",
59 };
60
61 #define RTW_ODM_COMP_MAX 34
62
63 const char *odm_ability_str[] = {
64 /* BIT0 */"ODM_BB_DIG",
65 /* BIT1 */"ODM_BB_RA_MASK",
66 /* BIT2 */"ODM_BB_DYNAMIC_TXPWR",
67 /* BIT3 */"ODM_BB_FA_CNT",
68 /* BIT4 */"ODM_BB_RSSI_MONITOR",
69 /* BIT5 */"ODM_BB_CCK_PD",
70 /* BIT6 */"ODM_BB_ANT_DIV",
71 /* BIT7 */"ODM_BB_PWR_SAVE",
72 /* BIT8 */"ODM_BB_PWR_TRAIN",
73 /* BIT9 */"ODM_BB_RATE_ADAPTIVE",
74 /* BIT10 */"ODM_BB_PATH_DIV",
75 /* BIT11 */"ODM_BB_PSD",
76 /* BIT12 */"ODM_BB_RXHP",
77 /* BIT13 */"ODM_BB_ADAPTIVITY",
78 /* BIT14 */"ODM_BB_CFO_TRACKING",
79 /* BIT15 */"ODM_BB_NHM_CNT",
80 /* BIT16 */"ODM_BB_PRIMARY_CCA",
81 /* BIT17 */"ODM_BB_TXBF",
82 /* BIT18 */NULL,
83 /* BIT19 */NULL,
84 /* BIT20 */"ODM_MAC_EDCA_TURBO",
85 /* BIT21 */"ODM_MAC_EARLY_MODE",
86 /* BIT22 */NULL,
87 /* BIT23 */NULL,
88 /* BIT24 */"ODM_RF_TX_PWR_TRACK",
89 /* BIT25 */"ODM_RF_RX_GAIN_TRACK",
90 /* BIT26 */"ODM_RF_CALIBRATION",
91 };
92
93 #define RTW_ODM_ABILITY_MAX 27
94
95 const char *odm_dbg_level_str[] = {
96 NULL,
97 "ODM_DBG_OFF",
98 "ODM_DBG_SERIOUS",
99 "ODM_DBG_WARNING",
100 "ODM_DBG_LOUD",
101 "ODM_DBG_TRACE",
102 };
103
104 #define RTW_ODM_DBG_LEVEL_NUM 6
105
rtw_odm_dbg_comp_msg(void * sel,_adapter * adapter)106 void rtw_odm_dbg_comp_msg(void *sel, _adapter *adapter)
107 {
108 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
109 DM_ODM_T *odm = &pHalData->odmpriv;
110 int cnt = 0;
111 u64 dbg_comp = 0;
112 int i;
113
114 rtw_hal_get_odm_var(adapter, HAL_ODM_DBG_FLAG, &dbg_comp, NULL);
115
116 RTW_PRINT_SEL(sel, "odm.DebugComponents = 0x%016llx\n", dbg_comp);
117 for (i = 0; i < RTW_ODM_COMP_MAX; i++) {
118 if (odm_comp_str[i])
119 RTW_PRINT_SEL(sel, "%cBIT%-2d %s\n",
120 (BIT0 & (dbg_comp >> i)) ? '+' : ' ', i, odm_comp_str[i]);
121 }
122 }
123
rtw_odm_dbg_comp_set(_adapter * adapter,u64 comps)124 inline void rtw_odm_dbg_comp_set(_adapter *adapter, u64 comps)
125 {
126 rtw_hal_set_odm_var(adapter, HAL_ODM_DBG_FLAG, &comps, _FALSE);
127 }
128
rtw_odm_dbg_level_msg(void * sel,_adapter * adapter)129 void rtw_odm_dbg_level_msg(void *sel, _adapter *adapter)
130 {
131 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
132 DM_ODM_T *odm = &pHalData->odmpriv;
133 int cnt = 0;
134 u32 dbg_level = 0;
135 int i;
136
137 rtw_hal_get_odm_var(adapter, HAL_ODM_DBG_LEVEL, &dbg_level, NULL);
138 RTW_PRINT_SEL(sel, "odm.DebugLevel = %u\n", dbg_level);
139 for (i = 0; i < RTW_ODM_DBG_LEVEL_NUM; i++) {
140 if (odm_dbg_level_str[i])
141 RTW_PRINT_SEL(sel, "%u %s\n", i, odm_dbg_level_str[i]);
142 }
143 }
144
rtw_odm_dbg_level_set(_adapter * adapter,u32 level)145 inline void rtw_odm_dbg_level_set(_adapter *adapter, u32 level)
146 {
147 rtw_hal_set_odm_var(adapter, HAL_ODM_DBG_LEVEL, &level, _FALSE);
148 }
149
rtw_odm_ability_msg(void * sel,_adapter * adapter)150 void rtw_odm_ability_msg(void *sel, _adapter *adapter)
151 {
152 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
153 DM_ODM_T *odm = &pHalData->odmpriv;
154 int cnt = 0;
155 u32 ability = 0;
156 int i;
157
158 ability = rtw_phydm_ability_get(adapter);
159 RTW_PRINT_SEL(sel, "odm.SupportAbility = 0x%08x\n", ability);
160 for (i = 0; i < RTW_ODM_ABILITY_MAX; i++) {
161 if (odm_ability_str[i])
162 RTW_PRINT_SEL(sel, "%cBIT%-2d %s\n",
163 (BIT0 << i) & ability ? '+' : ' ', i, odm_ability_str[i]);
164 }
165 }
166
rtw_odm_ability_set(_adapter * adapter,u32 ability)167 inline void rtw_odm_ability_set(_adapter *adapter, u32 ability)
168 {
169 rtw_phydm_ability_set(adapter, ability);
170 }
171
172 /* set ODM_CMNINFO_IC_TYPE based on chip_type */
rtw_odm_init_ic_type(_adapter * adapter)173 void rtw_odm_init_ic_type(_adapter *adapter)
174 {
175 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
176 DM_ODM_T *odm = &hal_data->odmpriv;
177 u4Byte ic_type = chip_type_to_odm_ic_type(rtw_get_chip_type(adapter));
178
179 rtw_warn_on(!ic_type);
180
181 ODM_CmnInfoInit(odm, ODM_CMNINFO_IC_TYPE, ic_type);
182 }
183
rtw_odm_set_force_igi_lb(_adapter * adapter,u8 lb)184 inline void rtw_odm_set_force_igi_lb(_adapter *adapter, u8 lb)
185 {
186 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
187
188 hal_data->u1ForcedIgiLb = lb;
189 }
190
rtw_odm_get_force_igi_lb(_adapter * adapter)191 inline u8 rtw_odm_get_force_igi_lb(_adapter *adapter)
192 {
193 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
194
195 return hal_data->u1ForcedIgiLb;
196 }
197
rtw_odm_adaptivity_ver_msg(void * sel,_adapter * adapter)198 void rtw_odm_adaptivity_ver_msg(void *sel, _adapter *adapter)
199 {
200 RTW_PRINT_SEL(sel, "ADAPTIVITY_VERSION "ADAPTIVITY_VERSION"\n");
201 }
202
203 #define RTW_ADAPTIVITY_EN_DISABLE 0
204 #define RTW_ADAPTIVITY_EN_ENABLE 1
205
rtw_odm_adaptivity_en_msg(void * sel,_adapter * adapter)206 void rtw_odm_adaptivity_en_msg(void *sel, _adapter *adapter)
207 {
208 struct registry_priv *regsty = &adapter->registrypriv;
209 struct mlme_priv *mlme = &adapter->mlmepriv;
210 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
211 DM_ODM_T *odm = &hal_data->odmpriv;
212
213 RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_EN_");
214
215 if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_DISABLE)
216 _RTW_PRINT_SEL(sel, "DISABLE\n");
217 else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE)
218 _RTW_PRINT_SEL(sel, "ENABLE\n");
219 else
220 _RTW_PRINT_SEL(sel, "INVALID\n");
221 }
222
223 #define RTW_ADAPTIVITY_MODE_NORMAL 0
224 #define RTW_ADAPTIVITY_MODE_CARRIER_SENSE 1
225
rtw_odm_adaptivity_mode_msg(void * sel,_adapter * adapter)226 void rtw_odm_adaptivity_mode_msg(void *sel, _adapter *adapter)
227 {
228 struct registry_priv *regsty = &adapter->registrypriv;
229
230 RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_MODE_");
231
232 if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_NORMAL)
233 _RTW_PRINT_SEL(sel, "NORMAL\n");
234 else if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_CARRIER_SENSE)
235 _RTW_PRINT_SEL(sel, "CARRIER_SENSE\n");
236 else
237 _RTW_PRINT_SEL(sel, "INVALID\n");
238 }
239
240 #define RTW_ADAPTIVITY_DML_DISABLE 0
241 #define RTW_ADAPTIVITY_DML_ENABLE 1
242
rtw_odm_adaptivity_dml_msg(void * sel,_adapter * adapter)243 void rtw_odm_adaptivity_dml_msg(void *sel, _adapter *adapter)
244 {
245 struct registry_priv *regsty = &adapter->registrypriv;
246
247 RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_DML_");
248
249 if (regsty->adaptivity_dml == RTW_ADAPTIVITY_DML_DISABLE)
250 _RTW_PRINT_SEL(sel, "DISABLE\n");
251 else if (regsty->adaptivity_dml == RTW_ADAPTIVITY_DML_ENABLE)
252 _RTW_PRINT_SEL(sel, "ENABLE\n");
253 else
254 _RTW_PRINT_SEL(sel, "INVALID\n");
255 }
256
rtw_odm_adaptivity_dc_backoff_msg(void * sel,_adapter * adapter)257 void rtw_odm_adaptivity_dc_backoff_msg(void *sel, _adapter *adapter)
258 {
259 struct registry_priv *regsty = &adapter->registrypriv;
260
261 RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_DC_BACKOFF:%u\n", regsty->adaptivity_dc_backoff);
262 }
263
rtw_odm_adaptivity_config_msg(void * sel,_adapter * adapter)264 void rtw_odm_adaptivity_config_msg(void *sel, _adapter *adapter)
265 {
266 rtw_odm_adaptivity_ver_msg(sel, adapter);
267 rtw_odm_adaptivity_en_msg(sel, adapter);
268 rtw_odm_adaptivity_mode_msg(sel, adapter);
269 rtw_odm_adaptivity_dml_msg(sel, adapter);
270 rtw_odm_adaptivity_dc_backoff_msg(sel, adapter);
271 }
272
rtw_odm_adaptivity_needed(_adapter * adapter)273 bool rtw_odm_adaptivity_needed(_adapter *adapter)
274 {
275 struct registry_priv *regsty = &adapter->registrypriv;
276 struct mlme_priv *mlme = &adapter->mlmepriv;
277 bool ret = _FALSE;
278
279 if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE)
280 ret = _TRUE;
281
282 return ret;
283 }
284
rtw_odm_adaptivity_parm_msg(void * sel,_adapter * adapter)285 void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter)
286 {
287 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
288 DM_ODM_T *odm = &pHalData->odmpriv;
289
290 rtw_odm_adaptivity_config_msg(sel, adapter);
291
292 RTW_PRINT_SEL(sel, "%10s %16s %16s %22s %12s\n"
293 , "TH_L2H_ini", "TH_EDCCA_HL_diff", "TH_L2H_ini_mode2", "TH_EDCCA_HL_diff_mode2", "EDCCA_enable");
294 RTW_PRINT_SEL(sel, "0x%-8x %-16d 0x%-14x %-22d %-12d\n"
295 , (u8)odm->TH_L2H_ini
296 , odm->TH_EDCCA_HL_diff
297 , (u8)odm->TH_L2H_ini_mode2
298 , odm->TH_EDCCA_HL_diff_mode2
299 , odm->EDCCA_enable
300 );
301
302 RTW_PRINT_SEL(sel, "%15s %9s\n", "AdapEnableState", "Adap_Flag");
303 RTW_PRINT_SEL(sel, "%-15x %-9x\n"
304 , odm->Adaptivity_enable
305 , odm->adaptivity_flag
306 );
307 }
308
rtw_odm_adaptivity_parm_set(_adapter * adapter,s8 TH_L2H_ini,s8 TH_EDCCA_HL_diff,s8 TH_L2H_ini_mode2,s8 TH_EDCCA_HL_diff_mode2,u8 EDCCA_enable)309 void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff, s8 TH_L2H_ini_mode2, s8 TH_EDCCA_HL_diff_mode2, u8 EDCCA_enable)
310 {
311 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
312 DM_ODM_T *odm = &pHalData->odmpriv;
313
314 odm->TH_L2H_ini = TH_L2H_ini;
315 odm->TH_EDCCA_HL_diff = TH_EDCCA_HL_diff;
316 odm->TH_L2H_ini_mode2 = TH_L2H_ini_mode2;
317 odm->TH_EDCCA_HL_diff_mode2 = TH_EDCCA_HL_diff_mode2;
318 odm->EDCCA_enable = EDCCA_enable;
319 }
320
rtw_odm_get_perpkt_rssi(void * sel,_adapter * adapter)321 void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter)
322 {
323 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
324 DM_ODM_T *odm = &(hal_data->odmpriv);
325
326 RTW_PRINT_SEL(sel, "RxRate = %s, RSSI_A = %d(%%), RSSI_B = %d(%%)\n",
327 HDATA_RATE(odm->RxRate), odm->RSSI_A, odm->RSSI_B);
328 }
329
330
rtw_odm_acquirespinlock(_adapter * adapter,RT_SPINLOCK_TYPE type)331 void rtw_odm_acquirespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type)
332 {
333 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
334 _irqL irqL;
335
336 switch (type) {
337 case RT_IQK_SPINLOCK:
338 _enter_critical_bh(&pHalData->IQKSpinLock, &irqL);
339 default:
340 break;
341 }
342 }
343
rtw_odm_releasespinlock(_adapter * adapter,RT_SPINLOCK_TYPE type)344 void rtw_odm_releasespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type)
345 {
346 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
347 _irqL irqL;
348
349 switch (type) {
350 case RT_IQK_SPINLOCK:
351 _exit_critical_bh(&pHalData->IQKSpinLock, &irqL);
352 default:
353 break;
354 }
355 }
356
357 #ifdef CONFIG_DFS_MASTER
rtw_odm_get_dfs_domain(_adapter * adapter)358 inline u8 rtw_odm_get_dfs_domain(_adapter *adapter)
359 {
360 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
361 PDM_ODM_T pDM_Odm = &(hal_data->odmpriv);
362
363 return pDM_Odm->DFS_RegionDomain;
364 }
365
rtw_odm_radar_detect_reset(_adapter * adapter)366 inline VOID rtw_odm_radar_detect_reset(_adapter *adapter)
367 {
368 phydm_radar_detect_reset(GET_ODM(adapter));
369 }
370
rtw_odm_radar_detect_disable(_adapter * adapter)371 inline VOID rtw_odm_radar_detect_disable(_adapter *adapter)
372 {
373 phydm_radar_detect_disable(GET_ODM(adapter));
374 }
375
376 /* called after ch, bw is set */
rtw_odm_radar_detect_enable(_adapter * adapter)377 inline VOID rtw_odm_radar_detect_enable(_adapter *adapter)
378 {
379 phydm_radar_detect_enable(GET_ODM(adapter));
380 }
381
rtw_odm_radar_detect(_adapter * adapter)382 inline BOOLEAN rtw_odm_radar_detect(_adapter *adapter)
383 {
384 return phydm_radar_detect(GET_ODM(adapter));
385 }
386 #endif /* CONFIG_DFS_MASTER */
387