1 /******************************************************************************
2 *
3 * Copyright(c) 2015 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 #define _RTL8822B_OPS_C_
16
17 #include <drv_types.h> /* basic_types.h, rtw_io.h and etc. */
18 #include <rtw_xmit.h> /* struct xmit_priv */
19 #ifdef DBG_CONFIG_ERROR_DETECT
20 #include <rtw_sreset.h>
21 #endif /* DBG_CONFIG_ERROR_DETECT */
22 #include <hal_data.h> /* PHAL_DATA_TYPE, GET_HAL_DATA() */
23 #include <hal_com.h> /* dump_chip_info() and etc. */
24 #include "../hal_halmac.h" /* GET_RX_DESC_XXX_8822B() */
25 #include "rtl8822b.h"
26 #include "rtl8822b_hal.h"
27
28
29 static const struct hw_port_reg port_cfg[] = {
30 /*port 0*/
31 {
32 .net_type = (REG_CR_8822B + 2),
33 .net_type_shift = 0,
34 .macaddr = REG_MACID_8822B,
35 .bssid = REG_BSSID_8822B,
36 .bcn_ctl = REG_BCN_CTRL_8822B,
37 .tsf_rst = REG_DUAL_TSF_RST,
38 .tsf_rst_bit = BIT_TSFTR_RST_8822B,
39 .bcn_space = REG_MBSSID_BCN_SPACE_8822B,
40 .bcn_space_shift = 0,
41 .bcn_space_mask = 0xffff,
42 .ps_aid = REG_BCN_PSR_RPT_8822B,
43 .ta = REG_TRANSMIT_ADDRSS_0_8822B,
44 },
45 /*port 1*/
46 {
47 .net_type = (REG_CR_8822B + 2),
48 .net_type_shift = 2,
49 .macaddr = REG_MACID1_8822B,
50 .bssid = REG_BSSID1_8822B,
51 .bcn_ctl = REG_BCN_CTRL_CLINT0_8822B,
52 .tsf_rst = REG_DUAL_TSF_RST,
53 .tsf_rst_bit = BIT_TSFTR_CLI0_RST_8822B,
54 .bcn_space = REG_MBSSID_BCN_SPACE_8822B,
55 .bcn_space_shift = 16,
56 .bcn_space_mask = 0xfff,
57 .ps_aid = REG_BCN_PSR_RPT1_8822B,
58 .ta = REG_TRANSMIT_ADDRSS_1_8822B,
59 },
60 /*port 2*/
61 {
62 .net_type = REG_CR_EXT_8822B,
63 .net_type_shift = 0,
64 .macaddr = REG_MACID2_8822B,
65 .bssid = REG_BSSID2_8822B,
66 .bcn_ctl = REG_BCN_CTRL_CLINT1_8822B,
67 .tsf_rst = REG_DUAL_TSF_RST,
68 .tsf_rst_bit = BIT_TSFTR_CLI1_RST_8822B,
69 .bcn_space = REG_MBSSID_BCN_SPACE2_8822B,
70 .bcn_space_shift = 0,
71 .bcn_space_mask = 0xfff,
72 .ps_aid = REG_BCN_PSR_RPT2_8822B,
73 .ta = REG_TRANSMIT_ADDRSS_2_8822B,
74 },
75 /*port 3*/
76 {
77 .net_type = REG_CR_EXT_8822B,
78 .net_type_shift = 2,
79 .macaddr = REG_MACID3_8822B,
80 .bssid = REG_BSSID3_8822B,
81 .bcn_ctl = REG_BCN_CTRL_CLINT2_8822B,
82 .tsf_rst = REG_DUAL_TSF_RST,
83 .tsf_rst_bit = BIT_TSFTR_CLI2_RST_8822B,
84 .bcn_space = REG_MBSSID_BCN_SPACE2_8822B,
85 .bcn_space_shift = 16,
86 .bcn_space_mask = 0xfff,
87 .ps_aid = REG_BCN_PSR_RPT3_8822B,
88 .ta = REG_TRANSMIT_ADDRSS_3_8822B,
89 },
90 /*port 4*/
91 {
92 .net_type = REG_CR_EXT_8822B,
93 .net_type_shift = 4,
94 .macaddr = REG_MACID4_8822B,
95 .bssid = REG_BSSID4_8822B,
96 .bcn_ctl = REG_BCN_CTRL_CLINT3_8822B,
97 .tsf_rst = REG_DUAL_TSF_RST,
98 .tsf_rst_bit = BIT_TSFTR_CLI3_RST_8822B,
99 .bcn_space = REG_MBSSID_BCN_SPACE3_8822B,
100 .bcn_space_shift = 0,
101 .bcn_space_mask = 0xfff,
102 .ps_aid = REG_BCN_PSR_RPT4_8822B,
103 .ta = REG_TRANSMIT_ADDRSS_4_8822B,
104 },
105 };
106
hw_bcn_ctrl_addr(_adapter * adapter,u8 hw_port)107 static u32 hw_bcn_ctrl_addr(_adapter *adapter, u8 hw_port)
108 {
109 struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
110 u32 addr = 0;
111
112 if (hw_port >= hal_spec->port_num) {
113 RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
114 rtw_warn_on(1);
115 goto exit;
116 }
117
118 addr = port_cfg[hw_port].bcn_ctl;
119
120 exit:
121 return addr;
122 }
123
124 #ifdef CONFIG_CLIENT_PORT_CFG
hw_bcn_ctrl_set(_adapter * adapter,u8 hw_port,u8 bcn_ctl_val)125 static void hw_bcn_ctrl_set(_adapter *adapter, u8 hw_port, u8 bcn_ctl_val)
126 {
127 u32 bcn_ctl_addr = 0;
128
129 if (hw_port >= MAX_HW_PORT) {
130 RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
131 rtw_warn_on(1);
132 return;
133 }
134
135 bcn_ctl_addr = port_cfg[hw_port].bcn_ctl;
136 rtw_write8(adapter, bcn_ctl_addr, bcn_ctl_val);
137 }
138 #endif
139
hw_bcn_ctrl_add(_adapter * adapter,u8 hw_port,u8 bcn_ctl_val)140 static void hw_bcn_ctrl_add(_adapter *adapter, u8 hw_port, u8 bcn_ctl_val)
141 {
142 u32 bcn_ctl_addr = 0;
143 u8 val8 = 0;
144
145 if (hw_port >= MAX_HW_PORT) {
146 RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
147 rtw_warn_on(1);
148 return;
149 }
150
151 bcn_ctl_addr = port_cfg[hw_port].bcn_ctl;
152 val8 = rtw_read8(adapter, bcn_ctl_addr) | bcn_ctl_val;
153 rtw_write8(adapter, bcn_ctl_addr, val8);
154 }
155
hw_bcn_ctrl_clr(_adapter * adapter,u8 hw_port,u8 bcn_ctl_val)156 static void hw_bcn_ctrl_clr(_adapter *adapter, u8 hw_port, u8 bcn_ctl_val)
157 {
158 u32 bcn_ctl_addr = 0;
159 u8 val8 = 0;
160
161 if (hw_port >= MAX_HW_PORT) {
162 RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
163 rtw_warn_on(1);
164 return;
165 }
166
167 bcn_ctl_addr = port_cfg[hw_port].bcn_ctl;
168 val8 = rtw_read8(adapter, bcn_ctl_addr);
169 val8 &= ~bcn_ctl_val;
170 rtw_write8(adapter, bcn_ctl_addr, val8);
171 }
172
read_chip_version(PADAPTER adapter)173 static void read_chip_version(PADAPTER adapter)
174 {
175 PHAL_DATA_TYPE hal;
176 u32 value32;
177
178
179 hal = GET_HAL_DATA(adapter);
180
181 value32 = rtw_read32(adapter, REG_SYS_CFG1_8822B);
182 hal->version_id.ICType = CHIP_8822B;
183 hal->version_id.ChipType = ((value32 & BIT_RTL_ID_8822B) ? TEST_CHIP : NORMAL_CHIP);
184 hal->version_id.CUTVersion = BIT_GET_CHIP_VER_8822B(value32);
185 hal->version_id.VendorType = BIT_GET_VENDOR_ID_8822B(value32);
186 hal->version_id.VendorType >>= 2;
187 switch (hal->version_id.VendorType) {
188 case 0:
189 hal->version_id.VendorType = CHIP_VENDOR_TSMC;
190 break;
191 case 1:
192 hal->version_id.VendorType = CHIP_VENDOR_SMIC;
193 break;
194 case 2:
195 hal->version_id.VendorType = CHIP_VENDOR_UMC;
196 break;
197 }
198
199 hal->version_id.RFType = ((value32 & BIT_RF_TYPE_ID_8822B) ? RF_TYPE_2T2R : RF_TYPE_1T1R);
200
201 hal->RegulatorMode = ((value32 & BIT_SPSLDO_SEL_8822B) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR);
202
203 value32 = rtw_read32(adapter, REG_SYS_STATUS1_8822B);
204 hal->version_id.ROMVer = BIT_GET_RF_RL_ID_8822B(value32);
205
206 /* For multi-function consideration. */
207 hal->MultiFunc = RT_MULTI_FUNC_NONE;
208 value32 = rtw_read32(adapter, REG_WL_BT_PWR_CTRL_8822B);
209 hal->MultiFunc |= ((value32 & BIT_WL_FUNC_EN_8822B) ? RT_MULTI_FUNC_WIFI : 0);
210 hal->MultiFunc |= ((value32 & BIT_BT_FUNC_EN_8822B) ? RT_MULTI_FUNC_BT : 0);
211 hal->PolarityCtl = ((value32 & BIT_WL_HWPDN_SL_8822B) ? RT_POLARITY_HIGH_ACT : RT_POLARITY_LOW_ACT);
212
213 dump_chip_info(hal->version_id);
214 }
215
216 /*
217 * Return:
218 * _TRUE valid ID
219 * _FALSE invalid ID
220 */
Hal_EfuseParseIDCode(PADAPTER adapter,u8 * map)221 static u8 Hal_EfuseParseIDCode(PADAPTER adapter, u8 *map)
222 {
223 u16 EEPROMId;
224
225
226 /* Check 0x8129 again for making sure autoload status!! */
227 EEPROMId = le16_to_cpu(*(u16 *)map);
228 RTW_INFO("EEPROM ID = 0x%04x\n", EEPROMId);
229 if (EEPROMId == RTL_EEPROM_ID)
230 return _TRUE;
231
232 RTW_WARN("EEPROM ID is invalid!!\n");
233 return _FALSE;
234 }
235
Hal_EfuseParseEEPROMVer(PADAPTER adapter,u8 * map,u8 mapvalid)236 static void Hal_EfuseParseEEPROMVer(PADAPTER adapter, u8 *map, u8 mapvalid)
237 {
238 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
239
240
241 if (_TRUE == mapvalid)
242 hal->EEPROMVersion = map[EEPROM_VERSION_8822B];
243 else
244 hal->EEPROMVersion = 1;
245
246 RTW_INFO("EEPROM Version = %d\n", hal->EEPROMVersion);
247 }
248
Hal_EfuseParseTxPowerInfo(PADAPTER adapter,u8 * map,u8 mapvalid)249 static void Hal_EfuseParseTxPowerInfo(PADAPTER adapter, u8 *map, u8 mapvalid)
250 {
251 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
252
253 hal->txpwr_pg_mode = TXPWR_PG_WITH_PWR_IDX;
254
255 if ((_TRUE == mapvalid) && (map[EEPROM_RF_BOARD_OPTION_8822B] != 0xFF))
256 hal->EEPROMRegulatory = map[EEPROM_RF_BOARD_OPTION_8822B] & 0x7; /* bit0~2 */
257 else
258 hal->EEPROMRegulatory = EEPROM_DEFAULT_BOARD_OPTION & 0x7; /* bit0~2 */
259 RTW_INFO("EEPROM Regulatory=0x%02x\n", hal->EEPROMRegulatory);
260 }
261
Hal_EfuseParseBoardType(PADAPTER adapter,u8 * map,u8 mapvalid)262 static void Hal_EfuseParseBoardType(PADAPTER adapter, u8 *map, u8 mapvalid)
263 {
264 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
265
266
267 if ((_TRUE == mapvalid) && (map[EEPROM_RF_BOARD_OPTION_8822B] != 0xFF))
268 hal->InterfaceSel = (map[EEPROM_RF_BOARD_OPTION_8822B] & 0xE0) >> 5;
269 else
270 hal->InterfaceSel = (EEPROM_DEFAULT_BOARD_OPTION & 0xE0) >> 5;
271
272 RTW_INFO("EEPROM Board Type=0x%02x\n", hal->InterfaceSel);
273 }
274
Hal_EfuseParseBTCoexistInfo(PADAPTER adapter,u8 * map,u8 mapvalid)275 static void Hal_EfuseParseBTCoexistInfo(PADAPTER adapter, u8 *map, u8 mapvalid)
276 {
277 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
278 u8 setting;
279 u32 tmpu4;
280
281 if ((_TRUE == mapvalid) && (map[EEPROM_RF_BOARD_OPTION_8822B] != 0xFF)) {
282 /* 0xc1[7:5] = 0x01 */
283 if (((map[EEPROM_RF_BOARD_OPTION_8822B] & 0xe0) >> 5) == 0x01)
284 hal->EEPROMBluetoothCoexist = _TRUE;
285 else
286 hal->EEPROMBluetoothCoexist = _FALSE;
287 } else
288 hal->EEPROMBluetoothCoexist = _FALSE;
289
290 hal->EEPROMBluetoothType = BT_RTL8822B;
291
292 setting = map[EEPROM_RF_BT_SETTING_8822B];
293 if ((_TRUE == mapvalid) && (setting != 0xFF)) {
294 hal->EEPROMBluetoothAntNum = setting & BIT(0);
295 /*
296 * EFUSE_0xC3[6] == 0, S1(Main)-RF_PATH_A;
297 * EFUSE_0xC3[6] == 1, S0(Aux)-RF_PATH_B
298 */
299 hal->ant_path = (setting & BIT(6)) ? RF_PATH_B : RF_PATH_A;
300 } else {
301 hal->EEPROMBluetoothAntNum = Ant_x2;
302 hal->ant_path = RF_PATH_A;
303 }
304
305 RTW_INFO("EEPROM %s BT-coex, ant_num=%d\n",
306 hal->EEPROMBluetoothCoexist == _TRUE ? "Enable" : "Disable",
307 hal->EEPROMBluetoothAntNum == Ant_x2 ? 2 : 1);
308 }
309
Hal_EfuseParseChnlPlan(PADAPTER adapter,u8 * map,u8 autoloadfail)310 static void Hal_EfuseParseChnlPlan(PADAPTER adapter, u8 *map, u8 autoloadfail)
311 {
312 hal_com_config_channel_plan(
313 adapter,
314 map ? &map[EEPROM_COUNTRY_CODE_8822B] : NULL,
315 map ? map[EEPROM_ChannelPlan_8822B] : 0xFF,
316 adapter->registrypriv.alpha2,
317 adapter->registrypriv.channel_plan,
318 autoloadfail
319 );
320 }
321
Hal_EfuseParseXtal(PADAPTER adapter,u8 * map,u8 mapvalid)322 static void Hal_EfuseParseXtal(PADAPTER adapter, u8 *map, u8 mapvalid)
323 {
324 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
325
326
327 if ((_TRUE == mapvalid) && map[EEPROM_XTAL_8822B] != 0xFF)
328 hal->crystal_cap = map[EEPROM_XTAL_8822B];
329 else
330 hal->crystal_cap = EEPROM_Default_CrystalCap;
331
332 RTW_INFO("EEPROM crystal_cap=0x%02x\n", hal->crystal_cap);
333 }
334
Hal_EfuseParseThermalMeter(PADAPTER adapter,u8 * map,u8 mapvalid)335 static void Hal_EfuseParseThermalMeter(PADAPTER adapter, u8 *map, u8 mapvalid)
336 {
337 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
338
339
340 /* ThermalMeter from EEPROM */
341 if ((_TRUE == mapvalid) && (map[EEPROM_THERMAL_METER_8822B] != 0xFF))
342 hal->eeprom_thermal_meter = map[EEPROM_THERMAL_METER_8822B];
343 else {
344 hal->eeprom_thermal_meter = EEPROM_Default_ThermalMeter;
345 hal->odmpriv.rf_calibrate_info.is_apk_thermal_meter_ignore = _TRUE;
346 }
347
348 RTW_INFO("EEPROM ThermalMeter=0x%02x\n", hal->eeprom_thermal_meter);
349 }
350
Hal_EfuseParseAntennaDiversity(PADAPTER adapter,u8 * map,u8 mapvalid)351 static void Hal_EfuseParseAntennaDiversity(PADAPTER adapter, u8 *map, u8 mapvalid)
352 {
353 #ifdef CONFIG_ANTENNA_DIVERSITY
354 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
355 struct registry_priv *registry_par = &adapter->registrypriv;
356
357
358 if (hal->EEPROMBluetoothAntNum == Ant_x1)
359 hal->AntDivCfg = 0;
360 else {
361 if (registry_par->antdiv_cfg == 2)/* 0:OFF , 1:ON, 2:By EFUSE */
362 hal->AntDivCfg = 1;
363 else
364 hal->AntDivCfg = registry_par->antdiv_cfg;
365 }
366
367 /* If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. */
368 if (registry_par->antdiv_type == 0) {
369 hal->TRxAntDivType = map[EEPROM_RFE_OPTION_8822B];
370 if (hal->TRxAntDivType == 0xFF)
371 hal->TRxAntDivType = S0S1_SW_ANTDIV; /* internal switch S0S1 */
372 else if (hal->TRxAntDivType == 0x10)
373 hal->TRxAntDivType = S0S1_SW_ANTDIV; /* internal switch S0S1 */
374 else if (hal->TRxAntDivType == 0x11)
375 hal->TRxAntDivType = S0S1_SW_ANTDIV; /* internal switch S0S1 */
376 else
377 RTW_INFO("EEPROM efuse[0x%x]=0x%02x is unknown type\n",
378 EEPROM_RFE_OPTION_8723B, hal->TRxAntDivType);
379 } else
380 hal->TRxAntDivType = registry_par->antdiv_type;
381
382 RTW_INFO("EEPROM AntDivCfg=%d, AntDivType=%d\n",
383 hal->AntDivCfg, hal->TRxAntDivType);
384 #endif /* CONFIG_ANTENNA_DIVERSITY */
385 }
386
Hal_EfuseParseCustomerID(PADAPTER adapter,u8 * map,u8 mapvalid)387 static void Hal_EfuseParseCustomerID(PADAPTER adapter, u8 *map, u8 mapvalid)
388 {
389 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
390
391
392 if (_TRUE == mapvalid)
393 hal->EEPROMCustomerID = map[EEPROM_CustomID_8822B];
394 else
395 hal->EEPROMCustomerID = 0;
396 RTW_INFO("EEPROM Customer ID=0x%02x\n", hal->EEPROMCustomerID);
397 }
398
Hal_DetectWoWMode(PADAPTER adapter)399 static void Hal_DetectWoWMode(PADAPTER adapter)
400 {
401 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
402 adapter_to_pwrctl(adapter)->bSupportRemoteWakeup = _TRUE;
403 #else /* !(CONFIG_WOWLAN || CONFIG_AP_WOWLAN) */
404 adapter_to_pwrctl(adapter)->bSupportRemoteWakeup = _FALSE;
405 #endif /* !(CONFIG_WOWLAN || CONFIG_AP_WOWLAN) */
406
407 RTW_INFO("EEPROM SupportRemoteWakeup=%d\n", adapter_to_pwrctl(adapter)->bSupportRemoteWakeup);
408 }
409
hal_ReadPAType(PADAPTER adapter,u8 * map,u8 mapvalid)410 static void hal_ReadPAType(PADAPTER adapter, u8 *map, u8 mapvalid)
411 {
412 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
413
414 if (mapvalid) {
415 /* AUTO */
416 if (GetRegAmplifierType2G(adapter) == 0) {
417 hal->PAType_2G = ReadLE1Byte(&map[EEPROM_2G_5G_PA_TYPE_8822B]);
418 hal->LNAType_2G = ReadLE1Byte(&map[EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822B]);
419
420 if (hal->PAType_2G == 0xFF)
421 hal->PAType_2G = 0;
422
423 if (hal->LNAType_2G == 0xFF)
424 hal->LNAType_2G = 0;
425
426 hal->ExternalPA_2G = (hal->PAType_2G & BIT4) ? 1 : 0;
427 hal->ExternalLNA_2G = (hal->LNAType_2G & BIT3) ? 1 : 0;
428 } else {
429 hal->ExternalPA_2G = (GetRegAmplifierType2G(adapter) & ODM_BOARD_EXT_PA) ? 1 : 0;
430 hal->ExternalLNA_2G = (GetRegAmplifierType2G(adapter) & ODM_BOARD_EXT_LNA) ? 1 : 0;
431 }
432
433 /* AUTO */
434 if (GetRegAmplifierType5G(adapter) == 0) {
435 hal->PAType_5G = ReadLE1Byte(&map[EEPROM_2G_5G_PA_TYPE_8822B]);
436 hal->LNAType_5G = ReadLE1Byte(&map[EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822B]);
437 if (hal->PAType_5G == 0xFF)
438 hal->PAType_5G = 0;
439 if (hal->LNAType_5G == 0xFF)
440 hal->LNAType_5G = 0;
441
442 hal->external_pa_5g = (hal->PAType_5G & BIT0) ? 1 : 0;
443 hal->external_lna_5g = (hal->LNAType_5G & BIT3) ? 1 : 0;
444 } else {
445 hal->external_pa_5g = (GetRegAmplifierType5G(adapter) & ODM_BOARD_EXT_PA_5G) ? 1 : 0;
446 hal->external_lna_5g = (GetRegAmplifierType5G(adapter) & ODM_BOARD_EXT_LNA_5G) ? 1 : 0;
447 }
448 } else {
449 hal->ExternalPA_2G = EEPROM_Default_PAType;
450 hal->external_pa_5g = 0xFF;
451 hal->ExternalLNA_2G = EEPROM_Default_LNAType;
452 hal->external_lna_5g = 0xFF;
453
454 /* AUTO */
455 if (GetRegAmplifierType2G(adapter) == 0) {
456 hal->ExternalPA_2G = 0;
457 hal->ExternalLNA_2G = 0;
458 } else {
459 hal->ExternalPA_2G = (GetRegAmplifierType2G(adapter) & ODM_BOARD_EXT_PA) ? 1 : 0;
460 hal->ExternalLNA_2G = (GetRegAmplifierType2G(adapter) & ODM_BOARD_EXT_LNA) ? 1 : 0;
461 }
462
463 /* AUTO */
464 if (GetRegAmplifierType5G(adapter) == 0) {
465 hal->external_pa_5g = 0;
466 hal->external_lna_5g = 0;
467 } else {
468 hal->external_pa_5g = (GetRegAmplifierType5G(adapter) & ODM_BOARD_EXT_PA_5G) ? 1 : 0;
469 hal->external_lna_5g = (GetRegAmplifierType5G(adapter) & ODM_BOARD_EXT_LNA_5G) ? 1 : 0;
470 }
471 }
472
473 RTW_INFO("EEPROM PAType_2G is 0x%x, ExternalPA_2G = %d\n", hal->PAType_2G, hal->ExternalPA_2G);
474 RTW_INFO("EEPROM PAType_5G is 0x%x, external_pa_5g = %d\n", hal->PAType_5G, hal->external_pa_5g);
475 RTW_INFO("EEPROM LNAType_2G is 0x%x, ExternalLNA_2G = %d\n", hal->LNAType_2G, hal->ExternalLNA_2G);
476 RTW_INFO("EEPROM LNAType_5G is 0x%x, external_lna_5g = %d\n", hal->LNAType_5G, hal->external_lna_5g);
477 }
478
Hal_ReadAmplifierType(PADAPTER adapter,u8 * map,u8 mapvalid)479 static void Hal_ReadAmplifierType(PADAPTER adapter, u8 *map, u8 mapvalid)
480 {
481 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
482 u8 extTypePA_2G_A = (map[EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822B] & BIT2) >> 2;
483 u8 extTypePA_2G_B = (map[EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822B] & BIT6) >> 6;
484 u8 extTypePA_5G_A = (map[EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822B] & BIT2) >> 2;
485 u8 extTypePA_5G_B = (map[EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822B] & BIT6) >> 6;
486 u8 extTypeLNA_2G_A = (map[EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822B] & (BIT1 | BIT0)) >> 0;
487 u8 extTypeLNA_2G_B = (map[EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822B] & (BIT5 | BIT4)) >> 4;
488 u8 extTypeLNA_5G_A = (map[EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822B] & (BIT1 | BIT0)) >> 0;
489 u8 extTypeLNA_5G_B = (map[EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822B] & (BIT5 | BIT4)) >> 4;
490
491 hal_ReadPAType(adapter, map, mapvalid);
492
493 /* [2.4G] Path A and B are both extPA */
494 if ((hal->PAType_2G & (BIT5 | BIT4)) == (BIT5 | BIT4))
495 hal->TypeGPA = extTypePA_2G_B << 2 | extTypePA_2G_A;
496
497 /* [5G] Path A and B are both extPA */
498 if ((hal->PAType_5G & (BIT1 | BIT0)) == (BIT1 | BIT0))
499 hal->TypeAPA = extTypePA_5G_B << 2 | extTypePA_5G_A;
500
501 /* [2.4G] Path A and B are both extLNA */
502 if ((hal->LNAType_2G & (BIT7 | BIT3)) == (BIT7 | BIT3))
503 hal->TypeGLNA = extTypeLNA_2G_B << 2 | extTypeLNA_2G_A;
504
505 /* [5G] Path A and B are both extLNA */
506 if ((hal->LNAType_5G & (BIT7 | BIT3)) == (BIT7 | BIT3))
507 hal->TypeALNA = extTypeLNA_5G_B << 2 | extTypeLNA_5G_A;
508
509 RTW_INFO("EEPROM TypeGPA = 0x%X\n", hal->TypeGPA);
510 RTW_INFO("EEPROM TypeAPA = 0x%X\n", hal->TypeAPA);
511 RTW_INFO("EEPROM TypeGLNA = 0x%X\n", hal->TypeGLNA);
512 RTW_INFO("EEPROM TypeALNA = 0x%X\n", hal->TypeALNA);
513 }
514
Hal_ReadRFEType(PADAPTER adapter,u8 * map,u8 mapvalid)515 static u8 Hal_ReadRFEType(PADAPTER adapter, u8 *map, u8 mapvalid)
516 {
517 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
518
519
520 /* check registry value */
521 if (GetRegRFEType(adapter) != CONFIG_RTW_RFE_TYPE) {
522 hal->rfe_type = GetRegRFEType(adapter);
523 goto exit;
524 }
525
526 if (mapvalid) {
527 /* check efuse map */
528 hal->rfe_type = ReadLE1Byte(&map[EEPROM_RFE_OPTION_8822B]);
529 if (0xFF != hal->rfe_type)
530 goto exit;
531 }
532
533 /* error handle */
534 hal->rfe_type = 0;
535
536 /* If ignore incorrect rfe_type may cause card drop. */
537 /* it's DIFFICULT do debug especially on COB project */
538 RTW_ERR("\n\nEmpty EFUSE with unknown REF type!!\n\n");
539 RTW_ERR("please program efuse or specify correct RFE type.\n");
540 RTW_ERR("cmd: insmod rtl8822bx.ko rtw_RFE_type=<rfe_type>\n\n");
541
542 return _FAIL;
543
544 exit:
545 RTW_INFO("EEPROM rfe_type=0x%x\n", hal->rfe_type);
546 return _SUCCESS;
547 }
548
Hal_EfuseParsePackageType(PADAPTER adapter,u8 * map,u8 mapvalid)549 static void Hal_EfuseParsePackageType(PADAPTER adapter, u8 *map, u8 mapvalid)
550 {
551 }
552
Hal_EfuseParsePABias(PADAPTER adapter)553 static void Hal_EfuseParsePABias(PADAPTER adapter)
554 {
555 struct hal_com_data *hal;
556 u8 data[2] = {0xFF, 0xFF};
557 u8 ret;
558
559
560 ret = rtw_efuse_access(adapter, 0, 0x3D7, 2, data);
561 if (_FAIL == ret) {
562 RTW_ERR("%s: Fail to read PA Bias from eFuse!\n", __FUNCTION__);
563 return;
564 }
565
566 hal = GET_HAL_DATA(adapter);
567 hal->efuse0x3d7 = data[0]; /* efuse[0x3D7] */
568 hal->efuse0x3d8 = data[1]; /* efuse[0x3D8] */
569
570 RTW_INFO("EEPROM efuse[0x3D7]=0x%x\n", hal->efuse0x3d7);
571 RTW_INFO("EEPROM efuse[0x3D8]=0x%x\n", hal->efuse0x3d8);
572 }
573
574
575 #ifdef CONFIG_USB_HCI
Hal_ReadUsbModeSwitch(PADAPTER adapter,u8 * map,u8 mapvalid)576 static void Hal_ReadUsbModeSwitch(PADAPTER adapter, u8 *map, u8 mapvalid)
577 {
578 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
579
580 if (_TRUE == mapvalid)
581 /* check efuse 0x06 bit7 */
582 hal->EEPROMUsbSwitch = (map[EEPROM_USB_MODE_8822BU] & BIT7) >> 7;
583 else
584 hal->EEPROMUsbSwitch = _FALSE;
585
586 RTW_INFO("EEPROM USB Switch=%d\n", hal->EEPROMUsbSwitch);
587 }
588
hal_read_usb_pid_vid(PADAPTER adapter,u8 * map,u8 mapvalid)589 static void hal_read_usb_pid_vid(PADAPTER adapter, u8 *map, u8 mapvalid)
590 {
591 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
592
593 if (_TRUE == mapvalid) {
594 /* VID, PID */
595 hal->EEPROMVID = ReadLE2Byte(&map[EEPROM_VID_8822BU]);
596 hal->EEPROMPID = ReadLE2Byte(&map[EEPROM_PID_8822BU]);
597 } else {
598 hal->EEPROMVID = EEPROM_Default_VID;
599 hal->EEPROMPID = EEPROM_Default_PID;
600 }
601
602 RTW_INFO("EEPROM VID = 0x%04X, PID = 0x%04X\n", hal->EEPROMVID, hal->EEPROMPID);
603 }
604
605 #endif /* CONFIG_USB_HCI */
606
607 /*
608 * Description:
609 * Collect all information from efuse or files.
610 * This function will do
611 * 1. Read registers to check hardware efuse available or not
612 * 2. Read Efuse/EEPROM
613 * 3. Read file if necessary
614 * 4. Parsing Efuse data
615 */
rtl8822b_read_efuse(PADAPTER adapter)616 u8 rtl8822b_read_efuse(PADAPTER adapter)
617 {
618 PHAL_DATA_TYPE hal;
619 u8 val8;
620 u8 *efuse_map = NULL;
621 u8 valid;
622 u8 ret = _FAIL;
623
624 hal = GET_HAL_DATA(adapter);
625 efuse_map = hal->efuse_eeprom_data;
626
627 /* 1. Read registers to check hardware eFuse available or not */
628 val8 = rtw_read8(adapter, REG_SYS_EEPROM_CTRL_8822B);
629 hal->EepromOrEfuse = (val8 & BIT_EERPOMSEL_8822B) ? _TRUE : _FALSE;
630 hal->bautoload_fail_flag = (val8 & BIT_AUTOLOAD_SUS_8822B) ? _FALSE : _TRUE;
631 /*
632 * In 8822B, bautoload_fail_flag is used to present eFuse map is valid
633 * or not, no matter the map comes from hardware or files.
634 */
635
636 /* 2. Read eFuse */
637 EFUSE_ShadowMapUpdate(adapter, EFUSE_WIFI, 0);
638
639 /* 3. Read Efuse file if necessary */
640 #ifdef CONFIG_EFUSE_CONFIG_FILE
641 if (check_phy_efuse_tx_power_info_valid(adapter) == _FALSE) {
642 if (Hal_readPGDataFromConfigFile(adapter) != _SUCCESS)
643 RTW_WARN("%s: invalid phy efuse and read from file fail, will use driver default!!\n", __FUNCTION__);
644 }
645 #endif /* CONFIG_EFUSE_CONFIG_FILE */
646
647 /* 4. Parse Efuse data */
648 valid = Hal_EfuseParseIDCode(adapter, efuse_map);
649 if (_TRUE == valid)
650 hal->bautoload_fail_flag = _FALSE;
651 else
652 hal->bautoload_fail_flag = _TRUE;
653
654 Hal_EfuseParseEEPROMVer(adapter, efuse_map, valid);
655 hal_config_macaddr(adapter, hal->bautoload_fail_flag);
656 Hal_EfuseParseTxPowerInfo(adapter, efuse_map, valid);
657 Hal_EfuseParseBoardType(adapter, efuse_map, valid);
658 Hal_EfuseParseBTCoexistInfo(adapter, efuse_map, valid);
659 Hal_EfuseParseChnlPlan(adapter, efuse_map, hal->bautoload_fail_flag);
660 Hal_EfuseParseXtal(adapter, efuse_map, valid);
661 Hal_EfuseParseThermalMeter(adapter, efuse_map, valid);
662 Hal_EfuseParseAntennaDiversity(adapter, efuse_map, valid);
663 Hal_EfuseParseCustomerID(adapter, efuse_map, valid);
664 Hal_DetectWoWMode(adapter);
665 Hal_ReadAmplifierType(adapter, efuse_map, valid);
666 if (Hal_ReadRFEType(adapter, efuse_map, valid) != _SUCCESS)
667 goto exit;
668
669 /* Data out of Efuse Map */
670 Hal_EfuseParsePackageType(adapter, efuse_map, valid);
671 Hal_EfuseParsePABias(adapter);
672
673 #ifdef CONFIG_USB_HCI
674 Hal_ReadUsbModeSwitch(adapter, efuse_map, valid);
675 hal_read_usb_pid_vid(adapter, efuse_map, valid);
676 #endif /* CONFIG_USB_HCI */
677
678 /* set coex. ant info once efuse parsing is done */
679 rtw_btcoex_set_ant_info(adapter);
680
681 hal_read_mac_hidden_rpt(adapter);
682 {
683 struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
684
685 if (hal_spec->hci_type <= 3 && hal_spec->hci_type >= 1) {
686 hal->EEPROMBluetoothCoexist = _FALSE;
687 RTW_INFO("EEPROM Disable BT-coex by hal_spec\n");
688 rtw_btcoex_wifionly_AntInfoSetting(adapter);
689 }
690 }
691
692 rtw_phydm_read_efuse(adapter);
693
694 ret = _SUCCESS;
695
696 exit:
697 return ret;
698 }
699
rtl8822b_run_thread(PADAPTER adapter)700 void rtl8822b_run_thread(PADAPTER adapter)
701 {
702 }
703
rtl8822b_cancel_thread(PADAPTER adapter)704 void rtl8822b_cancel_thread(PADAPTER adapter)
705 {
706 }
707
708 /*
709 * Description:
710 * Using 0x100 to check the power status of FW.
711 */
check_ips_status(PADAPTER adapter)712 static u8 check_ips_status(PADAPTER adapter)
713 {
714 u8 val8;
715
716
717 RTW_INFO(FUNC_ADPT_FMT ": Read 0x100=0x%02x 0x86=0x%02x\n",
718 FUNC_ADPT_ARG(adapter),
719 rtw_read8(adapter, 0x100), rtw_read8(adapter, 0x86));
720
721 val8 = rtw_read8(adapter, 0x100);
722 if (val8 == 0xEA)
723 return _TRUE;
724
725 return _FALSE;
726 }
727
InitBeaconParameters(PADAPTER adapter)728 static void InitBeaconParameters(PADAPTER adapter)
729 {
730 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
731 u16 val16;
732 u8 val8;
733
734
735 val8 = BIT_DIS_TSF_UDT_8822B;
736 val16 = val8 | (val8 << 8); /* port0 and port1 */
737 #ifdef CONFIG_BT_COEXIST
738 if (hal->EEPROMBluetoothCoexist)
739 /* Enable port0 beacon function for PSTDMA under BTCOEX */
740 val16 |= EN_BCN_FUNCTION;
741 #endif
742 rtw_write16(adapter, REG_BCN_CTRL_8822B, val16);
743
744 /* TBTT setup time */
745 rtw_write8(adapter, REG_TBTT_PROHIBIT_8822B, TBTT_PROHIBIT_SETUP_TIME);
746
747 /* TBTT hold time: 0x540[19:8] */
748 rtw_write8(adapter, REG_TBTT_PROHIBIT_8822B + 1, TBTT_PROHIBIT_HOLD_TIME_STOP_BCN & 0xFF);
749 rtw_write8(adapter, REG_TBTT_PROHIBIT_8822B + 2,
750 (rtw_read8(adapter, REG_TBTT_PROHIBIT_8822B + 2) & 0xF0) | (TBTT_PROHIBIT_HOLD_TIME_STOP_BCN >> 8));
751
752 rtw_write8(adapter, REG_DRVERLYINT_8822B, DRIVER_EARLY_INT_TIME_8822B); /* 5ms */
753 rtw_write8(adapter, REG_BCNDMATIM_8822B, BCN_DMA_ATIME_INT_TIME_8822B); /* 2ms */
754
755 /*
756 * Suggested by designer timchen. Change beacon AIFS to the largest number
757 * beacause test chip does not contension before sending beacon.
758 */
759 rtw_write16(adapter, REG_BCNTCFG_8822B, 0x4413);
760 }
761
beacon_function_enable(PADAPTER adapter,u8 Enable,u8 Linked)762 static void beacon_function_enable(PADAPTER adapter, u8 Enable, u8 Linked)
763 {
764 u8 val8;
765 u32 bcn_ctrl_reg;
766
767 /* port0 */
768 bcn_ctrl_reg = REG_BCN_CTRL_8822B;
769 val8 = BIT_DIS_TSF_UDT_8822B | BIT_EN_BCN_FUNCTION_8822B;
770 #ifdef CONFIG_CONCURRENT_MODE
771 /* port1 */
772 if (adapter->hw_port == HW_PORT1) {
773 bcn_ctrl_reg = REG_BCN_CTRL_CLINT0_8822B;
774 val8 = BIT_CLI0_DIS_TSF_UDT_8822B | BIT_CLI0_EN_BCN_FUNCTION_8822B;
775 }
776 #endif
777
778 rtw_write8(adapter, bcn_ctrl_reg, val8);
779 rtw_write8(adapter, REG_RD_CTRL_8822B + 1, 0x6F);
780 }
781
set_beacon_related_registers(PADAPTER adapter)782 static void set_beacon_related_registers(PADAPTER adapter)
783 {
784 u8 val8;
785 u32 value32;
786 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
787 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
788 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
789 u32 bcn_ctrl_reg, bcn_interval_reg;
790
791
792 /* reset TSF, enable update TSF, correcting TSF On Beacon */
793 /*
794 * REG_MBSSID_BCN_SPACE
795 * REG_BCNDMATIM
796 * REG_ATIMWND
797 * REG_TBTT_PROHIBIT
798 * REG_DRVERLYINT
799 * REG_BCN_MAX_ERR
800 * REG_BCNTCFG (0x510)
801 * REG_DUAL_TSF_RST
802 * REG_BCN_CTRL (0x550)
803 */
804
805 bcn_ctrl_reg = REG_BCN_CTRL_8822B;
806 #ifdef CONFIG_CONCURRENT_MODE
807 if (adapter->hw_port == HW_PORT1)
808 bcn_ctrl_reg = REG_BCN_CTRL_CLINT0_8822B;
809 #endif
810
811 /*
812 * ATIM window
813 */
814 rtw_write16(adapter, REG_ATIMWND_8822B, 2);
815
816 /*
817 * Beacon interval (in unit of TU).
818 */
819 rtw_hal_set_hwreg(adapter, HW_VAR_BEACON_INTERVAL, (u8 *)&pmlmeinfo->bcn_interval);
820
821 InitBeaconParameters(adapter);
822
823 rtw_write8(adapter, REG_SLOT_8822B, 0x09);
824
825 /* Reset TSF Timer to zero */
826 val8 = BIT_TSFTR_RST_8822B;
827 #ifdef CONFIG_CONCURRENT_MODE
828 if (adapter->hw_port == HW_PORT1)
829 val8 = BIT_TSFTR_CLI0_RST_8822B;
830 #endif
831 rtw_write8(adapter, REG_DUAL_TSF_RST_8822B, val8);
832 val8 = BIT_TSFTR_RST_8822B;
833 rtw_write8(adapter, REG_DUAL_TSF_RST_8822B, val8);
834
835 rtw_write8(adapter, REG_RXTSF_OFFSET_CCK_8822B, 0x50);
836 rtw_write8(adapter, REG_RXTSF_OFFSET_OFDM_8822B, 0x50);
837
838 beacon_function_enable(adapter, _TRUE, _TRUE);
839
840 ResumeTxBeacon(adapter);
841 }
842
843 #ifdef DBG_CONFIG_ERROR_DETECT
xmit_status_check(PADAPTER p)844 static void xmit_status_check(PADAPTER p)
845 {
846 PHAL_DATA_TYPE hal = GET_HAL_DATA(p);
847 struct sreset_priv *psrtpriv = &hal->srestpriv;
848 struct xmit_priv *pxmitpriv = &p->xmitpriv;
849 systime current_time = 0;
850 unsigned int diff_time = 0;
851 u32 txdma_status = 0;
852
853 txdma_status = rtw_read32(p, REG_TXDMA_STATUS_8822B);
854 if (txdma_status != 0x00) {
855 RTW_INFO("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status);
856 psrtpriv->tx_dma_status_cnt++;
857 psrtpriv->self_dect_case = 4;
858 rtw_hal_sreset_reset(p);
859 }
860 #ifdef CONFIG_USB_HCI
861 current_time = rtw_get_current_time();
862
863 if (0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) {
864 diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time);
865
866 if (diff_time > 2000) {
867 if (psrtpriv->last_tx_complete_time == 0)
868 psrtpriv->last_tx_complete_time = current_time;
869 else {
870 diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time);
871 if (diff_time > 4000) {
872 u32 ability = 0;
873
874 ability = rtw_phydm_ability_get(p);
875
876 RTW_INFO("%s tx hang %s\n", __FUNCTION__,
877 (ability & ODM_BB_ADAPTIVITY) ? "ODM_BB_ADAPTIVITY" : "");
878
879 if (!(ability & ODM_BB_ADAPTIVITY)) {
880 psrtpriv->self_dect_tx_cnt++;
881 psrtpriv->self_dect_case = 1;
882 rtw_hal_sreset_reset(p);
883 }
884 }
885 }
886 }
887 }
888 #endif /* CONFIG_USB_HCI */
889
890 if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) {
891 psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
892 rtw_hal_sreset_reset(p);
893 return;
894 }
895 }
896 #ifdef CONFIG_USB_HCI
check_rx_count(PADAPTER p)897 static void check_rx_count(PADAPTER p)
898 {
899 PHAL_DATA_TYPE hal = GET_HAL_DATA(p);
900 struct sreset_priv *psrtpriv = &hal->srestpriv;
901 u16 cur_mac_rxff_ptr;
902
903 cur_mac_rxff_ptr = rtw_read16(p, REG_RXFF_PTR_V1_8822B);
904
905 #if 0
906 RTW_INFO("%s,psrtpriv->last_mac_rxff_ptr = %d , cur_mac_rxff_ptr = %d\n", __func__, psrtpriv->last_mac_rxff_ptr, cur_mac_rxff_ptr);
907 #endif
908
909 if (psrtpriv->last_mac_rxff_ptr == cur_mac_rxff_ptr) {
910 psrtpriv->rx_cnt++;
911 #if 0
912 RTW_INFO("%s,MAC case rx_cnt=%d\n", __func__, psrtpriv->rx_cnt);
913 #endif
914 goto exit;
915 }
916
917 psrtpriv->rx_cnt = 0;
918
919 exit:
920
921 psrtpriv->last_mac_rxff_ptr = cur_mac_rxff_ptr;
922
923 if (psrtpriv->rx_cnt > 3) {
924 psrtpriv->self_dect_case = 2;
925 psrtpriv->self_dect_rx_cnt++;
926 rtw_hal_sreset_reset(p);
927 }
928 }
929 #endif/*#ifdef CONFIG_USB_HCI*/
linked_status_check(PADAPTER p)930 static void linked_status_check(PADAPTER p)
931 {
932 PHAL_DATA_TYPE hal = GET_HAL_DATA(p);
933 struct sreset_priv *psrtpriv = &hal->srestpriv;
934 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(p);
935 u32 rx_dma_status = 0;
936
937 rx_dma_status = rtw_read32(p, REG_RXDMA_STATUS_8822B);
938 if (rx_dma_status != 0x00) {
939 RTW_INFO("%s REG_RXDMA_STATUS:0x%08x\n", __FUNCTION__, rx_dma_status);
940 psrtpriv->rx_dma_status_cnt++;
941 psrtpriv->self_dect_case = 5;
942 #ifdef CONFIG_USB_HCI
943 rtw_hal_sreset_reset(p);
944 #endif /* CONFIG_USB_HCI */
945 }
946
947 if (psrtpriv->self_dect_fw) {
948 psrtpriv->self_dect_case = 3;
949 #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
950 rtw_hal_sreset_reset(p);
951 #endif /* CONFIG_USB_HCI || CONFIG_PCI_HCI */
952 }
953
954 #ifdef CONFIG_USB_HCI
955 check_rx_count(p);
956 #endif /* CONFIG_USB_HCI */
957
958 if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) {
959 psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
960 rtw_hal_sreset_reset(p);
961 return;
962 }
963 }
964 #endif /* DBG_CONFIG_ERROR_DETECT */
965
set_opmode_monitor(PADAPTER adapter)966 static void set_opmode_monitor(PADAPTER adapter)
967 {
968 u32 rcr_bits;
969 u16 value_rxfltmap2;
970 struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
971
972
973 /* Receive all type */
974 rcr_bits = BIT_AAP_8822B | BIT_APM_8822B | BIT_AM_8822B
975 | BIT_AB_8822B | BIT_APWRMGT_8822B
976 | BIT_APP_PHYSTS_8822B;
977
978 #ifndef CONFIG_CUSTOMER_ALIBABA_GENERAL
979 /* Append FCS */
980 rcr_bits |= BIT_APP_FCS_8822B;
981 #endif
982
983 rtw_hal_get_hwreg(adapter, HW_VAR_RCR, (u8 *)&GET_HAL_DATA(adapter)->rcr_backup);
984 rtw_hal_set_hwreg(adapter, HW_VAR_RCR, (u8 *)&rcr_bits);
985
986 /* Receive all data frames */
987 value_rxfltmap2 = 0xFFFF;
988 rtw_write16(adapter, REG_RXFLTMAP2_8822B, value_rxfltmap2);
989 }
990
set_opmode_port0(PADAPTER adapter,u8 mode)991 static void set_opmode_port0(PADAPTER adapter, u8 mode)
992 {
993 u8 is_tx_bcn;
994 u8 val8;
995 u16 val16;
996 u32 val32;
997
998
999 #ifdef CONFIG_CONCURRENT_MODE
1000 is_tx_bcn = rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter);
1001 #else /* !CONFIG_CONCURRENT_MODE */
1002 is_tx_bcn = 0;
1003 #endif /* !CONFIG_CONCURRENT_MODE */
1004
1005 /* disable Port0 TSF update */
1006 rtw_iface_disable_tsf_update(adapter);
1007
1008 Set_MSR(adapter, mode);
1009
1010 RTW_INFO(FUNC_ADPT_FMT ": hw_port(%d) mode=%d\n",
1011 FUNC_ADPT_ARG(adapter), adapter->hw_port, mode);
1012
1013 switch (mode) {
1014 case _HW_STATE_NOLINK_:
1015 case _HW_STATE_STATION_:
1016 if (!is_tx_bcn) {
1017 StopTxBeacon(adapter);
1018 #ifdef CONFIG_PCI_HCI
1019 UpdateInterruptMask8822BE(adapter, 0, 0, RT_BCN_INT_MASKS, 0);
1020 #endif /* CONFIG_PCI_HCI */
1021 }
1022
1023 /* disable beacon function */
1024 val8 = BIT_DIS_TSF_UDT_8822B | BIT_EN_BCN_FUNCTION_8822B;
1025 rtw_write8(adapter, REG_BCN_CTRL_8822B, val8);
1026
1027 /* disable atim wnd(only for Port0) */
1028 val8 = rtw_read8(adapter, REG_DIS_ATIM_8822B);
1029 val8 |= BIT_DIS_ATIM_ROOT_8822B;
1030 rtw_write8(adapter, REG_DIS_ATIM_8822B, val8);
1031 break;
1032
1033 case _HW_STATE_ADHOC_:
1034 ResumeTxBeacon(adapter);
1035 val8 = BIT_DIS_TSF_UDT_8822B | BIT_EN_BCN_FUNCTION_8822B;
1036 rtw_write8(adapter, REG_BCN_CTRL_8822B, val8);
1037 break;
1038
1039 case _HW_STATE_AP_:
1040 #ifdef CONFIG_PCI_HCI
1041 UpdateInterruptMask8822BE(adapter, RT_BCN_INT_MASKS, 0, 0, 0);
1042 #endif /* CONFIG_PCI_HCI */
1043
1044 /*
1045 * enable BCN0 Function for if1
1046 * disable update TSF0 for if1
1047 * enable TX BCN report:
1048 * Reg REG_FWHW_TXQ_CTRL_8822B [2] = 1
1049 * Reg REG_BCN_CTRL_8822B[3][5] = 1
1050 * Enable ATIM
1051 * Enable HW seq for BCN
1052 */
1053 /* enable TX BCN report */
1054 /* disable RX BCN report */
1055 val8 = rtw_read8(adapter, REG_FWHW_TXQ_CTRL_8822B);
1056 val8 |= BIT_EN_BCN_TRXRPT_V1_8822B;
1057 rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822B, val8);
1058
1059 /* enable BCN0 Function */
1060 val8 = rtw_read8(adapter, REG_BCN_CTRL_8822B);
1061 val8 |= BIT_EN_BCN_FUNCTION_8822B | BIT_DIS_TSF_UDT_8822B | BIT_P0_EN_TXBCN_RPT_8822B;
1062 val8 &= (~BIT_P0_EN_RXBCN_RPT_8822B);
1063 rtw_write8(adapter, REG_BCN_CTRL_8822B, val8);
1064
1065 /* Enable ATIM */
1066 val8 = rtw_read8(adapter, REG_DIS_ATIM_8822B);
1067 val8 &= ~BIT_DIS_ATIM_ROOT_8822B;
1068 rtw_write8(adapter, REG_DIS_ATIM_8822B, val8);
1069
1070 /* Enable HW seq for BCN
1071 0x4FC[0]: EN_HWSEQ
1072 = 0x4FC[1]: EN_HWSEQEXT
1073 According TX desc
1074 */
1075 rtw_write8(adapter, REG_DUMMY_PAGE4_V1_8822B, 0x01);
1076
1077 /* enable to rx data frame */
1078 rtw_write16(adapter, REG_RXFLTMAP2_8822B, 0xFFFF);
1079
1080 /* enable to rx ps-poll */
1081 val16 = rtw_read16(adapter, REG_RXFLTMAP1_8822B);
1082 val16 |= BIT_CTRLFLT10EN_8822B;
1083 rtw_write16(adapter, REG_RXFLTMAP1_8822B, val16);
1084
1085 /* Beacon Control related register for first time */
1086 rtw_write8(adapter, REG_BCNDMATIM_8822B, 0x02); /* 2ms */
1087
1088 rtw_write8(adapter, REG_ATIMWND_8822B, 0x0c); /* 12ms */
1089
1090
1091 rtw_write16(adapter, REG_TSFTR_SYN_OFFSET_8822B, 0x7fff); /* +32767 (~32ms) */
1092
1093 /* reset TSF */
1094 rtw_write8(adapter, REG_DUAL_TSF_RST_8822B, BIT_TSFTR_RST_8822B);
1095
1096 /* SW_BCN_SEL - Port0 */
1097 rtw_hal_set_hwreg(adapter, HW_VAR_DL_BCN_SEL, NULL);
1098
1099 /* select BCN on port 0 */
1100 val8 = rtw_read8(adapter, REG_CCK_CHECK_8822B);
1101 val8 &= ~BIT_BCN_PORT_SEL_8822B;
1102 rtw_write8(adapter, REG_CCK_CHECK_8822B, val8);
1103 break;
1104 }
1105 }
1106
set_opmode_port1(PADAPTER adapter,u8 mode)1107 static void set_opmode_port1(PADAPTER adapter, u8 mode)
1108 {
1109 #ifdef CONFIG_CONCURRENT_MODE
1110 u8 is_tx_bcn;
1111 u8 val8;
1112
1113 is_tx_bcn = rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter);
1114
1115 /* disable Port1 TSF update */
1116 rtw_iface_disable_tsf_update(adapter);
1117
1118 Set_MSR(adapter, mode);
1119
1120 RTW_INFO(FUNC_ADPT_FMT ": hw_port(%d) mode=%d\n",
1121 FUNC_ADPT_ARG(adapter), adapter->hw_port, mode);
1122
1123 switch (mode) {
1124 case _HW_STATE_NOLINK_:
1125 case _HW_STATE_STATION_:
1126 if (!is_tx_bcn) {
1127 StopTxBeacon(adapter);
1128 #ifdef CONFIG_PCI_HCI
1129 UpdateInterruptMask8822BE(adapter, 0, 0, RT_BCN_INT_MASKS, 0);
1130 #endif /* CONFIG_PCI_HCI */
1131 }
1132
1133 /* disable beacon function */
1134 val8 = BIT_CLI0_DIS_TSF_UDT_8822B | BIT_CLI0_EN_BCN_FUNCTION_8822B;
1135 rtw_write8(adapter, REG_BCN_CTRL_CLINT0_8822B, val8);
1136 break;
1137
1138 case _HW_STATE_ADHOC_:
1139 ResumeTxBeacon(adapter);
1140 val8 = BIT_CLI0_DIS_TSF_UDT_8822B | BIT_CLI0_EN_BCN_FUNCTION_8822B;
1141 rtw_write8(adapter, REG_BCN_CTRL_CLINT0_8822B, val8);
1142 break;
1143
1144 case _HW_STATE_AP_:
1145 #ifdef CONFIG_PCI_HCI
1146 UpdateInterruptMask8822BE(adapter, RT_BCN_INT_MASKS, 0, 0, 0);
1147 #endif /* CONFIG_PCI_HCI */
1148
1149 /* ToDo */
1150 break;
1151 }
1152 #endif /* CONFIG_CONCURRENT_MODE */
1153 }
hw_tsf_reset(_adapter * adapter)1154 void hw_tsf_reset(_adapter *adapter)
1155 {
1156 u8 hw_port = rtw_hal_get_port(adapter);
1157 u32 tsf_rst_addr = 0;
1158 u8 tsf_rst_bit = 0;
1159
1160 if (hw_port >= MAX_HW_PORT) {
1161 RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
1162 rtw_warn_on(1);
1163 return;
1164 }
1165
1166 tsf_rst_addr = port_cfg[hw_port].tsf_rst;
1167 tsf_rst_bit = port_cfg[hw_port].tsf_rst_bit;
1168 rtw_write8(adapter, tsf_rst_addr, tsf_rst_bit);
1169 }
hw_set_ta(_adapter * adapter,u8 hw_port,u8 * val)1170 void hw_set_ta(_adapter *adapter, u8 hw_port, u8 *val)
1171 {
1172 u8 idx = 0;
1173 u32 reg = port_cfg[hw_port].ta;
1174
1175 for (idx = 0 ; idx < ETH_ALEN; idx++)
1176 rtw_write8(adapter, (reg + idx), val[idx]);
1177
1178 RTW_INFO("%s("ADPT_FMT") hw port -%d TA: "MAC_FMT"\n",
1179 __func__, ADPT_ARG(adapter), hw_port, MAC_ARG(val));
1180 }
hw_set_aid(_adapter * adapter,u8 hw_port,u8 aid)1181 void hw_set_aid(_adapter *adapter, u8 hw_port, u8 aid)
1182 {
1183 rtw_write16(adapter, port_cfg[hw_port].ps_aid, (0xF800 | aid));
1184 RTW_INFO("%s("ADPT_FMT") hw port -%d AID: %d\n",
1185 __func__, ADPT_ARG(adapter), hw_port, aid);
1186 }
1187 #ifdef CONFIG_CLIENT_PORT_CFG
rtw_hw_client_port_cfg(_adapter * adapter)1188 void rtw_hw_client_port_cfg(_adapter *adapter)
1189 {
1190 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
1191 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
1192 u8 clt_port = get_clt_port(adapter);
1193
1194 if (clt_port == CLT_PORT_INVALID)
1195 return;
1196 RTW_INFO("%s ("ADPT_FMT")\n", __func__, ADPT_ARG(adapter));
1197
1198 /*Network type*/
1199 rtw_halmac_set_network_type(adapter_to_dvobj(adapter), clt_port, _HW_STATE_STATION_);
1200 /*A1*/
1201 rtw_halmac_set_mac_address(adapter_to_dvobj(adapter), clt_port, adapter_mac_addr(adapter));
1202 /*A2*/
1203 hw_set_ta(adapter, clt_port, pmlmeinfo->network.MacAddress);
1204 /*A3*/
1205 rtw_halmac_set_bssid(adapter_to_dvobj(adapter), clt_port, pmlmeinfo->network.MacAddress);
1206 /*Beacon space*/
1207 rtw_halmac_set_bcn_interval(adapter_to_dvobj(adapter), clt_port, pmlmeinfo->bcn_interval);
1208 /*AID*/
1209 hw_set_aid(adapter, clt_port, pmlmeinfo->aid);
1210 /*Beacon control*/
1211 hw_bcn_ctrl_set(adapter, clt_port, (BIT_P0_EN_RXBCN_RPT | BIT_EN_BCN_FUNCTION));
1212
1213 RTW_INFO("%s ("ADPT_FMT") clt_port:%d\n", __func__, ADPT_ARG(adapter), clt_port);
1214 }
1215
1216 /*#define DBG_TSF_MONITOR*/
rtw_hw_client_port_clr(_adapter * adapter)1217 void rtw_hw_client_port_clr(_adapter *adapter)
1218 {
1219 u8 null_addr[ETH_ALEN] = {0};
1220 u8 clt_port = get_clt_port(adapter);
1221
1222 if (clt_port == CLT_PORT_INVALID)
1223 return;
1224 RTW_INFO("%s ("ADPT_FMT") ==> \n", __func__, ADPT_ARG(adapter));
1225
1226 #ifdef DBG_TSF_MONITOR
1227 /*Beacon control*/
1228 hw_bcn_ctrl_clr(adapter, clt_port, BIT_EN_BCN_FUNCTION);
1229 hw_tsf_reset(adapter);
1230 #endif
1231
1232 /*Network type*/
1233 rtw_halmac_set_network_type(adapter_to_dvobj(adapter), clt_port, _HW_STATE_NOLINK_);
1234 /*A1*/
1235 rtw_halmac_set_mac_address(adapter_to_dvobj(adapter), clt_port, null_addr);
1236 /*A2*/
1237 hw_set_ta(adapter, clt_port, null_addr);
1238 /*A3*/
1239 rtw_halmac_set_bssid(adapter_to_dvobj(adapter), clt_port, null_addr);
1240
1241 #ifdef DBG_TSF_MONITOR
1242 if (0)
1243 #endif
1244 /*Beacon control*/
1245 hw_bcn_ctrl_set(adapter, clt_port, (BIT_DIS_TSF_UDT | BIT_EN_BCN_FUNCTION));
1246
1247 /*AID*/
1248 hw_set_aid(adapter, clt_port, 0);
1249 RTW_INFO("%s("ADPT_FMT") clt_port:%d\n", __func__, ADPT_ARG(adapter), clt_port);
1250 }
1251 #endif
1252
hw_var_set_opmode(PADAPTER adapter,u8 mode)1253 static void hw_var_set_opmode(PADAPTER adapter, u8 mode)
1254 {
1255 u8 val8;
1256 static u8 isMonitor = _FALSE;
1257
1258
1259 if (isMonitor == _TRUE) {
1260 /* reset RCR from backup */
1261 rtw_hal_set_hwreg(adapter, HW_VAR_RCR, (u8 *)&GET_HAL_DATA(adapter)->rcr_backup);
1262 rtw_hal_rcr_set_chk_bssid(adapter, MLME_ACTION_NONE);
1263 isMonitor = _FALSE;
1264 }
1265
1266 if (mode == _HW_STATE_MONITOR_) {
1267 isMonitor = _TRUE;
1268
1269 Set_MSR(adapter, _HW_STATE_NOLINK_);
1270 set_opmode_monitor(adapter);
1271 return;
1272 }
1273
1274 /* clear crc bit */
1275 if (rtw_hal_rcr_check(adapter, BIT_ACRC32_8822B))
1276 rtw_hal_rcr_clear(adapter, BIT_ACRC32_8822B);
1277
1278 #ifdef CONFIG_MI_WITH_MBSSID_CAM /*For Port0 - MBSS CAM*/
1279 if (adapter->hw_port != HW_PORT0) {
1280 RTW_ERR(ADPT_FMT ": Configure MBSSID cam on HW_PORT%d\n", ADPT_ARG(adapter), adapter->hw_port);
1281 rtw_warn_on(1);
1282 } else
1283 hw_var_set_opmode_mbid(adapter, mode);
1284 #else
1285
1286 switch (adapter->hw_port) {
1287 case HW_PORT0:
1288 set_opmode_port0(adapter, mode);
1289 break;
1290
1291 case HW_PORT1:
1292 set_opmode_port1(adapter, mode);
1293 break;
1294
1295 default:
1296 break;
1297 }
1298 #endif
1299 }
1300
hw_var_hw_port_cfg(_adapter * adapter,u8 enable)1301 static void hw_var_hw_port_cfg(_adapter *adapter, u8 enable)
1302 {
1303 if (enable)
1304 hw_bcn_ctrl_add(adapter, get_hw_port(adapter), (BIT_P0_EN_RXBCN_RPT | BIT_DIS_TSF_UDT | BIT_EN_BCN_FUNCTION));
1305 else
1306 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), BIT_EN_BCN_FUNCTION);
1307 }
1308
hw_var_set_bcn_func(PADAPTER adapter,u8 enable)1309 static void hw_var_set_bcn_func(PADAPTER adapter, u8 enable)
1310 {
1311 u8 val8 = 0;
1312
1313 if (enable) {
1314 /* enable TX BCN report
1315 * Reg REG_FWHW_TXQ_CTRL_8822B[2] = 1
1316 * Reg REG_BCN_CTRL_8822B[3][5] = 1
1317 */
1318 val8 = rtw_read8(adapter, REG_FWHW_TXQ_CTRL_8822B);
1319 val8 |= BIT_EN_BCN_TRXRPT_V1_8822B;
1320 rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822B, val8);
1321
1322
1323 switch (adapter->hw_port) {
1324 case HW_PORT0:
1325 val8 = BIT_EN_BCN_FUNCTION_8822B | BIT_P0_EN_TXBCN_RPT_8822B;
1326 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), BIT_P0_EN_RXBCN_RPT_8822B);
1327 break;
1328 #ifdef CONFIG_CONCURRENT_MODE
1329 case HW_PORT1:
1330 val8 = BIT_CLI0_EN_BCN_FUNCTION_8822B;
1331 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), BIT_CLI0_EN_RXBCN_RPT_8822B);
1332 break;
1333 case HW_PORT2:
1334 val8 = BIT_CLI1_EN_BCN_FUNCTION_8822B;
1335 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), BIT_CLI1_EN_RXBCN_RPT_8822B);
1336 break;
1337 case HW_PORT3:
1338 val8 = BIT_CLI2_EN_BCN_FUNCTION_8822B;
1339 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), BIT_CLI2_EN_RXBCN_RPT_8822B);
1340 break;
1341 case HW_PORT4:
1342 val8 = BIT_CLI3_EN_BCN_FUNCTION_8822B;
1343 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), BIT_CLI3_EN_RXBCN_RPT_8822B);
1344 break;
1345 #endif /* CONFIG_CONCURRENT_MODE */
1346 default:
1347 RTW_ERR(FUNC_ADPT_FMT" Unknow hw port(%d) \n", FUNC_ADPT_ARG(adapter), adapter->hw_port);
1348 rtw_warn_on(1);
1349 break;
1350
1351 }
1352 hw_bcn_ctrl_add(adapter, get_hw_port(adapter), val8);
1353 } else {
1354
1355 switch (adapter->hw_port) {
1356 case HW_PORT0:
1357 val8 = BIT_EN_BCN_FUNCTION_8822B | BIT_P0_EN_TXBCN_RPT_8822B;
1358 #ifdef CONFIG_BT_COEXIST
1359 /* Always enable port0 beacon function for PSTDMA */
1360 if (GET_HAL_DATA(adapter)->EEPROMBluetoothCoexist)
1361 val8 = BIT_P0_EN_TXBCN_RPT_8822B;
1362 #endif /* CONFIG_BT_COEXIST */
1363 break;
1364 #ifdef CONFIG_CONCURRENT_MODE
1365 case HW_PORT1:
1366 val8 = BIT_CLI0_EN_BCN_FUNCTION_8822B;
1367 break;
1368 case HW_PORT2:
1369 val8 = BIT_CLI1_EN_BCN_FUNCTION_8822B;
1370 break;
1371 case HW_PORT3:
1372 val8 = BIT_CLI2_EN_BCN_FUNCTION_8822B;
1373 break;
1374 case HW_PORT4:
1375 val8 = BIT_CLI3_EN_BCN_FUNCTION_8822B;
1376 break;
1377 #endif /* CONFIG_CONCURRENT_MODE */
1378 default:
1379 RTW_ERR(FUNC_ADPT_FMT" Unknow hw port(%d) \n", FUNC_ADPT_ARG(adapter), adapter->hw_port);
1380 rtw_warn_on(1);
1381 break;
1382 }
1383
1384 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), val8);
1385 }
1386 }
1387
hw_var_set_mlme_disconnect(PADAPTER adapter)1388 static void hw_var_set_mlme_disconnect(PADAPTER adapter)
1389 {
1390 u8 val8;
1391 struct mi_state mstate;
1392
1393 #ifdef CONFIG_CONCURRENT_MODE
1394 if (rtw_mi_check_status(adapter, MI_LINKED) == _FALSE)
1395 #endif
1396 /* reject all data frames under not link state */
1397 rtw_write16(adapter, REG_RXFLTMAP2_8822B, 0);
1398
1399 #ifdef CONFIG_CONCURRENT_MODE
1400 if (adapter->hw_port == HW_PORT1) {
1401 /* reset TSF1(CLINT0) */
1402 rtw_write8(adapter, REG_DUAL_TSF_RST_8822B, BIT_TSFTR_CLI0_RST_8822B);
1403
1404 /* disable update TSF1(CLINT0) */
1405 rtw_iface_disable_tsf_update(adapter);
1406
1407 /* disable Port1's beacon function */
1408 val8 = rtw_read8(adapter, REG_BCN_CTRL_CLINT0_8822B);
1409 val8 &= ~BIT_CLI0_EN_BCN_FUNCTION_8822B;
1410 rtw_write8(adapter, REG_BCN_CTRL_CLINT0_8822B, val8);
1411 } else
1412 #endif
1413 {
1414 /* reset TSF */
1415 rtw_write8(adapter, REG_DUAL_TSF_RST_8822B, BIT_TSFTR_RST_8822B);
1416
1417 /* disable update TSF */
1418 rtw_iface_disable_tsf_update(adapter);
1419 }
1420
1421 rtw_mi_status_no_self(adapter, &mstate);
1422
1423 /* clear update TSF only BSSID match for no linked station */
1424 if (MSTATE_STA_LD_NUM(&mstate) == 0 && MSTATE_STA_LG_NUM(&mstate) == 0)
1425 rtl8822b_rx_tsf_addr_filter_config(adapter, 0);
1426
1427 #ifdef CONFIG_CLIENT_PORT_CFG
1428 if (MLME_IS_STA(adapter))
1429 rtw_hw_client_port_clr(adapter);
1430 #endif
1431
1432 }
1433
hw_var_set_mlme_sitesurvey(PADAPTER adapter,u8 enable)1434 static void hw_var_set_mlme_sitesurvey(PADAPTER adapter, u8 enable)
1435 {
1436 struct dvobj_priv *dvobj;
1437 PHAL_DATA_TYPE hal;
1438 struct mlme_priv *pmlmepriv;
1439 PADAPTER iface;
1440 u32 reg_bcn_ctl;
1441 u16 value_rxfltmap2;
1442 u8 val8, i;
1443
1444
1445 dvobj = adapter_to_dvobj(adapter);
1446 hal = GET_HAL_DATA(adapter);
1447 pmlmepriv = &adapter->mlmepriv;
1448
1449 #ifdef CONFIG_FIND_BEST_CHANNEL
1450 /* Receive all data frames */
1451 value_rxfltmap2 = 0xFFFF;
1452 #else
1453 /* not to receive data frame */
1454 value_rxfltmap2 = 0;
1455 #endif
1456
1457 if (enable) {
1458 /*
1459 * 1. configure REG_RXFLTMAP2
1460 * 2. config RCR to receive different BSSID BCN or probe rsp
1461 */
1462
1463 rtw_write16(adapter, REG_RXFLTMAP2_8822B, value_rxfltmap2);
1464
1465 rtw_hal_rcr_set_chk_bssid(adapter, MLME_SCAN_ENTER);
1466
1467 if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter))
1468 StopTxBeacon(adapter);
1469 } else {
1470 /* sitesurvey done
1471 * 1. enable rx data frame
1472 * 2. config RCR not to receive different BSSID BCN or probe rsp
1473 */
1474
1475 if (rtw_mi_check_fwstate(adapter, _FW_LINKED | WIFI_AP_STATE | WIFI_MESH_STATE))
1476 /* enable to rx data frame */
1477 rtw_write16(adapter, REG_RXFLTMAP2_8822B, 0xFFFF);
1478
1479 rtw_hal_rcr_set_chk_bssid(adapter, MLME_SCAN_DONE);
1480
1481 if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) {
1482 ResumeTxBeacon(adapter);
1483 rtw_mi_tx_beacon_hdl(adapter);
1484 }
1485 }
1486 }
1487
hw_var_set_mlme_join(PADAPTER adapter,u8 type)1488 static void hw_var_set_mlme_join(PADAPTER adapter, u8 type)
1489 {
1490 u8 val8;
1491 u16 val16;
1492 u32 val32;
1493 u8 RetryLimit;
1494 PHAL_DATA_TYPE hal;
1495 struct mlme_priv *pmlmepriv;
1496
1497 RetryLimit = RL_VAL_STA;
1498 hal = GET_HAL_DATA(adapter);
1499 pmlmepriv = &adapter->mlmepriv;
1500
1501
1502 #ifdef CONFIG_CONCURRENT_MODE
1503 if (type == 0) {
1504 /* prepare to join */
1505 if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter))
1506 StopTxBeacon(adapter);
1507
1508 /* enable to rx data frame.Accept all data frame */
1509 rtw_write16(adapter, REG_RXFLTMAP2_8822B, 0xFFFF);
1510
1511 if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
1512 RetryLimit = (hal->CustomerID == RT_CID_CCX) ? RL_VAL_AP : RL_VAL_STA;
1513 else /* Ad-hoc Mode */
1514 RetryLimit = RL_VAL_AP;
1515
1516 /*
1517 * for 8822B, must enable BCN function if BIT_CBSSID_BCN_8822B(bit 7) of REG_RCR(0x608) is enable to recv BSSID bcn
1518 */
1519 hw_var_set_bcn_func(adapter, _TRUE);
1520
1521 /* update TSF only BSSID match for station mode */
1522 rtl8822b_rx_tsf_addr_filter_config(adapter, BIT_CHK_TSF_EN_8822B | BIT_CHK_TSF_CBSSID_8822B);
1523 #ifdef CONFIG_CLIENT_PORT_CFG
1524 rtw_hw_client_port_cfg(adapter);
1525 #endif
1526
1527 rtw_iface_enable_tsf_update(adapter);
1528
1529 } else if (type == 1) {
1530 /* joinbss_event call back when join res < 0 */
1531 if (rtw_mi_check_status(adapter, MI_LINKED) == _FALSE)
1532 rtw_write16(adapter, REG_RXFLTMAP2_8822B, 0x00);
1533
1534 rtw_iface_disable_tsf_update(adapter);
1535
1536 if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) {
1537 ResumeTxBeacon(adapter);
1538
1539 /* reset TSF 1/2 after resume_tx_beacon */
1540 val8 = BIT_TSFTR_RST_8822B | BIT_TSFTR_CLI0_RST_8822B;
1541 rtw_write8(adapter, REG_DUAL_TSF_RST_8822B, val8);
1542 }
1543 #ifdef CONFIG_CLIENT_PORT_CFG
1544 if (MLME_IS_STA(adapter))
1545 rtw_hw_client_port_clr(adapter);
1546 #endif
1547
1548 } else if (type == 2) {
1549 /* sta add event callback */
1550 if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) {
1551 rtw_write8(adapter, 0x542, 0x02);
1552 RetryLimit = RL_VAL_AP;
1553 }
1554
1555 if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) {
1556 ResumeTxBeacon(adapter);
1557
1558 /* reset TSF 1/2 after resume_tx_beacon */
1559 rtw_write8(adapter, REG_DUAL_TSF_RST_8822B, BIT_TSFTR_RST_8822B | BIT_TSFTR_CLI0_RST_8822B);
1560 }
1561 }
1562
1563 val16 = BIT_LRL_8822B(RetryLimit) | BIT_SRL_8822B(RetryLimit);
1564 rtw_write16(adapter, REG_RETRY_LIMIT_8822B, val16);
1565 #else /* !CONFIG_CONCURRENT_MODE */
1566 if (type == 0) {
1567 /* prepare to join */
1568
1569 /* enable to rx data frame. Accept all data frame */
1570 rtw_write16(adapter, REG_RXFLTMAP2_8822B, 0xFFFF);
1571
1572 /*
1573 * for 8822B, must enable BCN function if BIT_CBSSID_BCN_8822B(bit 7) of REG_RCR(0x608) is enabled to recv BSSID bcn
1574 */
1575 hw_var_set_bcn_func(adapter, _TRUE);
1576
1577 /* update TSF only BSSID match for station mode */
1578 rtl8822b_rx_tsf_addr_filter_config(adapter, BIT_CHK_TSF_EN_8822B | BIT_CHK_TSF_CBSSID_8822B);
1579
1580 if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
1581 RetryLimit = (hal->CustomerID == RT_CID_CCX) ? RL_VAL_AP : RL_VAL_STA;
1582 else /* Ad-hoc Mode */
1583 RetryLimit = RL_VAL_AP;
1584
1585 rtw_iface_enable_tsf_update(adapter);
1586
1587 } else if (type == 1) {
1588 /* joinbss_event call back when join res < 0 */
1589 rtw_write16(adapter, REG_RXFLTMAP2_8822B, 0x00);
1590
1591 rtw_iface_disable_tsf_update(adapter);
1592
1593 } else if (type == 2) {
1594 /* sta add event callback */
1595 if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))
1596 RetryLimit = RL_VAL_AP;
1597 }
1598
1599 val16 = BIT_LRL_8822B(RetryLimit) | BIT_SRL_8822B(RetryLimit);
1600 rtw_write16(adapter, REG_RETRY_LIMIT_8822B, val16);
1601 #endif /* !CONFIG_CONCURRENT_MODE */
1602 }
1603
hw_var_set_acm_ctrl(PADAPTER adapter,u8 ctrl)1604 static void hw_var_set_acm_ctrl(PADAPTER adapter, u8 ctrl)
1605 {
1606 u8 hwctrl = 0;
1607
1608 if (ctrl) {
1609 hwctrl |= BIT_ACMHWEN_8822B;
1610
1611 if (ctrl & BIT(1)) /* BE */
1612 hwctrl |= BIT_BEQ_ACM_EN_8822B;
1613 else
1614 hwctrl &= (~BIT_BEQ_ACM_EN_8822B);
1615
1616 if (ctrl & BIT(2)) /* VI */
1617 hwctrl |= BIT_VIQ_ACM_EN_8822B;
1618 else
1619 hwctrl &= (~BIT_VIQ_ACM_EN_8822B);
1620
1621 if (ctrl & BIT(3)) /* VO */
1622 hwctrl |= BIT_VOQ_ACM_EN_8822B;
1623 else
1624 hwctrl &= (~BIT_VOQ_ACM_EN_8822B);
1625 }
1626
1627 RTW_INFO("[HW_VAR_ACM_CTRL] Write 0x%02X\n", hwctrl);
1628 rtw_write8(adapter, REG_ACMHWCTRL_8822B, hwctrl);
1629 }
1630
hw_var_set_sec_dk_cfg(PADAPTER adapter,u8 enable)1631 static void hw_var_set_sec_dk_cfg(PADAPTER adapter, u8 enable)
1632 {
1633 struct security_priv *sec = &adapter->securitypriv;
1634 u8 reg_scr = rtw_read8(adapter, REG_SECCFG_8822B);
1635
1636 if (enable) {
1637 /* Enable default key related setting */
1638 reg_scr |= BIT_TXBCUSEDK_8822B;
1639 if (sec->dot11AuthAlgrthm != dot11AuthAlgrthm_8021X)
1640 reg_scr |= BIT_RXUHUSEDK_8822B | BIT_TXUHUSEDK_8822B;
1641 } else {
1642 /* Disable default key related setting */
1643 reg_scr &= ~(BIT_RXBCUSEDK_8822B | BIT_TXBCUSEDK_8822B | BIT_RXUHUSEDK_8822B | BIT_TXUHUSEDK_8822B);
1644 }
1645
1646 rtw_write8(adapter, REG_SECCFG_8822B, reg_scr);
1647
1648 RTW_INFO("%s: [HW_VAR_SEC_DK_CFG] 0x%x=0x%08x\n", __FUNCTION__,
1649 REG_SECCFG_8822B, rtw_read32(adapter, REG_SECCFG_8822B));
1650 }
1651
hw_var_set_bcn_valid(PADAPTER adapter)1652 static void hw_var_set_bcn_valid(PADAPTER adapter)
1653 {
1654 u8 val8 = 0;
1655
1656 /* only port 0 can TX BCN */
1657 val8 = rtw_read8(adapter, REG_FIFOPAGE_CTRL_2_8822B + 1);
1658 val8 = val8 | BIT(7);
1659 rtw_write8(adapter, REG_FIFOPAGE_CTRL_2_8822B + 1, val8);
1660 }
1661
hw_var_set_ack_preamble(PADAPTER adapter,u8 bShortPreamble)1662 static void hw_var_set_ack_preamble(PADAPTER adapter, u8 bShortPreamble)
1663 {
1664 u8 val8 = 0;
1665
1666
1667 val8 = rtw_read8(adapter, REG_WMAC_TRXPTCL_CTL_8822B + 2);
1668 val8 |= BIT(4) | BIT(5);
1669
1670 if (bShortPreamble)
1671 val8 |= BIT1;
1672 else
1673 val8 &= (~BIT1);
1674
1675 rtw_write8(adapter, REG_WMAC_TRXPTCL_CTL_8822B + 2, val8);
1676 }
1677
hw_var_set_dl_rsvd_page(PADAPTER adapter,u8 mstatus)1678 void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus)
1679 {
1680 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
1681 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
1682 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
1683 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
1684 u8 bcn_valid = _FALSE;
1685 u8 DLBcnCount = 0;
1686 u32 poll = 0;
1687 u8 val8;
1688 u8 restore[2];
1689 u8 hw_port = rtw_hal_get_port(adapter);
1690
1691 RTW_INFO(FUNC_ADPT_FMT ":+ hw_port=%d mstatus(%x)\n",
1692 FUNC_ADPT_ARG(adapter), hw_port, mstatus);
1693
1694 if (mstatus == RT_MEDIA_CONNECT) {
1695 #if 0
1696 u8 bRecover = _FALSE;
1697 #endif
1698 u8 v8;
1699
1700 /* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 8822B. */
1701 rtw_write16(adapter, port_cfg[hw_port].ps_aid, (0xF800 | pmlmeinfo->aid));
1702
1703 /* Enable SW TX beacon */
1704 v8 = rtw_read8(adapter, REG_CR_8822B + 1);
1705 restore[0] = v8;
1706 v8 |= (BIT_ENSWBCN_8822B >> 8);
1707 rtw_write8(adapter, REG_CR_8822B + 1, v8);
1708
1709 /*
1710 * Disable Hw protection for a time which revserd for Hw sending beacon.
1711 * Fix download reserved page packet fail that access collision with the protection time.
1712 */
1713 val8 = rtw_read8(adapter, REG_BCN_CTRL_8822B);
1714 restore[1] = val8;
1715 val8 &= ~BIT_EN_BCN_FUNCTION_8822B;
1716 val8 |= BIT_DIS_TSF_UDT_8822B;
1717 rtw_write8(adapter, REG_BCN_CTRL_8822B, val8);
1718
1719 #if 0
1720 /* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
1721 RegFwHwTxQCtrl = rtw_read8(adapter, REG_FWHW_TXQ_CTRL_8822B + 2);
1722
1723 if (RegFwHwTxQCtrl & BIT(6))
1724 bRecover = _TRUE;
1725
1726 /* To tell Hw the packet is not a real beacon frame. */
1727 RegFwHwTxQCtrl &= ~BIT(6);
1728 rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822B + 2, RegFwHwTxQCtrl);
1729 #endif
1730
1731 /* Clear beacon valid check bit. */
1732 rtw_hal_set_hwreg(adapter, HW_VAR_BCN_VALID, NULL);
1733 rtw_hal_set_hwreg(adapter, HW_VAR_DL_BCN_SEL, NULL);
1734
1735 DLBcnCount = 0;
1736 poll = 0;
1737 do {
1738 /* download rsvd page. */
1739 rtw_hal_set_fw_rsvd_page(adapter, _FALSE);
1740 DLBcnCount++;
1741 do {
1742 rtw_yield_os();
1743
1744 /* check rsvd page download OK. */
1745 rtw_hal_get_hwreg(adapter, HW_VAR_BCN_VALID, (u8 *)&bcn_valid);
1746 poll++;
1747 } while (!bcn_valid && (poll % 10) != 0 && !RTW_CANNOT_RUN(adapter));
1748
1749 } while (!bcn_valid && DLBcnCount <= 100 && !RTW_CANNOT_RUN(adapter));
1750
1751 if (RTW_CANNOT_RUN(adapter))
1752 ;
1753 else if (!bcn_valid)
1754 RTW_INFO(FUNC_ADPT_FMT ": DL RSVD page failed! DLBcnCount:%u, poll:%u\n",
1755 FUNC_ADPT_ARG(adapter), DLBcnCount, poll);
1756 else {
1757 struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
1758
1759 pwrctl->fw_psmode_iface_id = adapter->iface_id;
1760 rtw_hal_set_fw_rsvd_page(adapter, _TRUE);
1761 RTW_INFO(ADPT_FMT ": DL RSVD page success! DLBcnCount:%u, poll:%u\n",
1762 ADPT_ARG(adapter), DLBcnCount, poll);
1763 }
1764
1765 rtw_write8(adapter, REG_BCN_CTRL, restore[1]);
1766 rtw_write8(adapter, REG_CR + 1, restore[0]);
1767 #if 0
1768 /*
1769 * To make sure that if there exists an adapter which would like to send beacon.
1770 * If exists, the origianl value of 0x422[6] will be 1, we should check this to
1771 * prevent from setting 0x422[6] to 0 after download reserved page, or it will cause
1772 * the beacon cannot be sent by HW.
1773 */
1774 if (bRecover) {
1775 RegFwHwTxQCtrl |= BIT(6);
1776 rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822B + 2, RegFwHwTxQCtrl);
1777 }
1778 #endif
1779 #ifndef CONFIG_PCI_HCI
1780 /* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
1781 v8 = rtw_read8(adapter, REG_CR_8822B + 1);
1782 v8 &= ~BIT(0); /* ~ENSWBCN */
1783 rtw_write8(adapter, REG_CR_8822B + 1, v8);
1784 #endif /* !CONFIG_PCI_HCI */
1785 }
1786 }
1787
hw_var_set_h2c_fw_joinbssrpt(PADAPTER adapter,u8 mstatus)1788 static void hw_var_set_h2c_fw_joinbssrpt(PADAPTER adapter, u8 mstatus)
1789 {
1790 if (mstatus == RT_MEDIA_CONNECT)
1791 hw_var_set_dl_rsvd_page(adapter, RT_MEDIA_CONNECT);
1792 }
1793
1794 /*
1795 * Parameters:
1796 * adapter
1797 * enable _TRUE: enable; _FALSE: disable
1798 */
rx_agg_switch(PADAPTER adapter,u8 enable)1799 static u8 rx_agg_switch(PADAPTER adapter, u8 enable)
1800 {
1801 int err;
1802
1803 err = rtw_halmac_rx_agg_switch(adapter_to_dvobj(adapter), enable);
1804 if (err)
1805 return _FAIL;
1806
1807 return _SUCCESS;
1808 }
1809
1810
1811 #ifdef CONFIG_AP_PORT_SWAP
1812 /*
1813 * Parameters:
1814 * if_ap ap interface
1815 * if_port0 port0 interface
1816 */
1817
hw_port_reconfig(_adapter * if_ap,_adapter * if_port0)1818 static void hw_port_reconfig(_adapter * if_ap, _adapter *if_port0)
1819 {
1820 struct hal_spec_t *hal_spec = GET_HAL_SPEC(if_port0);
1821 struct mlme_ext_priv *pmlmeext = &if_port0->mlmeextpriv;
1822 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
1823 u32 bssid_offset = 0;
1824 u8 bssid[6] = {0};
1825 u8 vnet_type = 0;
1826 u8 vbcn_ctrl = 0;
1827 u8 i;
1828 u8 port = if_ap->hw_port;
1829
1830 if (port > (hal_spec->port_num - 1)) {
1831 RTW_INFO("[WARN] "ADPT_FMT"- hw_port : %d,will switch to invalid port-%d\n",
1832 ADPT_ARG(if_port0), if_port0->hw_port, port);
1833 rtw_warn_on(1);
1834 }
1835
1836 RTW_PRINT(ADPT_FMT" - hw_port : %d,will switch to port-%d\n",
1837 ADPT_ARG(if_port0), if_port0->hw_port, port);
1838
1839 /*backup*/
1840 GetHwReg(if_port0, HW_VAR_MEDIA_STATUS, &vnet_type);
1841 vbcn_ctrl = rtw_read8(if_port0, port_cfg[if_port0->hw_port].bcn_ctl);
1842
1843 if (is_client_associated_to_ap(if_port0)) {
1844 RTW_INFO("port0-iface("ADPT_FMT") is STA mode and linked\n", ADPT_ARG(if_port0));
1845 bssid_offset = port_cfg[if_port0->hw_port].bssid;
1846 for (i = 0; i < 6; i++)
1847 bssid[i] = rtw_read8(if_port0, bssid_offset + i);
1848 }
1849
1850 /*reconfigure*/
1851 if_port0->hw_port = port;
1852 /* adapter mac addr switch to port mac addr */
1853 rtw_hal_set_hwreg(if_port0, HW_VAR_MAC_ADDR, adapter_mac_addr(if_port0));
1854 Set_MSR(if_port0, vnet_type);
1855 rtw_write8(if_port0, port_cfg[if_port0->hw_port].bcn_ctl, vbcn_ctrl);
1856
1857 if (is_client_associated_to_ap(if_port0)) {
1858 rtw_hal_set_hwreg(if_port0, HW_VAR_BSSID, bssid);
1859 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
1860 rtw_set_default_port_id(if_port0);
1861 #endif
1862 }
1863
1864 #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT)
1865 if (GET_HAL_DATA(if_port0)->EEPROMBluetoothCoexist == _TRUE)
1866 rtw_hal_set_wifi_btc_port_id_cmd(if_port0);
1867 #endif
1868
1869 if_ap->hw_port =HW_PORT0;
1870 /* port mac addr switch to adapter mac addr */
1871 rtw_hal_set_hwreg(if_ap, HW_VAR_MAC_ADDR, adapter_mac_addr(if_ap));
1872 }
1873
hw_var_ap_port_switch(_adapter * adapter,u8 mode)1874 static void hw_var_ap_port_switch(_adapter *adapter, u8 mode)
1875 {
1876 u8 hw_port = get_hw_port(adapter);
1877 struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
1878 u8 ap_nums = 0;
1879 _adapter *if_port0 = NULL;
1880 int i;
1881
1882 RTW_INFO(ADPT_FMT ": hw_port(%d) will set mode to %d\n", ADPT_ARG(adapter), hw_port, mode);
1883 #if 0
1884 #ifdef CONFIG_P2P
1885 if (!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) {
1886 RTW_INFO("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__,
1887 rtw_p2p_role(&adapter->wdinfo), rtw_p2p_state(&adapter->wdinfo), rtw_p2p_pre_state(&adapter->wdinfo));
1888 }
1889 #endif
1890 #endif
1891
1892 if (mode != _HW_STATE_AP_)
1893 return;
1894
1895 if (hw_port == HW_PORT0)
1896 return;
1897
1898 /*check and prepare switch port to port0 for AP mode's BCN function*/
1899 ap_nums = rtw_mi_get_ap_num(adapter);
1900 if (ap_nums > 0) {
1901 RTW_ERR("SortAP mode numbers:%d, must move setting to MBSSID CAM, not support yet\n", ap_nums);
1902 rtw_warn_on(1);
1903 return;
1904 }
1905
1906 /*Get iface of port-0*/
1907 for (i = 0; i < dvobj->iface_nums; i++) {
1908 if (get_hw_port(dvobj->padapters[i]) == HW_PORT0) {
1909 if_port0 = dvobj->padapters[i];
1910 break;
1911 }
1912 }
1913
1914 if (if_port0 == NULL) {
1915 RTW_ERR("%s if_port0 == NULL\n", __func__);
1916 rtw_warn_on(1);
1917 return;
1918 }
1919 /* if_port0 switch to hw_port */
1920 hw_port_reconfig(adapter, if_port0);
1921 RTW_INFO(ADPT_FMT ": Cfg SoftAP mode to hw_port(%d) done\n", ADPT_ARG(adapter), adapter->hw_port);
1922
1923 }
1924 #endif
1925
rtl8822b_sethwreg(PADAPTER adapter,u8 variable,u8 * val)1926 u8 rtl8822b_sethwreg(PADAPTER adapter, u8 variable, u8 *val)
1927 {
1928 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
1929 u8 ret = _SUCCESS;
1930 u8 val8;
1931 u16 val16;
1932 u32 val32;
1933
1934
1935 switch (variable) {
1936 case HW_VAR_SET_OPMODE:
1937 hw_var_set_opmode(adapter, *val);
1938 break;
1939 /*
1940 case HW_VAR_INIT_RTS_RATE:
1941 break;
1942 */
1943 case HW_VAR_BASIC_RATE:
1944 rtw_var_set_basic_rate(adapter, val);
1945 break;
1946
1947 case HW_VAR_TXPAUSE:
1948 rtw_write8(adapter, REG_TXPAUSE_8822B, *val);
1949 break;
1950
1951 case HW_VAR_BCN_FUNC:
1952 hw_var_set_bcn_func(adapter, *val);
1953 break;
1954
1955 case HW_VAR_PORT_CFG:
1956 hw_var_hw_port_cfg(adapter, *val);
1957 break;
1958
1959 case HW_VAR_MLME_DISCONNECT:
1960 hw_var_set_mlme_disconnect(adapter);
1961 break;
1962
1963 case HW_VAR_MLME_SITESURVEY:
1964 hw_var_set_mlme_sitesurvey(adapter, *val);
1965 #ifdef CONFIG_BT_COEXIST
1966 if (hal->EEPROMBluetoothCoexist)
1967 rtw_btcoex_ScanNotify(adapter, *val ? _TRUE : _FALSE);
1968 else
1969 #endif /* CONFIG_BT_COEXIST */
1970 rtw_btcoex_wifionly_scan_notify(adapter);
1971 break;
1972
1973 case HW_VAR_MLME_JOIN:
1974 hw_var_set_mlme_join(adapter, *val);
1975 break;
1976
1977 case HW_VAR_RCR:
1978 ret = rtl8822b_rcr_config(adapter, *((u32 *)val));
1979 break;
1980
1981 case HW_VAR_SLOT_TIME:
1982 rtw_write8(adapter, REG_SLOT_8822B, *val);
1983 break;
1984
1985 case HW_VAR_RESP_SIFS:
1986 /* RESP_SIFS for CCK */
1987 rtw_write8(adapter, REG_RESP_SIFS_CCK_8822B, val[0]);
1988 rtw_write8(adapter, REG_RESP_SIFS_CCK_8822B + 1, val[1]);
1989 /* RESP_SIFS for OFDM */
1990 rtw_write8(adapter, REG_RESP_SIFS_OFDM_8822B, val[2]);
1991 rtw_write8(adapter, REG_RESP_SIFS_OFDM_8822B + 1, val[3]);
1992 break;
1993
1994 case HW_VAR_ACK_PREAMBLE:
1995 hw_var_set_ack_preamble(adapter, *val);
1996 break;
1997
1998 /*
1999 case HW_VAR_SEC_CFG:
2000 follow hal_com.c
2001 break;
2002 */
2003
2004 case HW_VAR_SEC_DK_CFG:
2005 if (val)
2006 hw_var_set_sec_dk_cfg(adapter, _TRUE);
2007 else
2008 hw_var_set_sec_dk_cfg(adapter, _FALSE);
2009 break;
2010
2011 case HW_VAR_BCN_VALID:
2012 hw_var_set_bcn_valid(adapter);
2013 break;
2014
2015 case HW_VAR_CAM_INVALID_ALL:
2016 val32 = BIT_SECCAM_POLLING_8822B | BIT_SECCAM_CLR_8822B;
2017 rtw_write32(adapter, REG_CAMCMD_8822B, val32);
2018 break;
2019
2020 case HW_VAR_AC_PARAM_VO:
2021 rtw_write32(adapter, REG_EDCA_VO_PARAM_8822B, *(u32 *)val);
2022 break;
2023
2024 case HW_VAR_AC_PARAM_VI:
2025 rtw_write32(adapter, REG_EDCA_VI_PARAM_8822B, *(u32 *)val);
2026 break;
2027
2028 case HW_VAR_AC_PARAM_BE:
2029 hal->ac_param_be = *(u32 *)val;
2030 rtw_write32(adapter, REG_EDCA_BE_PARAM_8822B, *(u32 *)val);
2031 break;
2032
2033 case HW_VAR_AC_PARAM_BK:
2034 rtw_write32(adapter, REG_EDCA_BK_PARAM_8822B, *(u32 *)val);
2035 break;
2036
2037 case HW_VAR_ACM_CTRL:
2038 hw_var_set_acm_ctrl(adapter, *val);
2039 break;
2040 /*
2041 case HW_VAR_AMPDU_MIN_SPACE:
2042 break;
2043 */
2044 #ifdef CONFIG_80211N_HT
2045 case HW_VAR_AMPDU_FACTOR: {
2046 u32 AMPDULen = *val; /* enum AGGRE_SIZE */
2047
2048 AMPDULen = (0x2000 << AMPDULen) - 1;
2049 rtw_write32(adapter, REG_AMPDU_MAX_LENGTH_8822B, AMPDULen);
2050 }
2051 break;
2052 #endif /* CONFIG_80211N_HT */
2053 case HW_VAR_RXDMA_AGG_PG_TH:
2054 /*
2055 * TH=1 => invalidate RX DMA aggregation
2056 * TH=0 => validate RX DMA aggregation, use init value.
2057 */
2058 if (*val == 0)
2059 /* enable RXDMA aggregation */
2060 rx_agg_switch(adapter, _TRUE);
2061 else
2062 /* disable RXDMA aggregation */
2063 rx_agg_switch(adapter, _FALSE);
2064 break;
2065 /*
2066 case HW_VAR_SET_RPWM:
2067 case HW_VAR_CPWM:
2068 break;
2069 */
2070 case HW_VAR_H2C_FW_PWRMODE:
2071 rtl8822b_set_FwPwrMode_cmd(adapter, *val);
2072 break;
2073 /*
2074 case HW_VAR_H2C_PS_TUNE_PARAM:
2075 break;
2076 */
2077 case HW_VAR_H2C_INACTIVE_IPS:
2078 #ifdef CONFIG_WOWLAN
2079 rtl8822b_set_fw_pwrmode_inips_cmd_wowlan(adapter, *val);
2080 #endif /* CONFIG_WOWLAN */
2081 break;
2082 case HW_VAR_H2C_FW_JOINBSSRPT:
2083 hw_var_set_h2c_fw_joinbssrpt(adapter, *val);
2084 break;
2085 case HW_VAR_DL_RSVD_PAGE:
2086 #ifdef CONFIG_BT_COEXIST
2087 if (check_fwstate(&adapter->mlmepriv, WIFI_AP_STATE) == _TRUE)
2088 rtl8822b_download_BTCoex_AP_mode_rsvd_page(adapter);
2089 #endif
2090 break;
2091 #ifdef CONFIG_P2P_PS
2092 case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
2093 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
2094 if (*val == P2P_PS_ENABLE)
2095 rtw_set_default_port_id(adapter);
2096 #endif
2097 rtw_set_p2p_ps_offload_cmd(adapter, *val);
2098 break;
2099 #endif /* CONFIG_P2P_PS */
2100 /*
2101 case HW_VAR_TRIGGER_GPIO_0:
2102 case HW_VAR_BT_SET_COEXIST:
2103 case HW_VAR_BT_ISSUE_DELBA:
2104 case HW_VAR_SWITCH_EPHY_WoWLAN:
2105 case HW_VAR_EFUSE_USAGE:
2106 case HW_VAR_EFUSE_BYTES:
2107 case HW_VAR_EFUSE_BT_USAGE:
2108 case HW_VAR_EFUSE_BT_BYTES:
2109 break;
2110 */
2111 case HW_VAR_FIFO_CLEARN_UP: {
2112 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
2113 u8 trycnt = 100;
2114 u32 reg_hw_ssn;
2115
2116 /* pause tx */
2117 rtw_write8(adapter, REG_TXPAUSE_8822B, 0xff);
2118
2119 /* keep hw sn */
2120 if (adapter->xmitpriv.hw_ssn_seq_no == 1)
2121 reg_hw_ssn = REG_HW_SEQ1_8822B;
2122 else if (adapter->xmitpriv.hw_ssn_seq_no == 2)
2123 reg_hw_ssn = REG_HW_SEQ2_8822B;
2124 else if (adapter->xmitpriv.hw_ssn_seq_no == 3)
2125 reg_hw_ssn = REG_HW_SEQ3_8822B;
2126 else
2127 reg_hw_ssn = REG_HW_SEQ0_8822B;
2128
2129 adapter->xmitpriv.nqos_ssn = rtw_read16(adapter, reg_hw_ssn);
2130
2131 if (pwrpriv->bkeepfwalive != _TRUE) {
2132 /* RX DMA stop */
2133 val32 = rtw_read32(adapter, REG_RXPKT_NUM_8822B);
2134 val32 |= BIT_RW_RELEASE_EN;
2135 rtw_write32(adapter, REG_RXPKT_NUM_8822B, val32);
2136 do {
2137 val32 = rtw_read32(adapter, REG_RXPKT_NUM_8822B);
2138 val32 &= BIT_RXDMA_IDLE_8822B;
2139 if (val32)
2140 break;
2141
2142 RTW_INFO("[HW_VAR_FIFO_CLEARN_UP] val=%x times:%d\n", val32, trycnt);
2143 } while (--trycnt);
2144 if (trycnt == 0)
2145 RTW_INFO("[HW_VAR_FIFO_CLEARN_UP] Stop RX DMA failed!\n");
2146 #if 0
2147 /* RQPN Load 0 */
2148 rtw_write16(adapter, REG_RQPN_NPQ, 0);
2149 rtw_write32(adapter, REG_RQPN, 0x80000000);
2150 rtw_mdelay_os(2);
2151 #endif
2152 }
2153 }
2154 break;
2155
2156 case HW_VAR_RESTORE_HW_SEQ:
2157 {
2158 /* restore Sequence No. */
2159 u32 reg_hw_ssn;
2160
2161 if (adapter->xmitpriv.hw_ssn_seq_no == 1)
2162 reg_hw_ssn = REG_HW_SEQ1_8822B;
2163 else if (adapter->xmitpriv.hw_ssn_seq_no == 2)
2164 reg_hw_ssn = REG_HW_SEQ2_8822B;
2165 else if (adapter->xmitpriv.hw_ssn_seq_no == 3)
2166 reg_hw_ssn = REG_HW_SEQ3_8822B;
2167 else
2168 reg_hw_ssn = REG_HW_SEQ0_8822B;
2169
2170 rtw_write8(adapter, reg_hw_ssn, adapter->xmitpriv.nqos_ssn);
2171 }
2172 break;
2173
2174 case HW_VAR_CHECK_TXBUF: {
2175 u16 rtylmtorg;
2176 u8 RetryLimit = 0x01;
2177 systime start;
2178 u32 passtime;
2179 u32 timelmt = 2000; /* ms */
2180 int err;
2181 u8 empty;
2182
2183
2184 rtylmtorg = rtw_read16(adapter, REG_RETRY_LIMIT_8822B);
2185
2186 val16 = BIT_LRL_8822B(RetryLimit) | BIT_SRL_8822B(RetryLimit);
2187 rtw_write16(adapter, REG_RETRY_LIMIT_8822B, val16);
2188
2189 /* Check TX FIFO empty or not */
2190 empty = _FALSE;
2191 start = rtw_get_current_time();
2192 err = rtw_halmac_txfifo_wait_empty(adapter_to_dvobj(adapter), timelmt);
2193 if (!err)
2194 empty = _TRUE;
2195 passtime = rtw_get_passing_time_ms(start);
2196
2197 if (_TRUE == empty)
2198 RTW_INFO("[HW_VAR_CHECK_TXBUF] Empty in %d ms\n", passtime);
2199 else if (RTW_CANNOT_RUN(adapter))
2200 RTW_WARN("[HW_VAR_CHECK_TXBUF] bDriverStopped or bSurpriseRemoved\n");
2201 else {
2202 RTW_ERR("[HW_VAR_CHECK_TXBUF] NOT empty in %d ms\n", passtime);
2203
2204 }
2205 rtw_write16(adapter, REG_RETRY_LIMIT_8822B, rtylmtorg);
2206 }
2207 break;
2208 /*
2209 case HW_VAR_PCIE_STOP_TX_DMA:
2210 case HW_VAR_APFM_ON_MAC
2211 case HW_VAR_HCI_SUS_STATE:
2212 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
2213 case HW_VAR_WOWLAN:
2214 case HW_VAR_WAKEUP_REASON:
2215 #endif
2216 case HW_VAR_RPWM_TOG:
2217 break;
2218 */
2219 #ifdef CONFIG_GPIO_WAKEUP
2220 case HW_SET_GPIO_WL_CTRL: {
2221 u8 enable = *val;
2222 u8 value = 0;
2223 u8 addr = REG_PAD_CTRL1_8822B + 3;
2224
2225 if (WAKEUP_GPIO_IDX == 6) {
2226 value = rtw_read8(adapter, addr);
2227
2228 if (enable == _TRUE && (value & BIT(1)))
2229 /* set 0x64[25] = 0 to control GPIO 6 */
2230 rtw_write8(adapter, addr, value & (~BIT(1)));
2231 else if (enable == _FALSE)
2232 rtw_write8(adapter, addr, value | BIT(1));
2233
2234 RTW_INFO("[HW_SET_GPIO_WL_CTRL] 0x%02X=0x%02X\n",
2235 addr, rtw_read8(adapter, addr));
2236 }
2237 }
2238 break;
2239 #endif
2240 /*
2241 case HW_VAR_SYS_CLKR:
2242 break;
2243 */
2244 case HW_VAR_NAV_UPPER: {
2245 #define HAL_NAV_UPPER_UNIT 128 /* micro-second */
2246 u32 usNavUpper = *(u32 *)val;
2247
2248 if (usNavUpper > HAL_NAV_UPPER_UNIT * 0xFF) {
2249 RTW_INFO(FUNC_ADPT_FMT ": [HW_VAR_NAV_UPPER] value(0x%08X us) is larger than (%d * 0xFF)!!!\n",
2250 FUNC_ADPT_ARG(adapter), usNavUpper, HAL_NAV_UPPER_UNIT);
2251 break;
2252 }
2253
2254 usNavUpper = (usNavUpper + HAL_NAV_UPPER_UNIT - 1) / HAL_NAV_UPPER_UNIT;
2255 rtw_write8(adapter, REG_NAV_CTRL_8822B + 2, (u8)usNavUpper);
2256 }
2257 break;
2258
2259 /*
2260 case HW_VAR_RPT_TIMER_SETTING:
2261 case HW_VAR_TX_RPT_MAX_MACID:
2262 case HW_VAR_CHK_HI_QUEUE_EMPTY:
2263 case HW_VAR_AMPDU_MAX_TIME:
2264 case HW_VAR_WIRELESS_MODE:
2265 case HW_VAR_USB_MODE:
2266 break;
2267 */
2268 #ifdef CONFIG_AP_PORT_SWAP
2269 case HW_VAR_PORT_SWITCH:
2270 {
2271 u8 mode = *((u8 *)val);
2272
2273 hw_var_ap_port_switch(adapter, mode);
2274 }
2275 break;
2276 #endif
2277
2278 #ifdef CONFIG_BEAMFORMING
2279 case HW_VAR_SOUNDING_ENTER:
2280 rtl8822b_phy_bf_enter(adapter, (struct sta_info*)val);
2281 break;
2282
2283 case HW_VAR_SOUNDING_LEAVE:
2284 rtl8822b_phy_bf_leave(adapter, val);
2285 break;
2286 /*
2287 case HW_VAR_SOUNDING_RATE:
2288 break;
2289 */
2290 case HW_VAR_SOUNDING_STATUS:
2291 rtl8822b_phy_bf_sounding_status(adapter, *val);
2292 break;
2293 /*
2294 case HW_VAR_SOUNDING_FW_NDPA:
2295 case HW_VAR_SOUNDING_CLK:
2296 break;
2297 */
2298 case HW_VAR_SOUNDING_SET_GID_TABLE:
2299 rtl8822b_phy_bf_set_gid_table(adapter, (struct beamformer_entry*)val);
2300 break;
2301
2302 case HW_VAR_SOUNDING_CSI_REPORT:
2303 rtl8822b_phy_bf_set_csi_report(adapter, (struct _RT_CSI_INFO*)val);
2304 break;
2305 #endif /* CONFIG_BEAMFORMING */
2306 /*
2307 case HW_VAR_HW_REG_TIMER_INIT:
2308 case HW_VAR_HW_REG_TIMER_RESTART:
2309 case HW_VAR_HW_REG_TIMER_START:
2310 case HW_VAR_HW_REG_TIMER_STOP:
2311 break;
2312 */
2313
2314 /*
2315 case HW_VAR_MACID_LINK:
2316 case HW_VAR_MACID_NOLINK:
2317 case HW_VAR_DUMP_MAC_QUEUE_INFO:
2318 case HW_VAR_ASIX_IOT:
2319 case HW_VAR_EN_HW_UPDATE_TSF:
2320 case HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO:
2321 case HW_VAR_CH_SW_IQK_INFO_BACKUP:
2322 case HW_VAR_CH_SW_IQK_INFO_RESTORE:
2323 break;
2324 */
2325 #ifdef CONFIG_TDLS
2326 #ifdef CONFIG_TDLS_CH_SW
2327 case HW_VAR_TDLS_BCN_EARLY_C2H_RPT:
2328 rtl8822b_set_BcnEarly_C2H_Rpt_cmd(adapter, *val);
2329 break;
2330 #endif
2331 #endif
2332
2333 case HW_VAR_FREECNT:
2334
2335 val8 = (u8)*val;
2336
2337 if (val8==0) {
2338 /* disable free run counter set 0x577[3]=0 */
2339 rtw_write8(adapter, REG_MISC_CTRL,
2340 rtw_read8(adapter, REG_MISC_CTRL)&(~BIT_EN_FREECNT));
2341
2342 /* reset FREE_RUN_COUNTER set 0x553[5]=1 */
2343 val8 = rtw_read8(adapter, REG_DUAL_TSF_RST);
2344 val8 |= BIT_FREECNT_RST;
2345 rtw_write8(adapter, REG_DUAL_TSF_RST, val8);
2346
2347 } else if (val8==1){
2348
2349 /* enable free run counter */
2350
2351 /* disable first set 0x577[3]=0 */
2352 rtw_write8(adapter, REG_MISC_CTRL,
2353 rtw_read8(adapter, REG_MISC_CTRL)&(~BIT_EN_FREECNT));
2354
2355 /* reset FREE_RUN_COUNTER set 0x553[5]=1 */
2356 val8 = rtw_read8(adapter, REG_DUAL_TSF_RST);
2357 val8 |= BIT_FREECNT_RST;
2358 rtw_write8(adapter, REG_DUAL_TSF_RST, val8);
2359
2360 /* enable free run counter 0x577[3]=1 */
2361 rtw_write8(adapter, REG_MISC_CTRL,
2362 rtw_read8(adapter, REG_MISC_CTRL)|BIT_EN_FREECNT);
2363 }
2364 break;
2365
2366 case HW_VAR_SET_SOML_PARAM:
2367 #ifdef CONFIG_DYNAMIC_SOML
2368 rtw_dyn_soml_para_set(adapter, 4, 20, 1, 0);
2369 #endif
2370 break;
2371
2372 default:
2373 ret = SetHwReg(adapter, variable, val);
2374 break;
2375 }
2376
2377 return ret;
2378 }
2379
2380 struct qinfo {
2381 u32 head:11;
2382 u32 tail:11;
2383 u32 empty:1;
2384 u32 ac:2;
2385 u32 macid:7;
2386 };
2387
2388 struct bcn_qinfo {
2389 u16 head:12;
2390 u16 rsvd:4;
2391 };
2392
dump_qinfo(void * sel,struct qinfo * info,u32 pkt_num,const char * tag)2393 static void dump_qinfo(void *sel, struct qinfo *info, u32 pkt_num, const char *tag)
2394 {
2395 RTW_PRINT_SEL(sel, "%shead:0x%02x, tail:0x%02x, pkt_num:%u, macid:%u, ac:%u\n",
2396 tag ? tag : "", info->head, info->tail, pkt_num, info->macid, info->ac);
2397 }
2398
dump_bcn_qinfo(void * sel,struct bcn_qinfo * info,u32 pkt_num,const char * tag)2399 static void dump_bcn_qinfo(void *sel, struct bcn_qinfo *info, u32 pkt_num, const char *tag)
2400 {
2401 RTW_PRINT_SEL(sel, "%shead:0x%02x, pkt_num:%u\n",
2402 tag ? tag : "", info->head, pkt_num);
2403 }
2404
dump_mac_qinfo(void * sel,_adapter * adapter)2405 static void dump_mac_qinfo(void *sel, _adapter *adapter)
2406 {
2407 u32 q0_info;
2408 u32 q1_info;
2409 u32 q2_info;
2410 u32 q3_info;
2411 u32 q4_info;
2412 u32 q5_info;
2413 u32 q6_info;
2414 u32 q7_info;
2415 u32 mg_q_info;
2416 u32 hi_q_info;
2417 u16 bcn_q_info;
2418 u32 q0_q1_info;
2419 u32 q2_q3_info;
2420 u32 q4_q5_info;
2421 u32 q6_q7_info;
2422 u32 mg_hi_q_info;
2423 u32 cmd_bcn_q_info;
2424
2425 q0_info = rtw_read32(adapter, REG_Q0_INFO_8822B);
2426 q1_info = rtw_read32(adapter, REG_Q1_INFO_8822B);
2427 q2_info = rtw_read32(adapter, REG_Q2_INFO_8822B);
2428 q3_info = rtw_read32(adapter, REG_Q3_INFO_8822B);
2429 q4_info = rtw_read32(adapter, REG_Q4_INFO_8822B);
2430 q5_info = rtw_read32(adapter, REG_Q5_INFO_8822B);
2431 q6_info = rtw_read32(adapter, REG_Q6_INFO_8822B);
2432 q7_info = rtw_read32(adapter, REG_Q7_INFO_8822B);
2433 mg_q_info = rtw_read32(adapter, REG_MGQ_INFO_8822B);
2434 hi_q_info = rtw_read32(adapter, REG_HIQ_INFO_8822B);
2435 bcn_q_info = rtw_read16(adapter, REG_BCNQ_INFO_8822B);
2436
2437 q0_q1_info = rtw_read32(adapter, REG_Q0_Q1_INFO_8822B);
2438 q2_q3_info = rtw_read32(adapter, REG_Q2_Q3_INFO_8822B);
2439 q4_q5_info = rtw_read32(adapter, REG_Q4_Q5_INFO_8822B);
2440 q6_q7_info = rtw_read32(adapter, REG_Q6_Q7_INFO_8822B);
2441 mg_hi_q_info = rtw_read32(adapter, REG_MGQ_HIQ_INFO_8822B);
2442 cmd_bcn_q_info = rtw_read32(adapter, REG_CMDQ_BCNQ_INFO_8822B);
2443
2444 dump_qinfo(sel, (struct qinfo *)&q0_info, q0_q1_info&0xFFF, "Q0 ");
2445 dump_qinfo(sel, (struct qinfo *)&q1_info, (q0_q1_info>>15)&0xFFF, "Q1 ");
2446 dump_qinfo(sel, (struct qinfo *)&q2_info, q2_q3_info&0xFFF, "Q2 ");
2447 dump_qinfo(sel, (struct qinfo *)&q3_info, (q2_q3_info>>15)&0xFFF, "Q3 ");
2448 dump_qinfo(sel, (struct qinfo *)&q4_info, q4_q5_info&0xFFF, "Q4 ");
2449 dump_qinfo(sel, (struct qinfo *)&q5_info, (q4_q5_info>>15)&0xFFF, "Q5 ");
2450 dump_qinfo(sel, (struct qinfo *)&q6_info, q6_q7_info&0xFFF, "Q6 ");
2451 dump_qinfo(sel, (struct qinfo *)&q7_info, (q6_q7_info>>15)&0xFFF, "Q7 ");
2452 dump_qinfo(sel, (struct qinfo *)&mg_q_info, mg_hi_q_info&0xFFF, "MG ");
2453 dump_qinfo(sel, (struct qinfo *)&hi_q_info, (mg_hi_q_info>>15)&0xFFF, "HI ");
2454 dump_bcn_qinfo(sel, (struct bcn_qinfo *)&bcn_q_info, cmd_bcn_q_info&0xFFF, "BCN ");
2455
2456 }
2457
dump_mac_txfifo(void * sel,_adapter * adapter)2458 static void dump_mac_txfifo(void *sel, _adapter *adapter)
2459 {
2460 u32 hpq, lpq, npq, epq, pubq;
2461
2462 hpq = rtw_read32(adapter, REG_FIFOPAGE_INFO_1_8822B);
2463 lpq = rtw_read32(adapter, REG_FIFOPAGE_INFO_2_8822B);
2464 npq = rtw_read32(adapter, REG_FIFOPAGE_INFO_3_8822B);
2465 epq = rtw_read32(adapter, REG_FIFOPAGE_INFO_4_8822B);
2466 pubq = rtw_read32(adapter, REG_FIFOPAGE_INFO_5_8822B);
2467
2468 hpq = (hpq & 0xFFF0000)>>16;
2469 lpq = (lpq & 0xFFF0000)>>16;
2470 npq = (npq & 0xFFF0000)>>16;
2471 epq = (epq & 0xFFF0000)>>16;
2472 pubq = (pubq & 0xFFF0000)>>16;
2473
2474 RTW_PRINT_SEL(sel, "Tx: available page num: ");
2475 if ((hpq == 0xAEA) && (hpq == lpq) && (hpq == pubq))
2476 RTW_PRINT_SEL(sel, "N/A (reg val = 0xea)\n");
2477 else
2478 RTW_PRINT_SEL(sel, "HPQ: %d, LPQ: %d, NPQ: %d, EPQ: %d, PUBQ: %d\n"
2479 , hpq, lpq, npq, epq, pubq);
2480 }
2481
hw_var_get_bcn_valid(PADAPTER adapter)2482 static u8 hw_var_get_bcn_valid(PADAPTER adapter)
2483 {
2484 u8 val8 = 0;
2485 u8 ret = _FALSE;
2486
2487 /* only port 0 can TX BCN */
2488 val8 = rtw_read8(adapter, REG_FIFOPAGE_CTRL_2_8822B + 1);
2489 ret = (BIT(7) & val8) ? _TRUE : _FALSE;
2490
2491 return ret;
2492 }
2493
rtl8822b_read_wmmedca_reg(PADAPTER adapter,u16 * vo_params,u16 * vi_params,u16 * be_params,u16 * bk_params)2494 void rtl8822b_read_wmmedca_reg(PADAPTER adapter, u16 *vo_params, u16 *vi_params, u16 *be_params, u16 *bk_params)
2495 {
2496 u8 vo_reg_params[4];
2497 u8 vi_reg_params[4];
2498 u8 be_reg_params[4];
2499 u8 bk_reg_params[4];
2500
2501 rtl8822b_gethwreg(adapter, HW_VAR_AC_PARAM_VO, vo_reg_params);
2502 rtl8822b_gethwreg(adapter, HW_VAR_AC_PARAM_VI, vi_reg_params);
2503 rtl8822b_gethwreg(adapter, HW_VAR_AC_PARAM_BE, be_reg_params);
2504 rtl8822b_gethwreg(adapter, HW_VAR_AC_PARAM_BK, bk_reg_params);
2505
2506 vo_params[0] = vo_reg_params[0];
2507 vo_params[1] = vo_reg_params[1] & 0x0F;
2508 vo_params[2] = (vo_reg_params[1] & 0xF0) >> 4;
2509 vo_params[3] = ((vo_reg_params[3] << 8) | (vo_reg_params[2])) * 32;
2510
2511 vi_params[0] = vi_reg_params[0];
2512 vi_params[1] = vi_reg_params[1] & 0x0F;
2513 vi_params[2] = (vi_reg_params[1] & 0xF0) >> 4;
2514 vi_params[3] = ((vi_reg_params[3] << 8) | (vi_reg_params[2])) * 32;
2515
2516 be_params[0] = be_reg_params[0];
2517 be_params[1] = be_reg_params[1] & 0x0F;
2518 be_params[2] = (be_reg_params[1] & 0xF0) >> 4;
2519 be_params[3] = ((be_reg_params[3] << 8) | (be_reg_params[2])) * 32;
2520
2521 bk_params[0] = bk_reg_params[0];
2522 bk_params[1] = bk_reg_params[1] & 0x0F;
2523 bk_params[2] = (bk_reg_params[1] & 0xF0) >> 4;
2524 bk_params[3] = ((bk_reg_params[3] << 8) | (bk_reg_params[2])) * 32;
2525
2526 vo_params[1] = (1 << vo_params[1]) - 1;
2527 vo_params[2] = (1 << vo_params[2]) - 1;
2528 vi_params[1] = (1 << vi_params[1]) - 1;
2529 vi_params[2] = (1 << vi_params[2]) - 1;
2530 be_params[1] = (1 << be_params[1]) - 1;
2531 be_params[2] = (1 << be_params[2]) - 1;
2532 bk_params[1] = (1 << bk_params[1]) - 1;
2533 bk_params[2] = (1 << bk_params[2]) - 1;
2534 }
2535
rtl8822b_gethwreg(PADAPTER adapter,u8 variable,u8 * val)2536 void rtl8822b_gethwreg(PADAPTER adapter, u8 variable, u8 *val)
2537 {
2538 PHAL_DATA_TYPE hal;
2539 u8 val8;
2540 u16 val16;
2541 u32 val32;
2542 u64 val64;
2543
2544
2545 hal = GET_HAL_DATA(adapter);
2546
2547 switch (variable) {
2548 /*
2549 case HW_VAR_INIT_RTS_RATE:
2550 case HW_VAR_BASIC_RATE:
2551 break;
2552 */
2553 case HW_VAR_TXPAUSE:
2554 *val = rtw_read8(adapter, REG_TXPAUSE_8822B);
2555 break;
2556 /*
2557 case HW_VAR_BCN_FUNC:
2558 case HW_VAR_MLME_DISCONNECT:
2559 case HW_VAR_MLME_SITESURVEY:
2560 case HW_VAR_MLME_JOIN:
2561 case HW_VAR_BEACON_INTERVAL:
2562 case HW_VAR_SLOT_TIME:
2563 case HW_VAR_RESP_SIFS:
2564 case HW_VAR_ACK_PREAMBLE:
2565 case HW_VAR_SEC_CFG:
2566 case HW_VAR_SEC_DK_CFG:
2567 break;
2568 */
2569 case HW_VAR_BCN_VALID:
2570 *val = hw_var_get_bcn_valid(adapter);
2571 break;
2572 /*
2573 case HW_VAR_FREECNT:
2574 case HW_VAR_CAM_INVALID_ALL:
2575 */
2576 case HW_VAR_AC_PARAM_VO:
2577 val32 = rtw_read32(adapter, REG_EDCA_VO_PARAM);
2578 val[0] = val32 & 0xFF;
2579 val[1] = (val32 >> 8) & 0xFF;
2580 val[2] = (val32 >> 16) & 0xFF;
2581 val[3] = (val32 >> 24) & 0x07;
2582 break;
2583
2584 case HW_VAR_AC_PARAM_VI:
2585 val32 = rtw_read32(adapter, REG_EDCA_VI_PARAM);
2586 val[0] = val32 & 0xFF;
2587 val[1] = (val32 >> 8) & 0xFF;
2588 val[2] = (val32 >> 16) & 0xFF;
2589 val[3] = (val32 >> 24) & 0x07;
2590 break;
2591
2592 case HW_VAR_AC_PARAM_BE:
2593 val32 = rtw_read32(adapter, REG_EDCA_BE_PARAM);
2594 val[0] = val32 & 0xFF;
2595 val[1] = (val32 >> 8) & 0xFF;
2596 val[2] = (val32 >> 16) & 0xFF;
2597 val[3] = (val32 >> 24) & 0x07;
2598 break;
2599
2600 case HW_VAR_AC_PARAM_BK:
2601 val32 = rtw_read32(adapter, REG_EDCA_BK_PARAM);
2602 val[0] = val32 & 0xFF;
2603 val[1] = (val32 >> 8) & 0xFF;
2604 val[2] = (val32 >> 16) & 0xFF;
2605 val[3] = (val32 >> 24) & 0x07;
2606 break;
2607 /*
2608 case HW_VAR_ACM_CTRL:
2609 case HW_VAR_AMPDU_MIN_SPACE:
2610 case HW_VAR_AMPDU_FACTOR:
2611 case HW_VAR_RXDMA_AGG_PG_TH:
2612 case HW_VAR_SET_RPWM:
2613 case HW_VAR_CPWM:
2614 case HW_VAR_H2C_FW_PWRMODE:
2615 case HW_VAR_H2C_PS_TUNE_PARAM:
2616 case HW_VAR_H2C_FW_JOINBSSRPT:
2617 break;
2618 */
2619 case HW_VAR_FWLPS_RF_ON:
2620 /* When we halt NIC, we should check if FW LPS is leave. */
2621 if (rtw_is_surprise_removed(adapter) ||
2622 (adapter_to_pwrctl(adapter)->rf_pwrstate == rf_off)) {
2623 /*
2624 * If it is in HW/SW Radio OFF or IPS state,
2625 * we do not check Fw LPS Leave,
2626 * because Fw is unload.
2627 */
2628 *val = _TRUE;
2629 } else {
2630 rtw_hal_get_hwreg(adapter, HW_VAR_RCR, (u8 *)&val32);
2631
2632 if (adapter_to_pwrctl(adapter)->wowlan_mode == _TRUE)
2633 val32 &= (BIT_UC_MD_EN_8822B | BIT_BC_MD_EN_8822B);
2634 else
2635 val32 &= (BIT_UC_MD_EN_8822B | BIT_BC_MD_EN_8822B | BIT_TIM_PARSER_EN_8822B);
2636
2637 if (val32)
2638 *val = _FALSE;
2639 else
2640 *val = _TRUE;
2641 }
2642 break;
2643 /*
2644 case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
2645 case HW_VAR_TRIGGER_GPIO_0:
2646 case HW_VAR_BT_SET_COEXIST:
2647 case HW_VAR_BT_ISSUE_DELBA:
2648 case HW_VAR_SWITCH_EPHY_WoWLAN:
2649 case HW_VAR_EFUSE_USAGE:
2650 case HW_VAR_EFUSE_BYTES:
2651 case HW_VAR_EFUSE_BT_USAGE:
2652 case HW_VAR_EFUSE_BT_BYTES:
2653 case HW_VAR_FIFO_CLEARN_UP:
2654 case HW_VAR_RESTORE_HW_SEQ:
2655 case HW_VAR_CHECK_TXBUF:
2656 case HW_VAR_PCIE_STOP_TX_DMA:
2657 break;
2658 */
2659
2660 /*
2661 case HW_VAR_HCI_SUS_STATE:
2662 break;
2663 */
2664 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
2665 /*
2666 case HW_VAR_WOWLAN:
2667 break;
2668
2669 case HW_VAR_WAKEUP_REASON:
2670 rtw_halmac_get_wow_reason(adapter_to_dvobj(adapter), val);
2671 break;
2672
2673 case HW_VAR_RPWM_TOG:
2674 break;
2675 */
2676 #endif
2677 /*
2678 #ifdef CONFIG_GPIO_WAKEUP
2679 case HW_SET_GPIO_WL_CTRL:
2680 break;
2681 #endif
2682 */
2683 case HW_VAR_SYS_CLKR:
2684 *val = rtw_read8(adapter, REG_SYS_CLK_CTRL_8822B);
2685 break;
2686 /*
2687 case HW_VAR_NAV_UPPER:
2688 case HW_VAR_RPT_TIMER_SETTING:
2689 case HW_VAR_TX_RPT_MAX_MACID:
2690 break;
2691 */
2692 case HW_VAR_CHK_HI_QUEUE_EMPTY:
2693 val16 = rtw_read16(adapter, REG_TXPKT_EMPTY_8822B);
2694 *val = (val16 & BIT_HQQ_EMPTY_8822B) ? _TRUE : _FALSE;
2695 break;
2696 case HW_VAR_CHK_MGQ_CPU_EMPTY:
2697 val16 = rtw_read16(adapter, REG_TXPKT_EMPTY_8822B);
2698 *val = (val16 & BIT_MGQ_CPU_EMPTY_8822B) ? _TRUE : _FALSE;
2699 break;
2700 /*
2701 case HW_VAR_DL_BCN_SEL:
2702 case HW_VAR_AMPDU_MAX_TIME:
2703 case HW_VAR_WIRELESS_MODE:
2704 case HW_VAR_USB_MODE:
2705 case HW_VAR_PORT_SWITCH:
2706 case HW_VAR_DO_IQK:
2707 case HW_VAR_SOUNDING_ENTER:
2708 case HW_VAR_SOUNDING_LEAVE:
2709 case HW_VAR_SOUNDING_RATE:
2710 case HW_VAR_SOUNDING_STATUS:
2711 case HW_VAR_SOUNDING_FW_NDPA:
2712 case HW_VAR_SOUNDING_CLK:
2713 case HW_VAR_HW_REG_TIMER_INIT:
2714 case HW_VAR_HW_REG_TIMER_RESTART:
2715 case HW_VAR_HW_REG_TIMER_START:
2716 case HW_VAR_HW_REG_TIMER_STOP:
2717 case HW_VAR_MACID_LINK:
2718 case HW_VAR_MACID_NOLINK:
2719 break;
2720 */
2721 case HW_VAR_FW_PS_STATE:
2722 /* driver read REG_SYS_CFG5 - BIT_LPS_STATUS REG_1070[3] to get hw ps state */
2723 *((u16 *)val) = rtw_read8(adapter, REG_SYS_CFG5);
2724 break;
2725
2726 case HW_VAR_DUMP_MAC_QUEUE_INFO:
2727 dump_mac_qinfo(val, adapter);
2728 break;
2729
2730 case HW_VAR_DUMP_MAC_TXFIFO:
2731 dump_mac_txfifo(val, adapter);
2732 break;
2733 /*
2734 case HW_VAR_ASIX_IOT:
2735 case HW_VAR_EN_HW_UPDATE_TSF:
2736 case HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO:
2737 case HW_VAR_CH_SW_IQK_INFO_BACKUP:
2738 case HW_VAR_CH_SW_IQK_INFO_RESTORE:
2739 #ifdef CONFIG_TDLS
2740 #ifdef CONFIG_TDLS_CH_SW
2741 case HW_VAR_TDLS_BCN_EARLY_C2H_RPT:
2742 #endif
2743 #endif
2744 break;
2745 */
2746
2747 case HW_VAR_BCN_CTRL_ADDR:
2748 *((u32 *)val) = hw_bcn_ctrl_addr(adapter, adapter->hw_port);
2749 break;
2750
2751 default:
2752 GetHwReg(adapter, variable, val);
2753 break;
2754 }
2755 }
2756
2757 /*
2758 * Description:
2759 * Change default setting of specified variable.
2760 */
rtl8822b_sethaldefvar(PADAPTER adapter,HAL_DEF_VARIABLE variable,void * pval)2761 u8 rtl8822b_sethaldefvar(PADAPTER adapter, HAL_DEF_VARIABLE variable, void *pval)
2762 {
2763 PHAL_DATA_TYPE hal;
2764 u8 bResult;
2765
2766
2767 hal = GET_HAL_DATA(adapter);
2768 bResult = _SUCCESS;
2769
2770 switch (variable) {
2771 /*
2772 case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
2773 case HAL_DEF_IS_SUPPORT_ANT_DIV:
2774 case HAL_DEF_DRVINFO_SZ:
2775 case HAL_DEF_MAX_RECVBUF_SZ:
2776 case HAL_DEF_RX_PACKET_OFFSET:
2777 case HAL_DEF_RX_DMA_SZ_WOW:
2778 case HAL_DEF_RX_DMA_SZ:
2779 case HAL_DEF_RX_PAGE_SIZE:
2780 case HAL_DEF_DBG_DUMP_RXPKT:
2781 case HAL_DEF_RA_DECISION_RATE:
2782 case HAL_DEF_RA_SGI:
2783 case HAL_DEF_PT_PWR_STATUS:
2784 case HAL_DEF_TX_LDPC:
2785 case HAL_DEF_RX_LDPC:
2786 case HAL_DEF_TX_STBC:
2787 case HAL_DEF_RX_STBC:
2788 case HAL_DEF_EXPLICIT_BEAMFORMER:
2789 case HAL_DEF_EXPLICIT_BEAMFORMEE:
2790 case HAL_DEF_VHT_MU_BEAMFORMER:
2791 case HAL_DEF_VHT_MU_BEAMFORMEE:
2792 case HAL_DEF_BEAMFORMER_CAP:
2793 case HAL_DEF_BEAMFORMEE_CAP:
2794 case HW_VAR_MAX_RX_AMPDU_FACTOR:
2795 case HAL_DEF_DBG_DUMP_TXPKT:
2796 case HAL_DEF_TX_PAGE_SIZE:
2797 case HAL_DEF_TX_PAGE_BOUNDARY:
2798 case HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN:
2799 case HAL_DEF_ANT_DETECT:
2800 case HAL_DEF_PCI_SUUPORT_L1_BACKDOOR:
2801 case HAL_DEF_PCI_AMD_L1_SUPPORT:
2802 case HAL_DEF_PCI_ASPM_OSC:
2803 case HAL_DEF_EFUSE_USAGE:
2804 case HAL_DEF_EFUSE_BYTES:
2805 case HW_VAR_BEST_AMPDU_DENSITY:
2806 break;
2807 */
2808 default:
2809 bResult = SetHalDefVar(adapter, variable, pval);
2810 break;
2811 }
2812
2813 return bResult;
2814 }
rtl8822b_ra_info_dump(_adapter * padapter,void * sel)2815 void rtl8822b_ra_info_dump(_adapter *padapter, void *sel)
2816 {
2817 u8 mac_id;
2818 struct sta_info *psta;
2819 u32 rate_mask1, rate_mask2;
2820 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
2821 struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
2822
2823 for (mac_id = 0; mac_id < macid_ctl->num; mac_id++) {
2824 if (rtw_macid_is_used(macid_ctl, mac_id) && !rtw_macid_is_bmc(macid_ctl, mac_id)) {
2825 psta = macid_ctl->sta[mac_id];
2826 if (!psta)
2827 continue;
2828
2829 dump_sta_info(sel, psta);
2830 rate_mask1 = macid_ctl->rate_bmp0[mac_id];
2831 rate_mask2 = macid_ctl->rate_bmp1[mac_id];
2832 _RTW_PRINT_SEL(sel, "rate_mask2:0x%08x, rate_mask1:0x%08x\n", rate_mask2, rate_mask1);
2833 }
2834 }
2835 }
2836 /*
2837 * Description:
2838 * Query setting of specified variable.
2839 */
rtl8822b_gethaldefvar(PADAPTER adapter,HAL_DEF_VARIABLE variable,void * pval)2840 u8 rtl8822b_gethaldefvar(PADAPTER adapter, HAL_DEF_VARIABLE variable, void *pval)
2841 {
2842 PHAL_DATA_TYPE hal;
2843 struct dvobj_priv *d;
2844 u8 bResult;
2845 u8 val8 = 0;
2846 u32 val32 = 0;
2847
2848
2849 d = adapter_to_dvobj(adapter);
2850 hal = GET_HAL_DATA(adapter);
2851 bResult = _SUCCESS;
2852
2853 switch (variable) {
2854 /*
2855 case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
2856 break;
2857 */
2858 case HAL_DEF_IS_SUPPORT_ANT_DIV:
2859 #ifdef CONFIG_ANTENNA_DIVERSITY
2860 *(u8 *)pval = _TRUE;
2861 #else
2862 *(u8 *)pval = _FALSE;
2863 #endif
2864 break;
2865
2866 /*
2867 case HAL_DEF_DRVINFO_SZ:
2868 break;
2869 */
2870 case HAL_DEF_MAX_RECVBUF_SZ:
2871 *((u32 *)pval) = MAX_RECVBUF_SZ;
2872 break;
2873
2874 case HAL_DEF_RX_PACKET_OFFSET:
2875 val32 = rtl8822b_get_rx_desc_size(adapter);
2876 val8 = rtl8822b_get_rx_drv_info_size(adapter);
2877 *((u32 *)pval) = val32 + val8;
2878 break;
2879 /*
2880 case HAL_DEF_RX_DMA_SZ_WOW:
2881 case HAL_DEF_RX_DMA_SZ:
2882 case HAL_DEF_RX_PAGE_SIZE:
2883 case HAL_DEF_DBG_DUMP_RXPKT:
2884 case HAL_DEF_RA_DECISION_RATE:
2885 case HAL_DEF_RA_SGI:
2886 break;
2887 */
2888 /* only for 8188E */
2889 case HAL_DEF_PT_PWR_STATUS:
2890 break;
2891
2892 case HAL_DEF_TX_LDPC:
2893 case HAL_DEF_RX_LDPC:
2894 *(u8 *)pval = _TRUE;
2895 break;
2896
2897 /* support 1RX for STBC */
2898 case HAL_DEF_RX_STBC:
2899 *(u8 *)pval = 1;
2900 break;
2901
2902 /* support Explicit TxBF for HT/VHT */
2903 case HAL_DEF_EXPLICIT_BEAMFORMER:
2904 case HAL_DEF_EXPLICIT_BEAMFORMEE:
2905 case HAL_DEF_VHT_MU_BEAMFORMER:
2906 case HAL_DEF_VHT_MU_BEAMFORMEE:
2907 *(u8 *)pval = _TRUE;
2908 break;
2909
2910 case HAL_DEF_BEAMFORMER_CAP:
2911 val8 = GET_HAL_TX_NSS(adapter);
2912 *(u8 *)pval = (val8 - 1);
2913 break;
2914
2915 case HAL_DEF_BEAMFORMEE_CAP:
2916 *(u8 *)pval = 3;
2917 break;
2918
2919 case HW_VAR_MAX_RX_AMPDU_FACTOR:
2920 /* 8822B RX FIFO is 24KB */
2921 *(HT_CAP_AMPDU_FACTOR *)pval = MAX_AMPDU_FACTOR_16K;
2922 break;
2923
2924 case HW_DEF_RA_INFO_DUMP:
2925 rtl8822b_ra_info_dump(adapter, pval);
2926 break;
2927 /*
2928 case HAL_DEF_DBG_DUMP_TXPKT:
2929 case HAL_DEF_TX_PAGE_SIZE:
2930 case HAL_DEF_TX_PAGE_BOUNDARY:
2931 case HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN:
2932 case HAL_DEF_ANT_DETECT:
2933 case HAL_DEF_PCI_SUUPORT_L1_BACKDOOR:
2934 case HAL_DEF_PCI_AMD_L1_SUPPORT:
2935 case HAL_DEF_PCI_ASPM_OSC:
2936 case HAL_DEF_EFUSE_USAGE:
2937 case HAL_DEF_EFUSE_BYTES:
2938 break;
2939 */
2940 case HW_VAR_BEST_AMPDU_DENSITY:
2941 *((u32 *)pval) = AMPDU_DENSITY_VALUE_4;
2942 break;
2943
2944 default:
2945 bResult = GetHalDefVar(adapter, variable, pval);
2946 break;
2947 }
2948
2949 return bResult;
2950 }
2951
rtl8822b_fill_txdesc_sectype(struct pkt_attrib * pattrib,u8 * ptxdesc)2952 void rtl8822b_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc)
2953 {
2954 if ((pattrib->encrypt > 0) && !pattrib->bswenc) {
2955 /* SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES */
2956 switch (pattrib->encrypt) {
2957 case _WEP40_:
2958 case _WEP104_:
2959 case _TKIP_:
2960 case _TKIP_WTMIC_:
2961 SET_TX_DESC_SEC_TYPE_8822B(ptxdesc, 0x1);
2962 break;
2963 #ifdef CONFIG_WAPI_SUPPORT
2964 case _SMS4_:
2965 SET_TX_DESC_SEC_TYPE_8822B(ptxdesc, 0x2);
2966 break;
2967 #endif
2968 case _AES_:
2969 SET_TX_DESC_SEC_TYPE_8822B(ptxdesc, 0x3);
2970 break;
2971 case _NO_PRIVACY_:
2972 default:
2973 SET_TX_DESC_SEC_TYPE_8822B(ptxdesc, 0x0);
2974 break;
2975 }
2976 }
2977 }
2978
rtl8822b_fill_txdesc_vcs(PADAPTER adapter,struct pkt_attrib * pattrib,u8 * ptxdesc)2979 void rtl8822b_fill_txdesc_vcs(PADAPTER adapter, struct pkt_attrib *pattrib, u8 *ptxdesc)
2980 {
2981 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
2982 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
2983
2984
2985 if (pattrib->vcs_mode) {
2986 switch (pattrib->vcs_mode) {
2987 case RTS_CTS:
2988 SET_TX_DESC_RTSEN_8822B(ptxdesc, 1);
2989 break;
2990 case CTS_TO_SELF:
2991 SET_TX_DESC_CTS2SELF_8822B(ptxdesc, 1);
2992 break;
2993 case NONE_VCS:
2994 default:
2995 break;
2996 }
2997
2998 if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
2999 SET_TX_DESC_RTS_SHORT_8822B(ptxdesc, 1);
3000
3001 /* RTS Rate=24M */
3002 SET_TX_DESC_RTSRATE_8822B(ptxdesc, 0x8);
3003
3004 /* compatibility for MCC consideration, use pmlmeext->cur_channel */
3005 if (pmlmeext->cur_channel > 14)
3006 /* RTS retry to rate OFDM 6M for 5G */
3007 SET_TX_DESC_RTS_RTY_LOWEST_RATE_8822B(ptxdesc, 4);
3008 else
3009 /* RTS retry to rate CCK 1M for 2.4G */
3010 SET_TX_DESC_RTS_RTY_LOWEST_RATE_8822B(ptxdesc, 0);
3011 }
3012 }
3013
rtl8822b_bw_mapping(PADAPTER adapter,struct pkt_attrib * pattrib)3014 u8 rtl8822b_bw_mapping(PADAPTER adapter, struct pkt_attrib *pattrib)
3015 {
3016 u8 BWSettingOfDesc = 0;
3017 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
3018
3019
3020 if (hal->current_channel_bw == CHANNEL_WIDTH_80) {
3021 if (pattrib->bwmode == CHANNEL_WIDTH_80)
3022 BWSettingOfDesc = 2;
3023 else if (pattrib->bwmode == CHANNEL_WIDTH_40)
3024 BWSettingOfDesc = 1;
3025 else
3026 BWSettingOfDesc = 0;
3027 } else if (hal->current_channel_bw == CHANNEL_WIDTH_40) {
3028 if ((pattrib->bwmode == CHANNEL_WIDTH_40) || (pattrib->bwmode == CHANNEL_WIDTH_80))
3029 BWSettingOfDesc = 1;
3030 else
3031 BWSettingOfDesc = 0;
3032 } else
3033 BWSettingOfDesc = 0;
3034
3035 return BWSettingOfDesc;
3036 }
3037
rtl8822b_sc_mapping(PADAPTER adapter,struct pkt_attrib * pattrib)3038 u8 rtl8822b_sc_mapping(PADAPTER adapter, struct pkt_attrib *pattrib)
3039 {
3040 u8 SCSettingOfDesc = 0;
3041 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
3042
3043
3044 if (hal->current_channel_bw == CHANNEL_WIDTH_80) {
3045 if (pattrib->bwmode == CHANNEL_WIDTH_80)
3046 SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
3047 else if (pattrib->bwmode == CHANNEL_WIDTH_40) {
3048 if (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
3049 SCSettingOfDesc = VHT_DATA_SC_40_LOWER_OF_80MHZ;
3050 else if (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
3051 SCSettingOfDesc = VHT_DATA_SC_40_UPPER_OF_80MHZ;
3052 else
3053 RTW_INFO("SCMapping: DONOT CARE Mode Setting\n");
3054 } else {
3055 if ((hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
3056 SCSettingOfDesc = VHT_DATA_SC_20_LOWEST_OF_80MHZ;
3057 else if ((hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
3058 SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ;
3059 else if ((hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
3060 SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ;
3061 else if ((hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
3062 SCSettingOfDesc = VHT_DATA_SC_20_UPPERST_OF_80MHZ;
3063 else
3064 RTW_INFO("SCMapping: DONOT CARE Mode Setting\n");
3065 }
3066 } else if (hal->current_channel_bw == CHANNEL_WIDTH_40) {
3067 if (pattrib->bwmode == CHANNEL_WIDTH_40)
3068 SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
3069 else if (pattrib->bwmode == CHANNEL_WIDTH_20) {
3070 if (hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
3071 SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ;
3072 else if (hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
3073 SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ;
3074 else
3075 SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
3076 }
3077 } else
3078 SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
3079
3080 return SCSettingOfDesc;
3081 }
3082
rtl8822b_fill_txdesc_phy(PADAPTER adapter,struct pkt_attrib * pattrib,u8 * ptxdesc)3083 void rtl8822b_fill_txdesc_phy(PADAPTER adapter, struct pkt_attrib *pattrib, u8 *ptxdesc)
3084 {
3085 if (pattrib->ht_en) {
3086 /* Set Bandwidth and sub-channel settings. */
3087 SET_TX_DESC_DATA_BW_8822B(ptxdesc, rtl8822b_bw_mapping(adapter, pattrib));
3088 SET_TX_DESC_DATA_SC_8822B(ptxdesc, rtl8822b_sc_mapping(adapter, pattrib));
3089 }
3090 }
3091
3092 /**
3093 * rtl8822b_fill_txdesc_tx_rate() - Set rate in tx description
3094 * @adapter struct _ADAPTER*
3095 * @attrib packet attribute
3096 * @rate DESC_RATE*
3097 * @shrt 1/0 means short/long PLCP for CCK, short/long GI for HT/VHT
3098 * @fallback enable rate fallback or not
3099 * @desc buffer of tx description
3100 *
3101 * Fill rate related fields of tx description when driver want to use specific
3102 * data rate to send this packet.
3103 */
rtl8822b_fill_txdesc_tx_rate(struct _ADAPTER * adapter,struct pkt_attrib * attrib,u8 rate,u8 shrt,u8 fallback,u8 * desc)3104 static void rtl8822b_fill_txdesc_tx_rate(struct _ADAPTER *adapter,
3105 struct pkt_attrib *attrib,
3106 u8 rate, u8 shrt, u8 fallback, u8 *desc)
3107 {
3108 u8 disfb;
3109 u8 bw;
3110
3111
3112 rate = rate & 0x7F;
3113 shrt = shrt ? 1 : 0;
3114 disfb = fallback ? 0 : 1;
3115
3116 SET_TX_DESC_USE_RATE_8822B(desc, 1);
3117 SET_TX_DESC_DATARATE_8822B(desc, rate);
3118 SET_TX_DESC_DATA_SHORT_8822B(desc, shrt);
3119 SET_TX_DESC_DISDATAFB_8822B(desc, disfb);
3120
3121 /* HT MCS rate can't support bandwidth higher than 40MHz */
3122 bw = GET_TX_DESC_DATA_BW_8822B(desc);
3123 if (((rate >= DESC_RATEMCS0) && (rate <= DESC_RATEMCS31)) && (bw > 1)) {
3124 RTW_WARN(FUNC_ADPT_FMT ": Use HT rate(%s) on bandwidth "
3125 "higher than 40MHz(%u>%u) is illegal, "
3126 "switch bandwidth to 40MHz!\n",
3127 FUNC_ADPT_ARG(adapter),
3128 HDATA_RATE(rate), attrib->bwmode,
3129 CHANNEL_WIDTH_40);
3130
3131 if (attrib->bwmode > CHANNEL_WIDTH_40)
3132 attrib->bwmode = CHANNEL_WIDTH_40;
3133 rtl8822b_fill_txdesc_phy(adapter, attrib, desc);
3134 }
3135 }
3136
3137 #ifdef CONFIG_CONCURRENT_MODE
rtl8822b_fill_txdesc_force_bmc_camid(struct pkt_attrib * pattrib,u8 * ptxdesc)3138 void rtl8822b_fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc)
3139 {
3140 if ((pattrib->encrypt > 0) && (!pattrib->bswenc)
3141 && (pattrib->bmc_camid != INVALID_SEC_MAC_CAM_ID)) {
3142 SET_TX_DESC_EN_DESC_ID_8822B(ptxdesc, 1);
3143 SET_TX_DESC_MACID_8822B(ptxdesc, pattrib->bmc_camid);
3144 }
3145 }
3146 #endif
3147
rtl8822b_fill_txdesc_bmc_tx_rate(struct pkt_attrib * pattrib,u8 * ptxdesc)3148 void rtl8822b_fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc)
3149 {
3150 SET_TX_DESC_USE_RATE_8822B(ptxdesc, 1);
3151 SET_TX_DESC_DATARATE_8822B(ptxdesc, MRateToHwRate(pattrib->rate));
3152 SET_TX_DESC_DISDATAFB_8822B(ptxdesc, 1);
3153 }
3154
3155 /*
3156 * Description:
3157 * Fill tx description for beamforming packets
3158 */
rtl8822b_fill_txdesc_bf(struct xmit_frame * frame,u8 * desc)3159 void rtl8822b_fill_txdesc_bf(struct xmit_frame *frame, u8 *desc)
3160 {
3161 #ifndef CONFIG_BEAMFORMING
3162 return;
3163 #else /* CONFIG_BEAMFORMING */
3164 struct pkt_attrib *attrib;
3165
3166
3167 attrib = &frame->attrib;
3168
3169 SET_TX_DESC_G_ID_8822B(desc, attrib->txbf_g_id);
3170 SET_TX_DESC_P_AID_8822B(desc, attrib->txbf_p_aid);
3171
3172 SET_TX_DESC_MU_DATARATE_8822B(desc, MRateToHwRate(attrib->rate));
3173 /*SET_TX_DESC_MU_RC_8822B(desc, 0);*/
3174
3175 /* Force to disable STBC when txbf is enabled */
3176 if (attrib->txbf_p_aid && attrib->stbc)
3177 SET_TX_DESC_DATA_STBC_8822B(desc, 0);
3178 #endif /* CONFIG_BEAMFORMING */
3179 }
3180
3181 /*
3182 * Description:
3183 * Fill tx description for beamformer,
3184 * include following management packets:
3185 * 1. VHT NDPA
3186 * 2. HT NDPA
3187 * 3. Beamforming Report Poll
3188 */
rtl8822b_fill_txdesc_mgnt_bf(struct xmit_frame * frame,u8 * desc)3189 void rtl8822b_fill_txdesc_mgnt_bf(struct xmit_frame *frame, u8 *desc)
3190 {
3191 #ifndef CONFIG_BEAMFORMING
3192 return;
3193 #else /* CONFIG_BEAMFORMING */
3194 PADAPTER adapter;
3195 struct pkt_attrib *attrib;
3196 u8 ndpa = 0;
3197 u8 ht_ndpa = 0;
3198 u8 report_poll = 0;
3199
3200
3201 adapter = frame->padapter;
3202 attrib = &frame->attrib;
3203
3204 if (attrib->subtype == WIFI_NDPA)
3205 ndpa = 1;
3206 if ((attrib->subtype == WIFI_ACTION_NOACK) && (attrib->order == 1))
3207 ht_ndpa = 1;
3208 if (attrib->subtype == WIFI_BF_REPORT_POLL)
3209 report_poll = 1;
3210
3211 if ((!ndpa) && (!ht_ndpa) && (!report_poll))
3212 return;
3213
3214 /*SET_TX_DESC_TXPKTSIZE_8822B(desc, pattrib->last_txcmdsz);*/
3215 /*SET_TX_DESC_OFFSET_8822B(desc, HALMAC_TX_DESC_SIZE_8822B);*/
3216 SET_TX_DESC_DISRTSFB_8822B(desc, 1);
3217 SET_TX_DESC_DISDATAFB(desc, 1);
3218 /*SET_TX_DESC_SW_SEQ_8822B(desc, pattrib->seqnum);*/
3219 SET_TX_DESC_DATA_BW_8822B(desc, rtl8822b_bw_mapping(adapter, attrib));
3220 SET_TX_DESC_SIGNALING_TA_PKT_SC_8822B(desc,
3221 rtl8822b_sc_mapping(adapter, attrib));
3222 /*SET_TX_DESC_RTY_LMT_EN_8822B(ptxdesc, 1);*/
3223 SET_TX_DESC_RTS_DATA_RTY_LMT_8822B(desc, 5);
3224 SET_TX_DESC_NDPA_8822B(desc, 1);
3225 SET_TX_DESC_NAVUSEHDR_8822B(desc, 1);
3226 /*SET_TX_DESC_QSEL_8822B(desc, QSLT_MGNT);*/
3227 /*
3228 * NSS2MCS0 for VHT
3229 * MCS8 for HT
3230 */
3231 SET_TX_DESC_DATARATE_8822B(desc, MRateToHwRate(attrib->rate));
3232 /*SET_TX_DESC_USE_RATE_8822B(desc, 1);*/
3233 /*SET_TX_DESC_MACID_8822B(desc, pattrib->mac_id);*/ /* ad-hoc mode */
3234 /*SET_TX_DESC_G_ID_8822B(desc, 63);*/
3235 /*
3236 * partial AID of 1st STA, at infrastructure mode, either SU or MU;
3237 * MACID, at ad-hoc mode
3238 *
3239 * For WMAC to restore the received CSI report of STA1.
3240 * WMAC would set p_aid field to 0 in PLCP header for MU.
3241 */
3242 /*SET_TX_DESC_P_AID_8822B(desc, pattrib->txbf_p_aid);*/
3243 SET_TX_DESC_SND_PKT_SEL_8822B(desc, attrib->bf_pkt_type);
3244 #endif /* CONFIG_BEAMFORMING */
3245 }
3246
rtl8822b_cal_txdesc_chksum(PADAPTER adapter,u8 * ptxdesc)3247 void rtl8822b_cal_txdesc_chksum(PADAPTER adapter, u8 *ptxdesc)
3248 {
3249 struct halmac_adapter *halmac;
3250 struct halmac_api *api;
3251
3252
3253 halmac = adapter_to_halmac(adapter);
3254 api = HALMAC_GET_API(halmac);
3255
3256 api->halmac_fill_txdesc_checksum(halmac, ptxdesc);
3257 }
3258
3259
3260 #ifdef CONFIG_MP_INCLUDED
rtl8822b_prepare_mp_txdesc(PADAPTER adapter,struct mp_priv * pmp_priv)3261 void rtl8822b_prepare_mp_txdesc(PADAPTER adapter, struct mp_priv *pmp_priv)
3262 {
3263 u8 *desc;
3264 struct pkt_attrib *attrib;
3265 u32 pkt_size;
3266 s32 bmcast;
3267 u32 desc_size;
3268 u8 data_rate, pwr_status, offset;
3269
3270
3271 desc = pmp_priv->tx.desc;
3272 attrib = &pmp_priv->tx.attrib;
3273 pkt_size = attrib->last_txcmdsz;
3274 bmcast = IS_MCAST(attrib->ra);
3275 desc_size = rtl8822b_get_tx_desc_size(adapter);
3276
3277 SET_TX_DESC_LS_8822B(desc, 1);
3278 SET_TX_DESC_TXPKTSIZE_8822B(desc, pkt_size);
3279
3280 offset = desc_size;
3281 SET_TX_DESC_OFFSET_8822B(desc, offset);
3282 #if defined(CONFIG_PCI_HCI)
3283 SET_TX_DESC_PKT_OFFSET_8822B(desc, 0); /* 8822BE pkt_offset is 0 */
3284 #else
3285 SET_TX_DESC_PKT_OFFSET_8822B(desc, 1);
3286 #endif
3287
3288 if (bmcast)
3289 SET_TX_DESC_BMC_8822B(desc, 1);
3290
3291 SET_TX_DESC_MACID_8822B(desc, attrib->mac_id);
3292 SET_TX_DESC_RATE_ID_8822B(desc, attrib->raid);
3293 SET_TX_DESC_QSEL_8822B(desc, attrib->qsel);
3294
3295 if (pmp_priv->preamble)
3296 SET_TX_DESC_DATA_SHORT_8822B(desc, 1);
3297
3298 if (!attrib->qos_en)
3299 SET_TX_DESC_EN_HWSEQ_8822B(desc, 1);
3300 else
3301 SET_TX_DESC_SW_SEQ_8822B(desc, attrib->seqnum);
3302
3303 if (pmp_priv->bandwidth <= CHANNEL_WIDTH_160)
3304 SET_TX_DESC_DATA_BW_8822B(desc, pmp_priv->bandwidth);
3305 else {
3306 RTW_ERR("%s: unknown bandwidth %d, use 20M\n",
3307 __FUNCTION__, pmp_priv->bandwidth);
3308 SET_TX_DESC_DATA_BW_8822B(desc, CHANNEL_WIDTH_20);
3309 }
3310
3311 SET_TX_DESC_DISDATAFB_8822B(desc, 1);
3312 SET_TX_DESC_USE_RATE_8822B(desc, 1);
3313 SET_TX_DESC_DATARATE_8822B(desc, pmp_priv->rateidx);
3314 }
3315 #endif /* CONFIG_MP_INCLUDED */
3316
fill_default_txdesc(struct xmit_frame * pxmitframe,u8 * pbuf)3317 static void fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf)
3318 {
3319 PADAPTER adapter;
3320 PHAL_DATA_TYPE hal;
3321 struct mlme_ext_priv *pmlmeext;
3322 struct mlme_ext_info *pmlmeinfo;
3323 struct pkt_attrib *pattrib;
3324 s32 bmcst;
3325 u32 desc_size;
3326 u8 hw_port;
3327
3328 adapter = pxmitframe->padapter;
3329 hal = GET_HAL_DATA(adapter);
3330 pmlmeext = &adapter->mlmeextpriv;
3331 pmlmeinfo = &(pmlmeext->mlmext_info);
3332
3333 pattrib = &pxmitframe->attrib;
3334 bmcst = IS_MCAST(pattrib->ra);
3335 hw_port = rtw_hal_get_port(adapter);
3336
3337 desc_size = rtl8822b_get_tx_desc_size(adapter);
3338 _rtw_memset(pbuf, 0, desc_size);
3339
3340 if (pxmitframe->frame_tag == DATA_FRAMETAG) {
3341 u8 drv_userate = 0;
3342
3343 SET_TX_DESC_MACID_8822B(pbuf, pattrib->mac_id);
3344 SET_TX_DESC_RATE_ID_8822B(pbuf, pattrib->raid);
3345 SET_TX_DESC_QSEL_8822B(pbuf, pattrib->qsel);
3346 SET_TX_DESC_SW_SEQ_8822B(pbuf, pattrib->seqnum);
3347
3348 rtl8822b_fill_txdesc_sectype(pattrib, pbuf);
3349 rtl8822b_fill_txdesc_vcs(adapter, pattrib, pbuf);
3350
3351 #ifdef CONFIG_CONCURRENT_MODE
3352 if (bmcst)
3353 rtl8822b_fill_txdesc_force_bmc_camid(pattrib, pbuf);
3354 #endif
3355
3356 #ifdef CONFIG_P2P
3357 if (!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) {
3358 if (pattrib->icmp_pkt == 1 && adapter->registrypriv.wifi_spec == 1)
3359 drv_userate = 1;
3360 }
3361 #endif
3362 #ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR
3363 rtw_phydm_set_dyntxpwr(adapter, pbuf, pattrib->mac_id);
3364 #endif
3365
3366 if ((pattrib->ether_type != 0x888e) &&
3367 (pattrib->ether_type != 0x0806) &&
3368 (pattrib->ether_type != 0x88B4) &&
3369 (pattrib->dhcp_pkt != 1) &&
3370 (drv_userate != 1)
3371 #ifdef CONFIG_AUTO_AP_MODE
3372 && (pattrib->pctrl != _TRUE)
3373 #endif
3374 ) {
3375 /* Non EAP & ARP & DHCP type data packet */
3376
3377 if (pattrib->ampdu_en == _TRUE) {
3378 SET_TX_DESC_AGG_EN_8822B(pbuf, 1);
3379 SET_TX_DESC_MAX_AGG_NUM_8822B(pbuf, 0x1F);
3380 SET_TX_DESC_AMPDU_DENSITY_8822B(pbuf, pattrib->ampdu_spacing);
3381 } else
3382 SET_TX_DESC_BK_8822B(pbuf, 1);
3383
3384 rtl8822b_fill_txdesc_phy(adapter, pattrib, pbuf);
3385
3386 /* compatibility for MCC consideration, use pmlmeext->cur_channel */
3387 if (!bmcst) {
3388 if (pmlmeext->cur_channel > 14)
3389 /* for 5G, OFDM 6M */
3390 SET_TX_DESC_DATA_RTY_LOWEST_RATE_8822B(pbuf, 4);
3391 else
3392 /* for 2.4G, CCK 1M */
3393 SET_TX_DESC_DATA_RTY_LOWEST_RATE_8822B(pbuf, 0);
3394 }
3395
3396 if (hal->fw_ractrl == _FALSE)
3397 rtl8822b_fill_txdesc_tx_rate(adapter, pattrib,
3398 hal->INIDATA_RATE[pattrib->mac_id] & 0x7F,
3399 hal->INIDATA_RATE[pattrib->mac_id] & BIT(7) ? 1 : 0,
3400 1, pbuf);
3401
3402 if (bmcst) {
3403 SET_TX_DESC_SW_DEFINE_8822B(pbuf, 0x01);
3404 rtl8822b_fill_txdesc_bmc_tx_rate(pattrib, pbuf);
3405 }
3406
3407 /* modify data rate by iwpriv */
3408 if (adapter->fix_rate != 0xFF)
3409 rtl8822b_fill_txdesc_tx_rate(adapter, pattrib,
3410 adapter->fix_rate & 0x7F,
3411 adapter->fix_rate & BIT(7) ? 1 : 0,
3412 adapter->data_fb, pbuf);
3413
3414 if (pattrib->ldpc)
3415 SET_TX_DESC_DATA_LDPC_8822B(pbuf, 1);
3416 if (pattrib->stbc)
3417 SET_TX_DESC_DATA_STBC_8822B(pbuf, 1);
3418
3419 #ifdef CONFIG_CMCC_TEST
3420 SET_TX_DESC_DATA_SHORT_8822B(pbuf, 1); /* use cck short premble */
3421 #endif
3422
3423 #ifdef CONFIG_WMMPS_STA
3424 if (pattrib->trigger_frame)
3425 SET_TX_DESC_TRI_FRAME_8822B (pbuf, 1);
3426 #endif /* CONFIG_WMMPS_STA */
3427
3428 } else {
3429 /*
3430 * EAP data packet and ARP packet.
3431 * Use the 1M data rate to send the EAP/ARP packet.
3432 * This will maybe make the handshake smooth.
3433 */
3434
3435 SET_TX_DESC_BK_8822B(pbuf, 1);
3436 SET_TX_DESC_USE_RATE_8822B(pbuf, 1);
3437 if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
3438 SET_TX_DESC_DATA_SHORT_8822B(pbuf, 1);
3439 #ifdef CONFIG_IP_R_MONITOR
3440 if((pattrib->ether_type == ETH_P_ARP) &&
3441 (IsSupportedTxOFDM(adapter->registrypriv.wireless_mode)))
3442 SET_TX_DESC_DATARATE_8822B(pbuf, MRateToHwRate(IEEE80211_OFDM_RATE_6MB));
3443 else
3444 #endif/*CONFIG_IP_R_MONITOR*/
3445 SET_TX_DESC_DATARATE_8822B(pbuf, MRateToHwRate(pmlmeext->tx_rate));
3446
3447 RTW_INFO(FUNC_ADPT_FMT ": SP Packet(0x%04X) rate=0x%x SeqNum = %d\n",
3448 FUNC_ADPT_ARG(adapter), pattrib->ether_type, MRateToHwRate(pmlmeext->tx_rate), pattrib->seqnum);
3449
3450 }
3451
3452 #if defined(CONFIG_USB_TX_AGGREGATION) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
3453 SET_TX_DESC_DMA_TXAGG_NUM_8822B(pbuf, pxmitframe->agg_num);
3454 #endif
3455
3456 #ifdef CONFIG_TDLS
3457 #ifdef CONFIG_XMIT_ACK
3458 /* CCX-TXRPT ack for xmit mgmt frames. */
3459 if (pxmitframe->ack_report) {
3460 #ifdef DBG_CCX
3461 RTW_INFO("%s set spe_rpt\n", __func__);
3462 #endif
3463 SET_TX_DESC_SPE_RPT_8822B(pbuf, 1);
3464 SET_TX_DESC_SW_DEFINE_8822B(pbuf, (u8)(GET_PRIMARY_ADAPTER(adapter)->xmitpriv.seq_no));
3465 }
3466 #endif /* CONFIG_XMIT_ACK */
3467 #endif
3468 } else if (pxmitframe->frame_tag == MGNT_FRAMETAG) {
3469 SET_TX_DESC_MACID_8822B(pbuf, pattrib->mac_id);
3470 SET_TX_DESC_QSEL_8822B(pbuf, pattrib->qsel);
3471 SET_TX_DESC_RATE_ID_8822B(pbuf, pattrib->raid);
3472 SET_TX_DESC_SW_SEQ_8822B(pbuf, pattrib->seqnum);
3473 SET_TX_DESC_USE_RATE_8822B(pbuf, 1);
3474
3475 SET_TX_DESC_MBSSID_8822B(pbuf, pattrib->mbssid & 0xF);
3476
3477 SET_TX_DESC_DATARATE_8822B(pbuf, MRateToHwRate(pattrib->rate));
3478
3479 SET_TX_DESC_RTY_LMT_EN_8822B(pbuf, 1);
3480 if (pattrib->retry_ctrl == _TRUE)
3481 SET_TX_DESC_RTS_DATA_RTY_LMT_8822B(pbuf, 6);
3482 else
3483 SET_TX_DESC_RTS_DATA_RTY_LMT_8822B(pbuf, 12);
3484
3485 rtl8822b_fill_txdesc_mgnt_bf(pxmitframe, pbuf);
3486
3487 #ifdef CONFIG_XMIT_ACK
3488 /* CCX-TXRPT ack for xmit mgmt frames. */
3489 if (pxmitframe->ack_report) {
3490 #ifdef DBG_CCX
3491 RTW_INFO("%s set spe_rpt\n", __FUNCTION__);
3492 #endif
3493 SET_TX_DESC_SPE_RPT_8822B(pbuf, 1);
3494 SET_TX_DESC_SW_DEFINE_8822B(pbuf, (u8)(GET_PRIMARY_ADAPTER(adapter)->xmitpriv.seq_no));
3495 }
3496 #endif /* CONFIG_XMIT_ACK */
3497 } else if (pxmitframe->frame_tag == TXAGG_FRAMETAG)
3498 RTW_INFO("%s: TXAGG_FRAMETAG\n", __FUNCTION__);
3499 #ifdef CONFIG_MP_INCLUDED
3500 else if (pxmitframe->frame_tag == MP_FRAMETAG) {
3501 RTW_DBG("%s: MP_FRAMETAG\n", __FUNCTION__);
3502 fill_txdesc_for_mp(adapter, pbuf);
3503 }
3504 #endif
3505 else {
3506 RTW_INFO("%s: frame_tag=0x%x\n", __FUNCTION__, pxmitframe->frame_tag);
3507
3508 SET_TX_DESC_MACID_8822B(pbuf, pattrib->mac_id);
3509 SET_TX_DESC_RATE_ID_8822B(pbuf, pattrib->raid);
3510 SET_TX_DESC_QSEL_8822B(pbuf, pattrib->qsel);
3511 SET_TX_DESC_SW_SEQ_8822B(pbuf, pattrib->seqnum);
3512 SET_TX_DESC_USE_RATE_8822B(pbuf, 1);
3513 SET_TX_DESC_DATARATE_8822B(pbuf, MRateToHwRate(pmlmeext->tx_rate));
3514 }
3515
3516 SET_TX_DESC_TXPKTSIZE_8822B(pbuf, pattrib->last_txcmdsz);
3517
3518 {
3519 u8 pkt_offset, offset;
3520
3521 pkt_offset = 0;
3522 offset = desc_size;
3523 #ifdef CONFIG_USB_HCI
3524 pkt_offset = pxmitframe->pkt_offset;
3525 offset += (pxmitframe->pkt_offset >> 3);
3526 #endif /* CONFIG_USB_HCI */
3527
3528 #ifdef CONFIG_TX_EARLY_MODE
3529 if (pxmitframe->frame_tag == DATA_FRAMETAG) {
3530 pkt_offset = 1;
3531 offset += EARLY_MODE_INFO_SIZE;
3532 }
3533 #endif /* CONFIG_TX_EARLY_MODE */
3534
3535 SET_TX_DESC_PKT_OFFSET_8822B(pbuf, pkt_offset);
3536 SET_TX_DESC_OFFSET_8822B(pbuf, offset);
3537 #ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
3538 if (pattrib->hw_csum == 1) {
3539 int offset = 48 + pkt_offset*8 + 8;
3540
3541 SET_TX_DESC_OFFSET_8822B(pbuf, offset);
3542 SET_TX_DESC_CHK_EN_8822B(pbuf, 1);
3543 SET_TX_DESC_WHEADER_LEN_8822B(pbuf, (pattrib->hdrlen + pattrib->iv_len + XATTRIB_GET_MCTRL_LEN(pattrib))>>1);
3544 }
3545 #endif
3546 }
3547
3548 if (bmcst)
3549 SET_TX_DESC_BMC_8822B(pbuf, 1);
3550
3551 /*
3552 * 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS.
3553 * (1) The sequence number of each non-Qos frame / broadcast / multicast /
3554 * mgnt frame should be controlled by Hw because Fw will also send null data
3555 * which we cannot control when Fw LPS enable.
3556 * --> default enable non-Qos data sequense number. 2010.06.23. by tynli.
3557 * (2) Enable HW SEQ control for beacon packet, because we use Hw beacon.
3558 * (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets.
3559 * 2010.06.23. Added by tynli.
3560 */
3561 if (!pattrib->qos_en) {
3562 SET_TX_DESC_DISQSELSEQ_8822B(pbuf, 1);
3563 SET_TX_DESC_EN_HWSEQ_8822B(pbuf, 1);
3564 SET_TX_DESC_HW_SSN_SEL_8822B(pbuf, pattrib->hw_ssn_sel);
3565 }
3566
3567 SET_TX_DESC_PORT_ID_8822B(pbuf, hw_port);
3568 SET_TX_DESC_MULTIPLE_PORT_8822B(pbuf, hw_port);
3569
3570 #ifdef CONFIG_ANTENNA_DIVERSITY
3571 if (!bmcst && pattrib->psta)
3572 odm_set_tx_ant_by_tx_info(adapter_to_phydm(adapter), pbuf, pattrib->psta->cmn.mac_id);
3573 #endif
3574
3575 rtl8822b_fill_txdesc_bf(pxmitframe, pbuf);
3576 }
3577
3578 /*
3579 * Description:
3580 *
3581 * Parameters:
3582 * pxmitframe xmitframe
3583 * pbuf where to fill tx desc
3584 */
rtl8822b_update_txdesc(struct xmit_frame * pxmitframe,u8 * pbuf)3585 void rtl8822b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf)
3586 {
3587 fill_default_txdesc(pxmitframe, pbuf);
3588 rtl8822b_cal_txdesc_chksum(pxmitframe->padapter, pbuf);
3589 }
3590
3591 /*
3592 * Description:
3593 * In normal chip, we should send some packet to HW which will be used by FW
3594 * in FW LPS mode.
3595 * The function is to fill the Tx descriptor of this packets,
3596 * then FW can tell HW to send these packet directly.
3597 */
fill_fake_txdesc(PADAPTER adapter,u8 * pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull,u8 bDataFrame)3598 static void fill_fake_txdesc(PADAPTER adapter, u8 *pDesc, u32 BufferLen,
3599 u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame)
3600 {
3601 /* Clear all status */
3602 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
3603 struct xmit_priv *pxmitpriv = &adapter->xmitpriv;
3604 u32 desc_size;
3605 u8 hw_port = rtw_hal_get_port(adapter);
3606
3607 desc_size = rtl8822b_get_tx_desc_size(adapter);
3608 _rtw_memset(pDesc, 0, desc_size);
3609
3610 SET_TX_DESC_LS_8822B(pDesc, 1);
3611
3612 SET_TX_DESC_OFFSET_8822B(pDesc, desc_size);
3613
3614 SET_TX_DESC_TXPKTSIZE_8822B(pDesc, BufferLen);
3615 SET_TX_DESC_QSEL_8822B(pDesc, QSLT_MGNT); /* Fixed queue of Mgnt queue */
3616
3617 if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
3618 SET_TX_DESC_RATE_ID_8822B(pDesc, RATEID_IDX_B);
3619 else
3620 SET_TX_DESC_RATE_ID_8822B(pDesc, RATEID_IDX_G);
3621
3622 /* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by HW */
3623 if (_TRUE == IsPsPoll)
3624 SET_TX_DESC_NAVUSEHDR_8822B(pDesc, 1);
3625 else {
3626 SET_TX_DESC_DISQSELSEQ_8822B(pDesc, 1);
3627 SET_TX_DESC_EN_HWSEQ_8822B(pDesc, 1);
3628 SET_TX_DESC_HW_SSN_SEL_8822B(pDesc, pxmitpriv->hw_ssn_seq_no);/*pattrib->hw_ssn_sel*/
3629 SET_TX_DESC_EN_HWEXSEQ_8822B(pDesc, 0);
3630 }
3631
3632 if (_TRUE == IsBTQosNull)
3633 SET_TX_DESC_BT_NULL_8822B(pDesc, 1);
3634
3635 SET_TX_DESC_USE_RATE_8822B(pDesc, 1);
3636 SET_TX_DESC_DATARATE_8822B(pDesc, MRateToHwRate(pmlmeext->tx_rate));
3637
3638 #ifdef CONFIG_MCC_MODE
3639 /* config Null data retry number */
3640 if (IsPsPoll == _FALSE && IsBTQosNull == _FALSE && bDataFrame == _FALSE) {
3641 if (rtw_hal_check_mcc_status(adapter, MCC_STATUS_PROCESS_MCC_START_SETTING)) {
3642 u8 rty_num = adapter->mcc_adapterpriv.null_rty_num;
3643 if (rty_num != 0) {
3644 SET_TX_DESC_RTY_LMT_EN_8822B(pDesc, 1);
3645 SET_TX_DESC_RTS_DATA_RTY_LMT_8822B(pDesc, rty_num);
3646 }
3647 }
3648 }
3649 #endif
3650
3651
3652 /*
3653 * Encrypt the data frame if under security mode excepct null data.
3654 */
3655 if (_TRUE == bDataFrame) {
3656 u32 EncAlg;
3657
3658 EncAlg = adapter->securitypriv.dot11PrivacyAlgrthm;
3659 switch (EncAlg) {
3660 case _NO_PRIVACY_:
3661 SET_TX_DESC_SEC_TYPE_8822B(pDesc, 0x0);
3662 break;
3663 case _WEP40_:
3664 case _WEP104_:
3665 case _TKIP_:
3666 SET_TX_DESC_SEC_TYPE_8822B(pDesc, 0x1);
3667 break;
3668 case _SMS4_:
3669 SET_TX_DESC_SEC_TYPE_8822B(pDesc, 0x2);
3670 break;
3671 case _AES_:
3672 SET_TX_DESC_SEC_TYPE_8822B(pDesc, 0x3);
3673 break;
3674 default:
3675 SET_TX_DESC_SEC_TYPE_8822B(pDesc, 0x0);
3676 break;
3677 }
3678 }
3679
3680 SET_TX_DESC_PORT_ID_8822B(pDesc, hw_port);
3681 SET_TX_DESC_MULTIPLE_PORT_8822B(pDesc, hw_port);
3682 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
3683 /*
3684 * USB interface drop packet if the checksum of descriptor isn't correct.
3685 * Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.).
3686 */
3687 rtl8822b_cal_txdesc_chksum(adapter, pDesc);
3688 #endif
3689 }
3690
rtl8822b_dbg_dump_tx_desc(PADAPTER adapter,int frame_tag,u8 * ptxdesc)3691 void rtl8822b_dbg_dump_tx_desc(PADAPTER adapter, int frame_tag, u8 *ptxdesc)
3692 {
3693 u8 bDumpTxPkt;
3694 u8 bDumpTxDesc = _FALSE;
3695
3696
3697 rtw_hal_get_def_var(adapter, HAL_DEF_DBG_DUMP_TXPKT, &bDumpTxPkt);
3698
3699 /* 1 for data frame, 2 for mgnt frame */
3700 if (bDumpTxPkt == 1) {
3701 RTW_INFO("dump tx_desc for data frame\n");
3702 if ((frame_tag & 0x0f) == DATA_FRAMETAG)
3703 bDumpTxDesc = _TRUE;
3704 } else if (bDumpTxPkt == 2) {
3705 RTW_INFO("dump tx_desc for mgnt frame\n");
3706 if ((frame_tag & 0x0f) == MGNT_FRAMETAG)
3707 bDumpTxDesc = _TRUE;
3708 }
3709
3710 /* 8822B TX SIZE = 48(HALMAC_TX_DESC_SIZE_8822B) */
3711 if (_TRUE == bDumpTxDesc) {
3712 RTW_INFO("=====================================\n");
3713 RTW_INFO("Offset00(0x%08x)\n", *((u32 *)(ptxdesc)));
3714 RTW_INFO("Offset04(0x%08x)\n", *((u32 *)(ptxdesc + 4)));
3715 RTW_INFO("Offset08(0x%08x)\n", *((u32 *)(ptxdesc + 8)));
3716 RTW_INFO("Offset12(0x%08x)\n", *((u32 *)(ptxdesc + 12)));
3717 RTW_INFO("Offset16(0x%08x)\n", *((u32 *)(ptxdesc + 16)));
3718 RTW_INFO("Offset20(0x%08x)\n", *((u32 *)(ptxdesc + 20)));
3719 RTW_INFO("Offset24(0x%08x)\n", *((u32 *)(ptxdesc + 24)));
3720 RTW_INFO("Offset28(0x%08x)\n", *((u32 *)(ptxdesc + 28)));
3721 RTW_INFO("Offset32(0x%08x)\n", *((u32 *)(ptxdesc + 32)));
3722 RTW_INFO("Offset36(0x%08x)\n", *((u32 *)(ptxdesc + 36)));
3723 RTW_INFO("Offset40(0x%08x)\n", *((u32 *)(ptxdesc + 40)));
3724 RTW_INFO("Offset44(0x%08x)\n", *((u32 *)(ptxdesc + 44)));
3725 RTW_INFO("=====================================\n");
3726 }
3727 }
3728 /* xmit section */
rtl8822b_init_xmit_priv(_adapter * adapter)3729 void rtl8822b_init_xmit_priv(_adapter *adapter)
3730 {
3731 struct xmit_priv *pxmitpriv = &adapter->xmitpriv;
3732
3733 pxmitpriv->hw_ssn_seq_no = rtw_get_hwseq_no(adapter);
3734 pxmitpriv->nqos_ssn = 0;
3735 }
3736
rtl8822b_rxdesc2attribute(struct rx_pkt_attrib * a,u8 * desc)3737 void rtl8822b_rxdesc2attribute(struct rx_pkt_attrib *a, u8 *desc)
3738 {
3739 /* initial value */
3740 _rtw_memset(a, 0, sizeof(struct rx_pkt_attrib));
3741 a->bw = CHANNEL_WIDTH_MAX;
3742
3743 /* Get from RX DESC */
3744 a->pkt_len = (u16)GET_RX_DESC_PKT_LEN_8822B(desc);
3745 a->pkt_rpt_type = GET_RX_DESC_C2H_8822B(desc) ? C2H_PACKET : NORMAL_RX;
3746
3747 if (a->pkt_rpt_type == NORMAL_RX) {
3748 a->crc_err = (u8)GET_RX_DESC_CRC32_8822B(desc);
3749 a->icv_err = (u8)GET_RX_DESC_ICV_ERR_8822B(desc);
3750 a->drvinfo_sz = (u8)GET_RX_DESC_DRV_INFO_SIZE_8822B(desc) << 3;
3751 a->encrypt = (u8)GET_RX_DESC_SECURITY_8822B(desc);
3752 a->qos = (u8)GET_RX_DESC_QOS_8822B(desc);
3753 a->shift_sz = (u8)GET_RX_DESC_SHIFT_8822B(desc);
3754 a->physt = (u8)GET_RX_DESC_PHYST_8822B(desc);
3755 a->bdecrypted = (u8)GET_RX_DESC_SWDEC_8822B(desc) ? 0 : 1;
3756
3757 a->priority = (u8)GET_RX_DESC_TID_8822B(desc);
3758 a->amsdu = (u8)GET_RX_DESC_AMSDU_8822B(desc);
3759 a->mdata = (u8)GET_RX_DESC_MD_8822B(desc);
3760 a->mfrag = (u8)GET_RX_DESC_MF_8822B(desc);
3761
3762 a->seq_num = (u16)GET_RX_DESC_SEQ_8822B(desc);
3763 a->frag_num = (u8)GET_RX_DESC_FRAG_8822B(desc);
3764
3765 a->data_rate = (u8)GET_RX_DESC_RX_RATE_8822B(desc);
3766 a->ppdu_cnt = (u8)GET_RX_DESC_PPDU_CNT_8822B(desc);
3767 a->free_cnt = (u32)GET_RX_DESC_TSFL_8822B(desc);
3768
3769 #ifdef CONFIG_TCP_CSUM_OFFLOAD_RX
3770 /* RX TCP checksum offload related variables */
3771 a->csum_valid = (u8)GET_RX_DESC_CHK_VLD_8822B(desc);
3772 a->csum_err = (u8)GET_RX_DESC_CHKERR_8822B(desc);
3773 #endif /* CONFIG_TCP_CSUM_OFFLOAD_RX */
3774 }
3775 }
3776
rtl8822b_query_rx_desc(union recv_frame * precvframe,u8 * pdesc)3777 void rtl8822b_query_rx_desc(union recv_frame *precvframe, u8 *pdesc)
3778 {
3779 rtl8822b_rxdesc2attribute(&precvframe->u.hdr.attrib, pdesc);
3780 }
3781
rtl8822b_set_hal_ops(PADAPTER adapter)3782 void rtl8822b_set_hal_ops(PADAPTER adapter)
3783 {
3784 struct hal_com_data *hal;
3785 struct hal_ops *ops;
3786
3787
3788 hal = GET_HAL_DATA(adapter);
3789 ops = &adapter->hal_func;
3790
3791 /*
3792 * Initialize hal_com_data variables
3793 */
3794 hal->efuse0x3d7 = 0xFF;
3795 hal->efuse0x3d8 = 0xFF;
3796
3797 /*
3798 * Initialize operation callback functions
3799 */
3800 /*** initialize section ***/
3801 ops->read_chip_version = read_chip_version;
3802 /*
3803 ops->init_default_value = NULL;
3804 ops->intf_chip_configure = NULL;
3805 */
3806 ops->read_adapter_info = rtl8822b_read_efuse;
3807 ops->hal_power_on = rtl8822b_power_on;
3808 ops->hal_power_off = rtl8822b_power_off;
3809 ops->hal_init = rtl8822b_init;
3810 ops->hal_deinit = rtl8822b_deinit;
3811 ops->dm_init = rtl8822b_phy_init_dm_priv;
3812 ops->dm_deinit = rtl8822b_phy_deinit_dm_priv;
3813
3814 /*** xmit section ***/
3815 /*
3816 ops->init_xmit_priv = NULL;
3817 ops->free_xmit_priv = NULL;
3818 ops->hal_xmit = NULL;
3819 ops->mgnt_xmit = NULL;
3820 ops->hal_xmitframe_enqueue = NULL;
3821 #ifdef CONFIG_XMIT_THREAD_MODE
3822 ops->xmit_thread_handler = NULL;
3823 #endif
3824 */
3825 ops->run_thread = rtl8822b_run_thread;
3826 ops->cancel_thread = rtl8822b_cancel_thread;
3827
3828 /*** recv section ***/
3829 /*
3830 ops->init_recv_priv = NULL;
3831 ops->free_recv_priv = NULL;
3832 #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
3833 ops->inirp_init = NULL;
3834 ops->inirp_deinit = NULL;
3835 #endif
3836 */
3837 /*** interrupt hdl section ***/
3838 /*
3839 ops->enable_interrupt = NULL;
3840 ops->disable_interrupt = NULL;
3841 */
3842 ops->check_ips_status = check_ips_status;
3843 /*
3844 #if defined(CONFIG_PCI_HCI)
3845 ops->interrupt_handler = NULL;
3846 #endif
3847 #if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
3848 ops->interrupt_handler = NULL;
3849 #endif
3850 #if defined(CONFIG_PCI_HCI)
3851 ops->irp_reset = NULL;
3852 #endif
3853 */
3854
3855 /*** DM section ***/
3856 ops->set_chnl_bw_handler = rtl8822b_set_channel_bw;
3857
3858 ops->set_tx_power_level_handler = rtl8822b_set_tx_power_level;
3859 ops->set_tx_power_index_handler = rtl8822b_set_tx_power_index;
3860 ops->get_tx_power_index_handler = hal_com_get_txpwr_idx;
3861
3862 ops->hal_dm_watchdog = rtl8822b_phy_haldm_watchdog;
3863
3864 ops->set_hw_reg_handler = rtl8822b_sethwreg;
3865 ops->GetHwRegHandler = rtl8822b_gethwreg;
3866 ops->get_hal_def_var_handler = rtl8822b_gethaldefvar;
3867 ops->SetHalDefVarHandler = rtl8822b_sethaldefvar;
3868
3869 ops->GetHalODMVarHandler = GetHalODMVar;
3870 ops->SetHalODMVarHandler = SetHalODMVar;
3871
3872 ops->SetBeaconRelatedRegistersHandler = set_beacon_related_registers;
3873
3874 /*
3875 ops->interface_ps_func = NULL;
3876 */
3877 ops->read_bbreg = rtl8822b_read_bb_reg;
3878 ops->write_bbreg = rtl8822b_write_bb_reg;
3879 ops->read_rfreg = rtl8822b_read_rf_reg;
3880 ops->write_rfreg = rtl8822b_write_rf_reg;
3881 ops->read_wmmedca_reg = rtl8822b_read_wmmedca_reg;
3882
3883 #ifdef CONFIG_HOSTAPD_MLME
3884 /*
3885 ops->hostap_mgnt_xmit_entry = NULL;
3886 */
3887 #endif
3888 /*
3889 ops->EfusePowerSwitch = NULL;
3890 ops->BTEfusePowerSwitch = NULL;
3891 ops->ReadEFuse = NULL;
3892 ops->EFUSEGetEfuseDefinition = NULL;
3893 ops->EfuseGetCurrentSize = NULL;
3894 ops->Efuse_PgPacketRead = NULL;
3895 ops->Efuse_PgPacketWrite = NULL;
3896 ops->Efuse_WordEnableDataWrite = NULL;
3897 ops->Efuse_PgPacketWrite_BT = NULL;
3898 */
3899 #ifdef DBG_CONFIG_ERROR_DETECT
3900 ops->sreset_init_value = sreset_init_value;
3901 ops->sreset_reset_value = sreset_reset_value;
3902 ops->silentreset = sreset_reset;
3903 ops->sreset_xmit_status_check = xmit_status_check;
3904 ops->sreset_linked_status_check = linked_status_check;
3905 ops->sreset_get_wifi_status = sreset_get_wifi_status;
3906 ops->sreset_inprogress = sreset_inprogress;
3907 #endif /* DBG_CONFIG_ERROR_DETECT */
3908
3909 #ifdef CONFIG_IOL
3910 /*
3911 ops->IOL_exec_cmds_sync = NULL;
3912 */
3913 #endif
3914
3915 ops->hal_notch_filter = rtl8822b_notch_filter_switch;
3916 ops->hal_mac_c2h_handler = rtl8822b_c2h_handler;
3917 ops->fill_h2c_cmd = rtl8822b_fillh2ccmd;
3918 ops->fill_fake_txdesc = fill_fake_txdesc;
3919 ops->fw_dl = rtl8822b_fw_dl;
3920
3921 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_PCI_HCI)
3922 /*
3923 ops->clear_interrupt = NULL;
3924 */
3925 #endif
3926 /*
3927 ops->hal_get_tx_buff_rsvd_page_num = NULL;
3928 */
3929 #ifdef CONFIG_GPIO_API
3930 /*
3931 ops->update_hisr_hsisr_ind = NULL;
3932 */
3933 #endif
3934
3935 /* HALMAC related functions */
3936 ops->init_mac_register = rtl8822b_phy_init_mac_register;
3937 ops->init_phy = rtl8822b_phy_init;
3938 ops->reqtxrpt = rtl8822b_req_txrpt_cmd;
3939 }
3940